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GET /api/patches/57903/?format=api
{ "id": 57903, "url": "https://patches.dpdk.org/api/patches/57903/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-8-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190826105105.19121-8-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190826105105.19121-8-qi.z.zhang@intel.com", "date": "2019-08-26T10:50:09", "name": "[07/63] net/ice/base: correct argument port info", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e121345dec023a1d8200e716264c06d2d152c29e", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-8-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 6119, "url": "https://patches.dpdk.org/api/series/6119/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6119", "date": "2019-08-26T10:50:02", "name": "net/ice/base: update base code", "version": 1, "mbox": "https://patches.dpdk.org/series/6119/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/57903/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/57903/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E4B841BFE6;\n\tMon, 26 Aug 2019 12:48:44 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id B7BE01BFE1\n\tfor <dev@dpdk.org>; Mon, 26 Aug 2019 12:48:38 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Aug 2019 03:48:38 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby orsmga003.jf.intel.com with ESMTP; 26 Aug 2019 03:48:36 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,431,1559545200\"; d=\"scan'208\";a=\"182402092\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n\tTarun Singh <tarun.k.singh@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 26 Aug 2019 18:50:09 +0800", "Message-Id": "<20190826105105.19121-8-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "References": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 07/63] net/ice/base: correct argument port info", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "correct argument pi(port_info) passed in function\nice_sched_get_first_node(), otherwise it will return the incorrect\nnode.\n\nfunctions ice_sched_get_agg_node and ice_sched_cfg_sibl_node_prio:\nchange argument from hw to pi for it to align to correct port.\n\nMoved saving tc node bw info from hardware structure(hw) to port info\nstructure(pi). This change allows multiple ports to save and replay\nthe information correctly.\n\nSigned-off-by: Tarun Singh <tarun.k.singh@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 2 +-\n drivers/net/ice/base/ice_common.h | 2 +-\n drivers/net/ice/base/ice_sched.c | 70 ++++++++++++++++++++-------------------\n drivers/net/ice/base/ice_sched.h | 4 +--\n drivers/net/ice/base/ice_type.h | 2 +-\n 5 files changed, 41 insertions(+), 39 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 0356537a4..b4f0b964d 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -4158,7 +4158,7 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)\n \t\t\t\t &sw->recp_list[i].filt_replay_rules);\n \tice_sched_replay_agg_vsi_preinit(hw);\n \n-\treturn ice_sched_replay_tc_node_bw(hw);\n+\treturn ice_sched_replay_tc_node_bw(hw->port_info);\n }\n \n /**\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex c5170f705..4ecfa6b9b 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -184,7 +184,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);\n void ice_replay_post(struct ice_hw *hw);\n void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);\n void ice_sched_replay_agg(struct ice_hw *hw);\n-enum ice_status ice_sched_replay_tc_node_bw(struct ice_hw *hw);\n+enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);\n enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);\n enum ice_status\n ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 2d80af731..d16f256c9 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -1480,7 +1480,7 @@ ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \n /**\n * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID\n- * @hw: pointer to the HW struct\n+ * @pi: pointer to the port information structure\n * @tc_node: pointer to the TC node\n * @agg_id: aggregator ID\n *\n@@ -1488,14 +1488,17 @@ ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n * a given TC branch\n */\n static struct ice_sched_node *\n-ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,\n+ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,\n \t\t u32 agg_id)\n {\n \tstruct ice_sched_node *node;\n+\tstruct ice_hw *hw = pi->hw;\n \tu8 agg_layer;\n \n+\tif (!hw)\n+\t\treturn NULL;\n \tagg_layer = ice_sched_get_agg_layer(hw);\n-\tnode = ice_sched_get_first_node(hw->port_info, tc_node, agg_layer);\n+\tnode = ice_sched_get_first_node(pi, tc_node, agg_layer);\n \n \t/* Check whether it already exists */\n \twhile (node) {\n@@ -2251,7 +2254,7 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,\n \tif (!tc_node)\n \t\treturn ICE_ERR_CFG;\n \n-\tagg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);\n+\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \tif (!agg_node)\n \t\treturn ICE_ERR_DOES_NOT_EXIST;\n \n@@ -2388,7 +2391,7 @@ ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)\n \tif (!tc_node)\n \t\treturn ICE_ERR_CFG;\n \n-\tagg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);\n+\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \tif (!agg_node)\n \t\treturn ICE_ERR_DOES_NOT_EXIST;\n \n@@ -2497,7 +2500,7 @@ ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)\n \tif (!tc_node)\n \t\treturn ICE_ERR_CFG;\n \n-\tagg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);\n+\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \t/* Does Agg node already exist ? */\n \tif (agg_node)\n \t\treturn status;\n@@ -3445,7 +3448,6 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,\n \t\t u8 *q_prio)\n {\n \tenum ice_status status = ICE_ERR_PARAM;\n-\tstruct ice_hw *hw = pi->hw;\n \tu16 i;\n \n \tice_acquire_lock(&pi->sched_lock);\n@@ -3460,7 +3462,7 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,\n \t\t\tbreak;\n \t\t}\n \t\t/* Configure Priority */\n-\t\tstatus = ice_sched_cfg_sibl_node_prio(hw, node, q_prio[i]);\n+\t\tstatus = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);\n \t\tif (status)\n \t\t\tbreak;\n \t}\n@@ -3508,7 +3510,7 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,\n \tif (!tc_node)\n \t\tgoto exit_agg_priority_per_tc;\n \n-\tagg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);\n+\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \tif (!agg_node)\n \t\tgoto exit_agg_priority_per_tc;\n \n@@ -3542,7 +3544,7 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,\n \n \t\tif (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {\n \t\t\t/* Configure Priority */\n-\t\t\tstatus = ice_sched_cfg_sibl_node_prio(hw, vsi_node,\n+\t\t\tstatus = ice_sched_cfg_sibl_node_prio(pi, vsi_node,\n \t\t\t\t\t\t\t node_prio[i]);\n \t\t\tif (status)\n \t\t\t\tbreak;\n@@ -3654,7 +3656,7 @@ ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,\n \t\tif (!tc_node)\n \t\t\tcontinue;\n \n-\t\tagg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);\n+\t\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \t\tif (!agg_node)\n \t\t\tcontinue;\n \n@@ -4453,19 +4455,17 @@ static enum ice_status\n ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,\n \t\t\t enum ice_rl_type rl_type, u32 bw)\n {\n-\tstruct ice_hw *hw = pi->hw;\n-\n \tif (tc >= ICE_MAX_TRAFFIC_CLASS)\n \t\treturn ICE_ERR_PARAM;\n \tswitch (rl_type) {\n \tcase ICE_MIN_BW:\n-\t\tice_set_clear_cir_bw(&hw->tc_node_bw_t_info[tc], bw);\n+\t\tice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);\n \t\tbreak;\n \tcase ICE_MAX_BW:\n-\t\tice_set_clear_eir_bw(&hw->tc_node_bw_t_info[tc], bw);\n+\t\tice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);\n \t\tbreak;\n \tcase ICE_SHARED_BW:\n-\t\tice_set_clear_shared_bw(&hw->tc_node_bw_t_info[tc], bw);\n+\t\tice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);\n \t\tbreak;\n \tdefault:\n \t\treturn ICE_ERR_PARAM;\n@@ -4552,17 +4552,15 @@ static enum ice_status\n ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,\n \t\t\t\tenum ice_rl_type rl_type, u16 bw_alloc)\n {\n-\tstruct ice_hw *hw = pi->hw;\n-\n \tif (tc >= ICE_MAX_TRAFFIC_CLASS)\n \t\treturn ICE_ERR_PARAM;\n \tswitch (rl_type) {\n \tcase ICE_MIN_BW:\n-\t\tice_set_clear_cir_bw_alloc(&hw->tc_node_bw_t_info[tc],\n+\t\tice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],\n \t\t\t\t\t bw_alloc);\n \t\tbreak;\n \tcase ICE_MAX_BW:\n-\t\tice_set_clear_eir_bw_alloc(&hw->tc_node_bw_t_info[tc],\n+\t\tice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],\n \t\t\t\t\t bw_alloc);\n \t\tbreak;\n \tdefault:\n@@ -4710,7 +4708,7 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,\n \n \t\ttc_node = ice_sched_get_tc_node(pi, tc);\n \t\tif (tc_node)\n-\t\t\tnode = ice_sched_get_agg_node(pi->hw, tc_node, id);\n+\t\t\tnode = ice_sched_get_agg_node(pi, tc_node, id);\n \t\tbreak;\n \t}\n \n@@ -4921,7 +4919,7 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)\n \t\tif (!tc_node)\n \t\t\tcontinue;\n \n-\t\tagg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);\n+\t\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \t\tif (!agg_node)\n \t\t\tcontinue;\n \t\t/* SRL bandwidth layer selection */\n@@ -4992,7 +4990,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)\n \t\tif (!tc_node)\n \t\t\tcontinue;\n \n-\t\tagg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);\n+\t\tagg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);\n \t\tif (!agg_node)\n \t\t\tcontinue;\n \n@@ -5017,7 +5015,7 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)\n \n /**\n * ice_sched_cfg_sibl_node_prio - configure node sibling priority\n- * @hw: pointer to the HW struct\n+ * @pi: port information structure\n * @node: sched node to configure\n * @priority: sibling priority\n *\n@@ -5025,13 +5023,16 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)\n * function needs to be called with scheduler lock held.\n */\n enum ice_status\n-ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,\n-\t\t\t u8 priority)\n+ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,\n+\t\t\t struct ice_sched_node *node, u8 priority)\n {\n \tstruct ice_aqc_txsched_elem_data buf;\n \tstruct ice_aqc_txsched_elem *data;\n+\tstruct ice_hw *hw = pi->hw;\n \tenum ice_status status;\n \n+\tif (!hw)\n+\t\treturn ICE_ERR_PARAM;\n \tbuf = node->info;\n \tdata = &buf.data;\n \tdata->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;\n@@ -5198,7 +5199,7 @@ ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)\n \t\t\tstatus = ICE_ERR_PARAM;\n \t\t\tbreak;\n \t\t}\n-\t\tagg_node = ice_sched_get_agg_node(hw, tc_node,\n+\t\tagg_node = ice_sched_get_agg_node(hw->port_info, tc_node,\n \t\t\t\t\t\t agg_info->agg_id);\n \t\tif (!agg_node) {\n \t\t\tstatus = ICE_ERR_PARAM;\n@@ -5310,26 +5311,27 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)\n \n /**\n * ice_sched_replay_tc_node_bw - replay TC node(s) BW\n- * @hw: pointer to the HW struct\n+ * @pi: port information structure\n *\n- * This function replay TC nodes. The caller needs to hold the scheduler lock.\n+ * This function replay TC nodes.\n */\n enum ice_status\n-ice_sched_replay_tc_node_bw(struct ice_hw *hw)\n+ice_sched_replay_tc_node_bw(struct ice_port_info *pi)\n {\n-\tstruct ice_port_info *pi = hw->port_info;\n \tenum ice_status status = ICE_SUCCESS;\n \tu8 tc;\n \n+\tif (!pi->hw)\n+\t\treturn ICE_ERR_PARAM;\n \tice_acquire_lock(&pi->sched_lock);\n \tice_for_each_traffic_class(tc) {\n \t\tstruct ice_sched_node *tc_node;\n \n-\t\ttc_node = ice_sched_get_tc_node(hw->port_info, tc);\n+\t\ttc_node = ice_sched_get_tc_node(pi, tc);\n \t\tif (!tc_node)\n \t\t\tcontinue; /* TC not present */\n-\t\tstatus = ice_sched_replay_node_bw(hw, tc_node,\n-\t\t\t\t\t\t &hw->tc_node_bw_t_info[tc]);\n+\t\tstatus = ice_sched_replay_node_bw(pi->hw, tc_node,\n+\t\t\t\t\t\t &pi->tc_node_bw_t_info[tc]);\n \t\tif (status)\n \t\t\tbreak;\n \t}\ndiff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h\nindex 38f8f93d2..932ae075f 100644\n--- a/drivers/net/ice/base/ice_sched.h\n+++ b/drivers/net/ice/base/ice_sched.h\n@@ -183,6 +183,6 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,\n enum ice_status\n ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);\n enum ice_status\n-ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,\n-\t\t\t u8 priority);\n+ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,\n+\t\t\t struct ice_sched_node *node, u8 priority);\n #endif /* _ICE_SCHED_H_ */\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 88846e042..d8cb8eecd 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -674,6 +674,7 @@ struct ice_port_info {\n \t\tsib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];\n \t/* List contain profile ID(s) and other params per layer */\n \tstruct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];\n+\tstruct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];\n \tstruct ice_dcbx_cfg local_dcbx_cfg;\t/* Oper/Local Cfg */\n \t/* DCBX info */\n \tstruct ice_dcbx_cfg remote_dcbx_cfg;\t/* Peer Cfg */\n@@ -742,7 +743,6 @@ struct ice_hw {\n \tu8 sw_entry_point_layer;\n \tu16 max_children[ICE_AQC_TOPO_MAX_LEVEL_NUM];\n \tstruct LIST_HEAD_TYPE agg_list;\t/* lists all aggregator */\n-\tstruct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];\n \tstruct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];\n \tu8 evb_veb;\t\t/* true for VEB, false for VEPA */\n \tu8 reset_ongoing;\t/* true if HW is in reset, false otherwise */\n", "prefixes": [ "07/63" ] }