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GET /api/patches/579/?format=api
{ "id": 579, "url": "https://patches.dpdk.org/api/patches/579/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1411724186-8036-5-git-send-email-bjzhuc@cn.ibm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411724186-8036-5-git-send-email-bjzhuc@cn.ibm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411724186-8036-5-git-send-email-bjzhuc@cn.ibm.com", "date": "2014-09-26T09:36:18", "name": "[dpdk-dev,04/12] Add CPU cycle operations for IBM Power architecture", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8c833ba9be01eeb59d2c9d5b49069f2db8f1d9db", "submitter": { "id": 80, "url": "https://patches.dpdk.org/api/people/80/?format=api", "name": "Chao Zhu", "email": "bjzhuc@cn.ibm.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1411724186-8036-5-git-send-email-bjzhuc@cn.ibm.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/579/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/579/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 0ED197E67;\n\tFri, 26 Sep 2014 11:30:32 +0200 (CEST)", "from e7.ny.us.ibm.com (e7.ny.us.ibm.com [32.97.182.137])\n\tby dpdk.org (Postfix) with ESMTP id B1D9E7E2C\n\tfor <dev@dpdk.org>; Fri, 26 Sep 2014 11:30:21 +0200 (CEST)", "from /spool/local\n\tby e7.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only!\n\tViolators will be prosecuted\n\tfor <dev@dpdk.org> from <bjzhuc@cn.ibm.com>;\n\tFri, 26 Sep 2014 05:36:42 -0400", "from d01dlp01.pok.ibm.com (9.56.250.166)\n\tby e7.ny.us.ibm.com (192.168.1.107) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tFri, 26 Sep 2014 05:36:40 -0400", "from b01cxnp22034.gho.pok.ibm.com (b01cxnp22034.gho.pok.ibm.com\n\t[9.57.198.24])\n\tby d01dlp01.pok.ibm.com (Postfix) with ESMTP id E031C38C803D\n\tfor <dev@dpdk.org>; Fri, 26 Sep 2014 05:36:39 -0400 (EDT)", "from d01av05.pok.ibm.com (d01av05.pok.ibm.com [9.56.224.195])\n\tby b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid\n\ts8Q9aV3J9306582 for <dev@dpdk.org>; Fri, 26 Sep 2014 09:36:39 GMT", "from d01av05.pok.ibm.com (localhost [127.0.0.1])\n\tby d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\ts8Q9a7ir002930 for <dev@dpdk.org>; Fri, 26 Sep 2014 05:36:07 -0400", "from d01hub02.pok.ibm.com (d01hub02.pok.ibm.com [9.63.10.236])\n\tby d01av05.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id\n\ts8Q9a7wH002655 for <dev@dpdk.org>; Fri, 26 Sep 2014 05:36:07 -0400", "from localhost.localdomain ([9.186.57.14])\n\tby rescrl1.research.ibm.com (IBM Domino Release 9.0.1)\n\twith ESMTP id 2014092617352131-312550 ;\n\tFri, 26 Sep 2014 17:35:21 +0800 " ], "From": "Chao Zhu <bjzhuc@cn.ibm.com>", "To": "dev@dpdk.org", "Date": "Fri, 26 Sep 2014 05:36:18 -0400", "Message-Id": "<1411724186-8036-5-git-send-email-bjzhuc@cn.ibm.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com>", "References": "<1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com>", "X-MIMETrack": "Itemize by SMTP Server on\n\trescrl1/Research/Affiliated/IBM(Release\n\t9.0.1|October 14, 2013) at 2014/09/26 17:35:21,\n\tSerialize by Router on D01HUB02/01/H/IBM(Release 8.5.3FP2\n\tZX853FP2HF5|February, 2013) at 09/26/2014 05:36:06,\n\tSerialize complete at 09/26/2014 05:36:06", "X-TM-AS-MML": "disable", "X-Content-Scanned": "Fidelis XPS MAILER", "x-cbid": "14092609-5806-0000-0000-00000098F229", "Subject": "[dpdk-dev] [PATCH 04/12] Add CPU cycle operations for IBM Power\n\tarchitecture", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "IBM Power architecture doesn't have TSC register to get CPU cycles. This\npatch implements the time base register read instead of TSC register of\nx86 on IBM Power architecture.\n\nSigned-off-by: Chao Zhu <bjzhuc@cn.ibm.com>\n---\n .../common/include/powerpc/arch/rte_cycles_arch.h | 67 ++++++++++++++++++++\n 1 files changed, 67 insertions(+), 0 deletions(-)\n create mode 100644 lib/librte_eal/common/include/powerpc/arch/rte_cycles_arch.h", "diff": "diff --git a/lib/librte_eal/common/include/powerpc/arch/rte_cycles_arch.h b/lib/librte_eal/common/include/powerpc/arch/rte_cycles_arch.h\nnew file mode 100644\nindex 0000000..faae7a6\n--- /dev/null\n+++ b/lib/librte_eal/common/include/powerpc/arch/rte_cycles_arch.h\n@@ -0,0 +1,67 @@\n+/*\n+ * BSD LICENSE\n+ *\n+ * Copyright (C) IBM Corporation 2014.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of IBM Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+*/\n+\n+#ifndef _RTE_CYCLES_ARCH_H_\n+#define _RTE_CYCLES_ARCH_H_\n+\n+#include <stdint.h>\n+\n+/**\n+ * Read the time base register.\n+ *\n+ * @return\n+ * The time base for this lcore.\n+ */\n+static inline uint64_t\n+rte_arch_rdtsc(void)\n+{\n+\tunion {\n+\t\tuint64_t tsc_64;\n+\t\tstruct {\n+\t\t\tuint32_t hi_32;\n+\t\t\tuint32_t lo_32;\n+\t\t};\n+\t} tsc;\n+\tuint32_t tmp;\n+\tasm volatile(\n+\t\t\t\"0:\\n\"\n+\t\t\t\"mftbu %[hi32]\\n\"\n+\t\t\t\"mftb %[lo32]\\n\"\n+\t\t\t\"mftbu %[tmp]\\n\"\n+\t\t\t\"cmpw %[tmp],%[hi32]\\n\"\n+\t\t\t\"bne 0b\\n\"\n+\t\t\t: [hi32] \"=r\"(tsc.hi_32), [lo32] \"=r\"(tsc.lo_32), [tmp] \"=r\"(tmp)\n+\t\t );\n+\treturn tsc.tsc_64;\n+}\n+#endif /* _RTE_CYCLES_ARCH_H_ */\n+\n", "prefixes": [ "dpdk-dev", "04/12" ] }