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GET /api/patches/57559/?format=api
{ "id": 57559, "url": "https://patches.dpdk.org/api/patches/57559/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com", "date": "2019-08-08T08:22:09", "name": "[19.11,V3,04/12] net/e1000: fix Tx descriptor status api (em)", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2807f048ea487311c7ae84bda8d0f808ae355c9f", "submitter": { "id": 897, "url": "https://patches.dpdk.org/api/people/897/?format=api", "name": "Thierry Herbelot", "email": "thierry.herbelot@6wind.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com/mbox/", "series": [ { "id": 5981, "url": "https://patches.dpdk.org/api/series/5981/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5981", "date": "2019-08-08T08:22:05", "name": "Miscellaneous fixes", "version": 3, "mbox": "https://patches.dpdk.org/series/5981/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/57559/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/57559/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9BFB42C2F;\n\tThu, 8 Aug 2019 10:23:04 +0200 (CEST)", "from mail-wr1-f67.google.com (mail-wr1-f67.google.com\n\t[209.85.221.67]) by dpdk.org (Postfix) with ESMTP id BAFD02B87\n\tfor <dev@dpdk.org>; Thu, 8 Aug 2019 10:22:55 +0200 (CEST)", "by mail-wr1-f67.google.com with SMTP id p17so93966558wrf.11\n\tfor <dev@dpdk.org>; Thu, 08 Aug 2019 01:22:55 -0700 (PDT)", "from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com.\n\t[62.23.145.78]) by smtp.gmail.com with ESMTPSA id\n\tt13sm111437018wrr.0.2019.08.08.01.22.54\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 08 Aug 2019 01:22:54 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; \n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=kjmIHGsCfgqSzCSWzLj6cccbRySma6yWkdPueL4fIXk=;\n\tb=XrSoM7sWYMW5j5IWtXBl1iCLMJlzGsHmiPbeDmS+43JpPLJpeYOrefDDIrCks7+8wk\n\t8jdWKXHmpCOGSEaoT12mYxvsITzrVJgH8i0aCo6uLXo66qkj2rorfEgaLATy5/7otaZ2\n\th4+A5222xF43dswxLL2QWoK+CVMHj9cc8nZosENMtkMxyvLkPjThUYTcbJdKKRSMxDwU\n\tf58t7bGrgoE0mqC5xA3eEK2S8Rg5QbHdgDUlvjCfZlQZEbhhlSocDfpz8eXg/w582jKZ\n\tUHqMhvuwjSxi4IKqMnlbDj9c8zoB5FIvXJEzhIEhZecJEeDTvCIQ58j5oVnrx/RcvV5S\n\tgxCw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=kjmIHGsCfgqSzCSWzLj6cccbRySma6yWkdPueL4fIXk=;\n\tb=UXK1X8IeGoPnh5HbxOiNWmUQxJCFavLMb92aJNQdbtvUNs3bWPFK6GRgs/5ttRjXCH\n\tvzqwWKVWEGsRCIYGAX0o0Ec/Redys4rvbuut3gwaJ9v0T11LndqJI3+Bd75oMESdgb13\n\tWp/cPKRRUFk9Inu6wlYms5WmFZBuRaojBSLKYUY+Ny6iLRiw2S0Ol1atVGscitGBd6Eh\n\tnUYaD0F1Q7dvhmzWgUpQvbFMvWPNH4WQXV3cvdiYX8vHQgGWmTCH5Yz59+ZevgDQJrZs\n\tdxHCYak/b3AbeFpoDRRZTNtigTLyfmOv1A9ghZcxMkb5TTnXIVkguO7tbDEWTO4ixhM0\n\taDHw==", "X-Gm-Message-State": "APjAAAWF5IbJqSSyhpTUJwqYpKbZIcaTXCPDLkLwT6FLqL9UV2GLrAk5\n\t7YHXHV/VfrUTLN5W+8ip2iA84o37cg==", "X-Google-Smtp-Source": "APXvYqxO0ia4eDa3gMWwuBVnKXeLBonG7tjHczT9hRAeiuCufZzH1B+/Ns7ex3eM0XPhYNEuvk5fKw==", "X-Received": "by 2002:adf:ef10:: with SMTP id e16mr2981012wro.33.1565252575217;\n\tThu, 08 Aug 2019 01:22:55 -0700 (PDT)", "From": "Thierry Herbelot <thierry.herbelot@6wind.com>", "To": "dev@dpdk.org", "Cc": "Olivier Matz <olivier.matz@6wind.com>, stable@dpdk.org,\n\tThomas Monjalon <thomas@monjalon.net>", "Date": "Thu, 8 Aug 2019 10:22:09 +0200", "Message-Id": "<60cc9d06e52d4a574be950720c37fd0dc6abc55f.1565252336.git.thierry.herbelot@6wind.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": [ "<cover.1565252336.git.thierry.herbelot@6wind.com>", "<cover.1565252336.git.thierry.herbelot@6wind.com>" ], "References": [ "<cover.1565252336.git.thierry.herbelot@6wind.com>", "<cover.1565190405.git.thierry.herbelot@6wind.com>\n\t<cover.1565252336.git.thierry.herbelot@6wind.com>" ], "Subject": "[dpdk-dev] [PATCH 19.11 V3 04/12] net/e1000: fix Tx descriptor\n\tstatus api (em)", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Olivier Matz <olivier.matz@6wind.com>\n\nThe Tx descriptor status api was not behaving as expected. This API is\nused to inspect the content of the descriptors in the Tx ring to\ndetermine the length of the Tx queue.\n\nSince the software advances the tail pointer and the hardware advances\nthe head pointer, the Tx queue is located before txq->tx_tail in the\nring. Therefore, a call to rte_eth_tx_descriptor_status(..., offset=20)\nshould inspect the 20th descriptor before the tail, not after.\n\nAs before, we still need to take care about only checking descriptors\nthat have the RS bit.\n\nAdditionally, we can avoid an access to the ring if offset is greater or\nequal to nb_tx_desc - nb_tx_free.\n\nFixes: b9082317cab3 (\"net/e1000: implement descriptor status API (em)\")\nCc: stable@dpdk.org\n\nSigned-off-by: Olivier Matz <olivier.matz@6wind.com>\n---\n drivers/net/e1000/em_rxtx.c | 33 +++++++++++++++++++++++----------\n 1 file changed, 23 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c\nindex 5925e490641b..3061998c7768 100644\n--- a/drivers/net/e1000/em_rxtx.c\n+++ b/drivers/net/e1000/em_rxtx.c\n@@ -152,6 +152,7 @@ struct em_tx_queue {\n \tuint64_t tx_ring_phys_addr; /**< TX ring DMA address. */\n \tstruct em_tx_entry *sw_ring; /**< virtual address of SW ring. */\n \tvolatile uint32_t *tdt_reg_addr; /**< Address of TDT register. */\n+\tvolatile uint32_t *tdh_reg_addr; /**< Address of TDH register. */\n \tuint16_t nb_tx_desc; /**< number of TX descriptors. */\n \tuint16_t tx_tail; /**< Current value of TDT register. */\n \t/**< Start freeing TX buffers if there are less free descriptors than\n@@ -1304,6 +1305,7 @@ eth_em_tx_queue_setup(struct rte_eth_dev *dev,\n \ttxq->port_id = dev->data->port_id;\n \n \ttxq->tdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDT(queue_idx));\n+\ttxq->tdh_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDH(queue_idx));\n \ttxq->tx_ring_phys_addr = tz->iova;\n \ttxq->tx_ring = (struct e1000_data_desc *) tz->addr;\n \n@@ -1557,22 +1559,33 @@ eth_em_tx_descriptor_status(void *tx_queue, uint16_t offset)\n {\n \tstruct em_tx_queue *txq = tx_queue;\n \tvolatile uint8_t *status;\n-\tuint32_t desc;\n+\tint32_t desc, dd;\n \n \tif (unlikely(offset >= txq->nb_tx_desc))\n \t\treturn -EINVAL;\n+\tif (offset >= txq->nb_tx_desc - txq->nb_tx_free)\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n \n-\tdesc = txq->tx_tail + offset;\n-\t/* go to next desc that has the RS bit */\n-\tdesc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *\n-\t\ttxq->tx_rs_thresh;\n-\tif (desc >= txq->nb_tx_desc) {\n-\t\tdesc -= txq->nb_tx_desc;\n-\t\tif (desc >= txq->nb_tx_desc)\n-\t\t\tdesc -= txq->nb_tx_desc;\n+\tdesc = txq->tx_tail - offset - 1;\n+\tif (desc < 0)\n+\t\tdesc += txq->nb_tx_desc;\n+\n+\t/* offset is too small, no other way than reading PCI reg */\n+\tif (unlikely(offset < txq->tx_rs_thresh)) {\n+\t\tint16_t tx_head, queue_size;\n+\t\ttx_head = e1000_read_addr(txq->tdh_reg_addr);\n+\t\tqueue_size = txq->tx_tail - tx_head;\n+\t\tif (queue_size < 0)\n+\t\t\tqueue_size += txq->nb_tx_desc;\n+\t\treturn queue_size > offset ? RTE_ETH_TX_DESC_FULL :\n+\t\t\tRTE_ETH_TX_DESC_DONE;\n \t}\n \n-\tstatus = &txq->tx_ring[desc].upper.fields.status;\n+\t/* index of the dd bit to look at */\n+\tdd = (desc / txq->tx_rs_thresh + 1) * txq->tx_rs_thresh - 1;\n+\tdd = txq->sw_ring[dd].last_id;\n+\n+\tstatus = &txq->tx_ring[dd].upper.fields.status;\n \tif (*status & E1000_TXD_STAT_DD)\n \t\treturn RTE_ETH_TX_DESC_DONE;\n \n", "prefixes": [ "19.11", "V3", "04/12" ] }