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GET /api/patches/57300/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 57300,
    "url": "https://patches.dpdk.org/api/patches/57300/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1564556752-19257-3-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1564556752-19257-3-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1564556752-19257-3-git-send-email-rosen.xu@intel.com",
    "date": "2019-07-31T07:05:42",
    "name": "[02/12] raw/ifpga_rawdev/base: add irq support",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "58039252a9798df8d2c229d032d306f7edb0c8b4",
    "submitter": {
        "id": 946,
        "url": "https://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1564556752-19257-3-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 5846,
            "url": "https://patches.dpdk.org/api/series/5846/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5846",
            "date": "2019-07-31T07:05:40",
            "name": "Add PCIe AER disable and IRQ support for ipn3ke",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/5846/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/57300/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/57300/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 351B31BE06;\n\tWed, 31 Jul 2019 09:05:11 +0200 (CEST)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 34D3C1B957\n\tfor <dev@dpdk.org>; Wed, 31 Jul 2019 09:05:09 +0200 (CEST)",
            "from orsmga006.jf.intel.com ([10.7.209.51])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t31 Jul 2019 00:05:08 -0700",
            "from dpdk-rosen-02.sh.intel.com ([10.67.111.116])\n\tby orsmga006.jf.intel.com with ESMTP; 31 Jul 2019 00:05:07 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.64,329,1559545200\"; d=\"scan'208\";a=\"177214713\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "ferruh.yigit@intel.com, tianfei.zhang@intel.com, rosen.xu@intel.com,\n\tandy.pei@intel.com, david.lomartire@intel.com, qi.z.zhang@intel.com",
        "Date": "Wed, 31 Jul 2019 15:05:42 +0800",
        "Message-Id": "<1564556752-19257-3-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1564556752-19257-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1564556752-19257-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 02/12] raw/ifpga_rawdev/base: add irq support",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Tianfei zhang <tianfei.zhang@intel.com>\n\nAdd irq support for ifpga FME globle error, port error and uint unit.\nWe implmented this feature by vfio interrupt mechanism.\n\nSigned-off-by: Tianfei zhang <tianfei.zhang@intel.com>\n---\n drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c | 61 +++++++++++++++++++++++\n drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c   | 22 ++++++++\n drivers/raw/ifpga_rawdev/base/ifpga_port.c        | 20 ++++++++\n drivers/raw/ifpga_rawdev/base/ifpga_port_error.c  | 21 ++++++++\n 4 files changed, 124 insertions(+)",
    "diff": "diff --git a/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c b/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c\nindex 63c8bcc..6b942e6 100644\n--- a/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c\n+++ b/drivers/raw/ifpga_rawdev/base/ifpga_feature_dev.c\n@@ -3,6 +3,7 @@\n  */\n \n #include <sys/ioctl.h>\n+#include <rte_vfio.h>\n \n #include \"ifpga_feature_dev.h\"\n \n@@ -331,3 +332,63 @@ int port_hw_init(struct ifpga_port_hw *port)\n \tport_hw_uinit(port);\n \treturn ret;\n }\n+\n+/*\n+ * FIXME: we should get msix vec count during pci enumeration instead of\n+ * below hardcode value.\n+ */\n+#define FPGA_MSIX_VEC_COUNT\t20\n+/* irq set buffer length for interrupt */\n+#define MSIX_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \\\n+\t\t\t\tsizeof(int) * FPGA_MSIX_VEC_COUNT)\n+\n+/* only support msix for now*/\n+static int vfio_msix_enable_block(s32 vfio_dev_fd, unsigned int vec_start,\n+\t\t\t\t  unsigned int count, s32 *fds)\n+{\n+\tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n+\tstruct vfio_irq_set *irq_set;\n+\tint len, ret;\n+\tint *fd_ptr;\n+\n+\tlen = sizeof(irq_set_buf);\n+\n+\tirq_set = (struct vfio_irq_set *)irq_set_buf;\n+\tirq_set->argsz = len;\n+\tirq_set->count = count;\n+\tirq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |\n+\t\t\t\tVFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\tirq_set->start = vec_start;\n+\n+\tfd_ptr = (int *)&irq_set->data;\n+\tmemcpy(fd_ptr, fds, sizeof(int) * count);\n+\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tif (ret)\n+\t\tprintf(\"Error enabling MSI-X interrupts\\n\");\n+\n+\treturn ret;\n+}\n+\n+int fpga_msix_set_block(struct ifpga_feature *feature, unsigned int start,\n+\t\t\tunsigned int count, s32 *fds)\n+{\n+\tstruct feature_irq_ctx *ctx = feature->ctx;\n+\tunsigned int i;\n+\tint ret;\n+\n+\tif (start >= feature->ctx_num || start + count > feature->ctx_num)\n+\t\treturn -EINVAL;\n+\n+\t/* assume that each feature has continuous vector space in msix*/\n+\tret = vfio_msix_enable_block(feature->vfio_dev_fd,\n+\t\t\t\t     ctx[start].idx, count, fds);\n+\tif (!ret) {\n+\t\tfor (i = 0; i < count; i++)\n+\t\t\tctx[i].eventfd = fds[i];\n+\t}\n+\n+\treturn ret;\n+}\n+\ndiff --git a/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c b/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c\nindex 3794564..068f52c 100644\n--- a/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c\n+++ b/drivers/raw/ifpga_rawdev/base/ifpga_fme_error.c\n@@ -373,9 +373,31 @@ static int fme_global_error_set_prop(struct ifpga_feature *feature,\n \treturn -ENOENT;\n }\n \n+static int fme_global_err_set_irq(struct ifpga_feature *feature, void *irq_set)\n+{\n+\tstruct fpga_fme_err_irq_set *err_irq_set =\n+\t\t\t(struct fpga_fme_err_irq_set *)irq_set;\n+\tstruct ifpga_fme_hw *fme;\n+\tint ret;\n+\n+\tfme = (struct ifpga_fme_hw *)feature->parent;\n+\n+\tspinlock_lock(&fme->lock);\n+\tif (!(fme->capability & FPGA_FME_CAP_ERR_IRQ)) {\n+\t\tspinlock_unlock(&fme->lock);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tret = fpga_msix_set_block(feature, 0, 1, &err_irq_set->evtfd);\n+\tspinlock_unlock(&fme->lock);\n+\n+\treturn ret;\n+}\n+\n struct ifpga_feature_ops fme_global_err_ops = {\n \t.init = fme_global_error_init,\n \t.uinit = fme_global_error_uinit,\n \t.get_prop = fme_global_error_get_prop,\n \t.set_prop = fme_global_error_set_prop,\n+\t.set_irq = fme_global_err_set_irq,\n };\ndiff --git a/drivers/raw/ifpga_rawdev/base/ifpga_port.c b/drivers/raw/ifpga_rawdev/base/ifpga_port.c\nindex 6c41164..56b04a6 100644\n--- a/drivers/raw/ifpga_rawdev/base/ifpga_port.c\n+++ b/drivers/raw/ifpga_rawdev/base/ifpga_port.c\n@@ -384,9 +384,29 @@ static void port_uint_uinit(struct ifpga_feature *feature)\n \tdev_info(NULL, \"PORT UINT UInit.\\n\");\n }\n \n+static int port_uint_set_irq(struct ifpga_feature *feature, void *irq_set)\n+{\n+\tstruct fpga_uafu_irq_set *uafu_irq_set = irq_set;\n+\tstruct ifpga_port_hw *port = feature->parent;\n+\tint ret;\n+\n+\tspinlock_lock(&port->lock);\n+\tif (!(port->capability & FPGA_PORT_CAP_UAFU_IRQ)) {\n+\t\tspinlock_unlock(&port->lock);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tret = fpga_msix_set_block(feature, uafu_irq_set->start,\n+\t\t\t\t  uafu_irq_set->count, uafu_irq_set->evtfds);\n+\tspinlock_unlock(&port->lock);\n+\n+\treturn ret;\n+}\n+\n struct ifpga_feature_ops ifpga_rawdev_port_uint_ops = {\n \t.init = port_uint_init,\n \t.uinit = port_uint_uinit,\n+\t.set_irq = port_uint_set_irq,\n };\n \n static int port_afu_init(struct ifpga_feature *feature)\ndiff --git a/drivers/raw/ifpga_rawdev/base/ifpga_port_error.c b/drivers/raw/ifpga_rawdev/base/ifpga_port_error.c\nindex 138284e..8aef7d7 100644\n--- a/drivers/raw/ifpga_rawdev/base/ifpga_port_error.c\n+++ b/drivers/raw/ifpga_rawdev/base/ifpga_port_error.c\n@@ -136,9 +136,30 @@ static int port_error_set_prop(struct ifpga_feature *feature,\n \treturn -ENOENT;\n }\n \n+static int port_error_set_irq(struct ifpga_feature *feature, void *irq_set)\n+{\n+\tstruct fpga_port_err_irq_set *err_irq_set = irq_set;\n+\tstruct ifpga_port_hw *port;\n+\tint ret;\n+\n+\tport = feature->parent;\n+\n+\tspinlock_lock(&port->lock);\n+\tif (!(port->capability & FPGA_PORT_CAP_ERR_IRQ)) {\n+\t\tspinlock_unlock(&port->lock);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tret = fpga_msix_set_block(feature, 0, 1, &err_irq_set->evtfd);\n+\tspinlock_unlock(&port->lock);\n+\n+\treturn ret;\n+}\n+\n struct ifpga_feature_ops ifpga_rawdev_port_error_ops = {\n \t.init = port_error_init,\n \t.uinit = port_error_uinit,\n \t.get_prop = port_error_get_prop,\n \t.set_prop = port_error_set_prop,\n+\t.set_irq = port_error_set_irq,\n };\n",
    "prefixes": [
        "02/12"
    ]
}