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GET /api/patches/57299/?format=api
{ "id": 57299, "url": "https://patches.dpdk.org/api/patches/57299/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1564556752-19257-2-git-send-email-rosen.xu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1564556752-19257-2-git-send-email-rosen.xu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1564556752-19257-2-git-send-email-rosen.xu@intel.com", "date": "2019-07-31T07:05:41", "name": "[01/12] net/i40e: i40e support ipn3ke FPGA port bonding", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1919fc20bd2a33f75bcb2c80d5d4f3eb96f98ffb", "submitter": { "id": 946, "url": "https://patches.dpdk.org/api/people/946/?format=api", "name": "Xu, Rosen", "email": "rosen.xu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1564556752-19257-2-git-send-email-rosen.xu@intel.com/mbox/", "series": [ { "id": 5846, "url": "https://patches.dpdk.org/api/series/5846/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5846", "date": "2019-07-31T07:05:40", "name": "Add PCIe AER disable and IRQ support for ipn3ke", "version": 1, "mbox": "https://patches.dpdk.org/series/5846/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/57299/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/57299/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D85F814E8;\n\tWed, 31 Jul 2019 09:05:07 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 70C682C5\n\tfor <dev@dpdk.org>; Wed, 31 Jul 2019 09:05:06 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t31 Jul 2019 00:05:06 -0700", "from dpdk-rosen-02.sh.intel.com ([10.67.111.116])\n\tby orsmga006.jf.intel.com with ESMTP; 31 Jul 2019 00:05:04 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,329,1559545200\"; d=\"scan'208\";a=\"177214455\"", "From": "Rosen Xu <rosen.xu@intel.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com, tianfei.zhang@intel.com, rosen.xu@intel.com,\n\tandy.pei@intel.com, david.lomartire@intel.com, qi.z.zhang@intel.com", "Date": "Wed, 31 Jul 2019 15:05:41 +0800", "Message-Id": "<1564556752-19257-2-git-send-email-rosen.xu@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1564556752-19257-1-git-send-email-rosen.xu@intel.com>", "References": "<1564556752-19257-1-git-send-email-rosen.xu@intel.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 01/12] net/i40e: i40e support ipn3ke FPGA port\n\tbonding", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "In ipn3ke, each FPGA network side port bonding to an i40e pf,\neach i40e pf link status should get data from FPGA network,\nside port. This patch provide bonding relationship.\n\nSigned-off-by: Rosen Xu <rosen.xu@intel.com>\n---\n drivers/net/i40e/base/i40e_type.h | 3 +++\n drivers/net/i40e/i40e_ethdev.c | 34 ++++++++++++++++++++++++++++++++--\n drivers/net/i40e/rte_pmd_i40e.h | 4 ++++\n 3 files changed, 39 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h\nindex 112866b..a4d46d8 100644\n--- a/drivers/net/i40e/base/i40e_type.h\n+++ b/drivers/net/i40e/base/i40e_type.h\n@@ -660,6 +660,9 @@ struct i40e_hw {\n \tstruct i40e_nvm_info nvm;\n \tstruct i40e_fc_info fc;\n \n+\t//switch device\n+\tstruct rte_eth_dev *switch_dev;\n+\n \t/* pci info */\n \tu16 device_id;\n \tu16 vendor_id;\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 4e40b7a..e981256 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -1312,6 +1312,9 @@ static inline void i40e_config_automask(struct i40e_pf *pf)\n \thw->adapter_stopped = 0;\n \thw->adapter_closed = 0;\n \n+\t//Update switch device pointer\n+\thw->switch_dev = NULL;\n+\n \t/*\n \t * Switch Tag value should not be identical to either the First Tag\n \t * or Second Tag values. So set something other than common Ethertype\n@@ -2782,6 +2785,20 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \t}\n }\n \n+void\n+i40e_set_switch_dev(struct rte_eth_dev *i40e_dev,\n+struct rte_eth_dev *switch_dev)\n+{\n+\tstruct i40e_hw *hw;\n+\n+\tif (!i40e_dev)\n+\t\treturn;\n+\n+\thw = I40E_DEV_PRIVATE_TO_HW(i40e_dev->data->dev_private);\n+\n+\thw->switch_dev = switch_dev;\n+}\n+\n int\n i40e_dev_link_update(struct rte_eth_dev *dev,\n \t\t int wait_to_complete)\n@@ -2790,6 +2807,7 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \tstruct rte_eth_link link;\n \tbool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;\n \tint ret;\n+\tstruct rte_eth_dev *switch_ethdev;\n \n \tmemset(&link, 0, sizeof(link));\n \n@@ -2803,6 +2821,18 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \telse\n \t\tupdate_link_aq(hw, &link, enable_lse, wait_to_complete);\n \n+\tswitch_ethdev = hw->switch_dev;\n+\tif (switch_ethdev) {\n+\t\trte_eth_linkstatus_get(switch_ethdev, &link);\n+\t\tprintf(\">>>>>>>>>>>>>i40e_update_link 5 link.link_status %d\\n\",\n+\t\t\tlink.link_status);\n+\t} else {\n+\t\tlink.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\t\tlink.link_autoneg = ETH_LINK_SPEED_FIXED;\n+\t\tlink.link_speed = ETH_SPEED_NUM_25G;\n+\t\tlink.link_status = 0;\n+\t}\n+\n \tret = rte_eth_linkstatus_set(dev, &link);\n \ti40e_notify_all_vfs_link_status(dev);\n \n@@ -12541,7 +12571,7 @@ struct i40e_customized_pctype*\n *\tb.\tOld_filter = 10 (Stag_Inner_Vlan)\n *\tc.\tNew_filter = 0x10\n *\td.\tTR bit = 0xff (optional, not used here)\n- *\te.\tBuffer – 2 entries:\n+ *\te.\tBuffer - 2 entries:\n *\t\ti.\tByte 0 = 8 (outer vlan FV index).\n *\t\t\tByte 1 = 0 (rsv)\n *\t\t\tByte 2-3 = 0x0fff\n@@ -12555,7 +12585,7 @@ struct i40e_customized_pctype*\n *\ta.\tValid_flags.replace_cloud = 1\n *\tb.\tOld_filter = 1 (instead of outer IP)\n *\tc.\tNew_filter = 0x10\n- *\td.\tBuffer – 2 entries:\n+ *\td.\tBuffer - 2 entries:\n *\t\ti.\tByte 0 = 0x80 | 7 (valid | Stag).\n *\t\t\tByte 1-3 = 0 (rsv)\n *\t\tii.\tByte 8 = 0x80 | 0x10 (valid | new l1 filter step1)\ndiff --git a/drivers/net/i40e/rte_pmd_i40e.h b/drivers/net/i40e/rte_pmd_i40e.h\nindex faac9e2..9d77c85 100644\n--- a/drivers/net/i40e/rte_pmd_i40e.h\n+++ b/drivers/net/i40e/rte_pmd_i40e.h\n@@ -1061,4 +1061,8 @@ int rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype,\n \treturn 0;\n }\n \n+void\n+i40e_set_switch_dev(struct rte_eth_dev *i40e_dev,\n+struct rte_eth_dev *switch_dev);\n+\n #endif /* _PMD_I40E_H_ */\n", "prefixes": [ "01/12" ] }