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GET /api/patches/56838/?format=api
{ "id": 56838, "url": "https://patches.dpdk.org/api/patches/56838/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1563786795-14027-11-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563786795-14027-11-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563786795-14027-11-git-send-email-matan@mellanox.com", "date": "2019-07-22T09:12:57", "name": "[10/28] net/mlx5: modify advanced RxQ object using new API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1ea125a40d75ae4537bd1bb2906219900a5b554d", "submitter": { "id": 796, "url": "https://patches.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1563786795-14027-11-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5639, "url": "https://patches.dpdk.org/api/series/5639/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5639", "date": "2019-07-22T09:12:48", "name": "net/mlx5: support LRO", "version": 1, "mbox": "https://patches.dpdk.org/series/5639/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/56838/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/56838/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EE8571BE44;\n\tMon, 22 Jul 2019 11:13:59 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 9E0CD1BDF5\n\tfor <dev@dpdk.org>; Mon, 22 Jul 2019 11:13:29 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 22 Jul 2019 12:13:23 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6M9DMjZ010084;\n\tMon, 22 Jul 2019 12:13:23 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 22 Jul 2019 09:12:57 +0000", "Message-Id": "<1563786795-14027-11-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "References": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 10/28] net/mlx5: modify advanced RxQ object using\n\tnew API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Dekel Peled <dekelp@mellanox.com>\n\nImplement function mlx5_devx_cmd_modify_rq() to modify RQ.\nAdd related structs in mlx5.h and mlx5_prm.h.\n\nSigned-off-by: Dekel Peled <dekelp@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5.h | 16 +++++++++++++\n drivers/net/mlx5/mlx5_devx_cmds.c | 50 +++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_prm.h | 29 +++++++++++++++++++++++\n 3 files changed, 95 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 7ad6687..fbd1311 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -306,6 +306,20 @@ struct mlx5_devx_create_rq_attr {\n \tstruct mlx5_devx_wq_attr wq_attr;\n };\n \n+/* Modify RQ attributes structure, used by modify RQ operation. */\n+struct mlx5_devx_modify_rq_attr {\n+\tuint32_t rqn:24;\n+\tuint32_t rq_state:4; /* Current RQ state. */\n+\tuint32_t state:4; /* Required RQ state. */\n+\tuint32_t scatter_fcs:1;\n+\tuint32_t vsd:1;\n+\tuint32_t counter_set_id:8;\n+\tuint32_t hairpin_peer_sq:24;\n+\tuint32_t hairpin_peer_vhca:16;\n+\tuint64_t modify_bitmask;\n+\tuint32_t lwm:16; /* Contained WQ lwm. */\n+};\n+\n /**\n * Type of object being allocated.\n */\n@@ -794,5 +808,7 @@ int mlx5_devx_cmd_qp_query_tis_td(struct ibv_qp *qp, uint32_t tis_num,\n struct mlx5_devx_obj *mlx5_devx_cmd_create_rq(struct ibv_context *ctx,\n \t\t\t\tstruct mlx5_devx_create_rq_attr *rq_attr,\n \t\t\t\tint socket);\n+int mlx5_devx_cmd_modify_rq(struct mlx5_devx_obj *rq,\n+\t\t\t struct mlx5_devx_modify_rq_attr *rq_attr);\n \n #endif /* RTE_PMD_MLX5_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_devx_cmds.c b/drivers/net/mlx5/mlx5_devx_cmds.c\nindex f68c94b..e8953bb 100644\n--- a/drivers/net/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/net/mlx5/mlx5_devx_cmds.c\n@@ -526,3 +526,53 @@ struct mlx5_devx_obj *\n \trq->id = MLX5_GET(create_rq_out, out, rqn);\n \treturn rq;\n }\n+\n+/**\n+ * Modify RQ using DevX API.\n+ *\n+ * @param[in] rq\n+ * Pointer to RQ object structure.\n+ * @param [in] rq_attr\n+ * Pointer to modify RQ attributes structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_devx_cmd_modify_rq(struct mlx5_devx_obj *rq,\n+\t\t\tstruct mlx5_devx_modify_rq_attr *rq_attr)\n+{\n+\tuint32_t in[MLX5_ST_SZ_DW(modify_rq_in)] = {0};\n+\tuint32_t out[MLX5_ST_SZ_DW(modify_rq_out)] = {0};\n+\tvoid *rq_ctx, *wq_ctx;\n+\tint ret;\n+\n+\tMLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ);\n+\tMLX5_SET(modify_rq_in, in, rq_state, rq_attr->rq_state);\n+\tMLX5_SET(modify_rq_in, in, rqn, rq->id);\n+\tMLX5_SET64(modify_rq_in, in, modify_bitmask, rq_attr->modify_bitmask);\n+\trq_ctx = MLX5_ADDR_OF(modify_rq_in, in, ctx);\n+\tMLX5_SET(rqc, rq_ctx, state, rq_attr->state);\n+\tif (rq_attr->modify_bitmask &\n+\t\t\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS)\n+\t\tMLX5_SET(rqc, rq_ctx, scatter_fcs, rq_attr->scatter_fcs);\n+\tif (rq_attr->modify_bitmask & MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD)\n+\t\tMLX5_SET(rqc, rq_ctx, vsd, rq_attr->vsd);\n+\tif (rq_attr->modify_bitmask &\n+\t\t\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID)\n+\t\tMLX5_SET(rqc, rq_ctx, counter_set_id, rq_attr->counter_set_id);\n+\tMLX5_SET(rqc, rq_ctx, hairpin_peer_sq, rq_attr->hairpin_peer_sq);\n+\tMLX5_SET(rqc, rq_ctx, hairpin_peer_vhca, rq_attr->hairpin_peer_vhca);\n+\tif (rq_attr->modify_bitmask & MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_WQ_LWM) {\n+\t\twq_ctx = MLX5_ADDR_OF(rqc, rq_ctx, wq);\n+\t\tMLX5_SET(wq, wq_ctx, lwm, rq_attr->lwm);\n+\t}\n+\tret = mlx5_glue->devx_obj_modify(rq->obj, in, sizeof(in),\n+\t\t\t\t\t out, sizeof(out));\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Failed to modify RQ using DevX\");\n+\t\trte_errno = errno;\n+\t\treturn -errno;\n+\t}\n+\treturn ret;\n+}\ndiff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h\nindex fbf00a0..7ec709b 100644\n--- a/drivers/net/mlx5/mlx5_prm.h\n+++ b/drivers/net/mlx5/mlx5_prm.h\n@@ -628,6 +628,7 @@ enum {\n \tMLX5_CMD_OP_CREATE_MKEY = 0x200,\n \tMLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,\n \tMLX5_CMD_OP_CREATE_RQ = 0x908,\n+\tMLX5_CMD_OP_MODIFY_RQ = 0x909,\n \tMLX5_CMD_OP_QUERY_TIS = 0x915,\n \tMLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,\n \tMLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,\n@@ -1378,6 +1379,34 @@ struct mlx5_ifc_create_rq_in_bits {\n \tstruct mlx5_ifc_rqc_bits ctx;\n };\n \n+struct mlx5_ifc_modify_rq_out_bits {\n+\tu8 status[0x8];\n+\tu8 reserved_at_8[0x18];\n+\tu8 syndrome[0x20];\n+\tu8 reserved_at_40[0x40];\n+};\n+\n+enum {\n+\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_WQ_LWM = 1ULL << 0,\n+\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,\n+\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,\n+\tMLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,\n+};\n+\n+struct mlx5_ifc_modify_rq_in_bits {\n+\tu8 opcode[0x10];\n+\tu8 uid[0x10];\n+\tu8 reserved_at_20[0x10];\n+\tu8 op_mod[0x10];\n+\tu8 rq_state[0x4];\n+\tu8 reserved_at_44[0x4];\n+\tu8 rqn[0x18];\n+\tu8 reserved_at_60[0x20];\n+\tu8 modify_bitmask[0x40];\n+\tu8 reserved_at_c0[0x40];\n+\tstruct mlx5_ifc_rqc_bits ctx;\n+};\n+\n /* CQE format mask. */\n #define MLX5E_CQE_FORMAT_MASK 0xc\n \n", "prefixes": [ "10/28" ] }