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GET /api/patches/55751/?format=api
https://patches.dpdk.org/api/patches/55751/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1561977388-51692-3-git-send-email-andy.pei@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1561977388-51692-3-git-send-email-andy.pei@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1561977388-51692-3-git-send-email-andy.pei@intel.com", "date": "2019-07-01T10:36:27", "name": "[v5,3/4] net/ipn3ke: clear statistics when init and start dev", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8120e5d8c30772dbba25b0c1452aae47cd29dc04", "submitter": { "id": 1185, "url": "https://patches.dpdk.org/api/people/1185/?format=api", "name": "Pei, Andy", "email": "andy.pei@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1561977388-51692-3-git-send-email-andy.pei@intel.com/mbox/", "series": [ { "id": 5241, "url": "https://patches.dpdk.org/api/series/5241/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5241", "date": "2019-07-01T10:36:25", "name": "[v5,1/4] net/ipn3ke: add new register address", "version": 5, "mbox": "https://patches.dpdk.org/series/5241/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/55751/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/55751/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0448E5680;\n\tMon, 1 Jul 2019 12:57:31 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id 846C55680\n\tfor <dev@dpdk.org>; Mon, 1 Jul 2019 12:57:21 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t01 Jul 2019 03:44:19 -0700", "from dipei-st-npg.sh.intel.com ([10.67.110.220])\n\tby fmsmga002.fm.intel.com with ESMTP; 01 Jul 2019 03:44:18 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,439,1557212400\"; d=\"scan'208\";a=\"190208503\"", "From": "Andy Pei <andy.pei@intel.com>", "To": "dev@dpdk.org", "Cc": "andy.pei@intel.com,\n\trosen.xu@intel.com", "Date": "Mon, 1 Jul 2019 18:36:27 +0800", "Message-Id": "<1561977388-51692-3-git-send-email-andy.pei@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1561977388-51692-1-git-send-email-andy.pei@intel.com>", "References": "<1561449612-26372-4-git-send-email-andy.pei@intel.com>\n\t<1561977388-51692-1-git-send-email-andy.pei@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 3/4] net/ipn3ke: clear statistics when init\n\tand start dev", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "clear line side and NIC side statistics registers when HW init and\nuinit, and when dev start.\n\nFixes: c01c748e4ae6 (\"net/ipn3ke: add new driver\")\nCc: rosen.xu@intel.com\n\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\n drivers/net/ipn3ke/ipn3ke_ethdev.c | 59 ++++++++++++++++++++++++++++-----\n drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---\n 2 files changed, 74 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c\nindex 8d3084d..27ebfb5 100644\n--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c\n+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c\n@@ -244,11 +244,33 @@\n \t\t\t/* Enable the RX path */\n \t\t\tipn3ke_xmac_rx_enable(hw, i, 1);\n \n-\t\t\t/* Clear all TX statistics counters */\n-\t\t\tipn3ke_xmac_tx_clr_stcs(hw, i, 1);\n+\t\t\t/* Clear NIC side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);\n \n-\t\t\t/* Clear all RX statistics counters */\n-\t\t\tipn3ke_xmac_rx_clr_stcs(hw, i, 1);\n+\t\t\t/* Clear NIC side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear line side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);\n+\n+\t\t\t/* Clear line RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);\n+\t\t}\n+\t} else if (hw->retimer.mac_type ==\n+\t\t\tIFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {\n+\t\t/* Enable inter connect channel */\n+\t\tfor (i = 0; i < hw->port_num; i++) {\n+\t\t\t/* Clear NIC side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear NIC side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear line side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);\n+\n+\t\t\t/* Clear line side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);\n \t\t}\n \t}\n \n@@ -291,11 +313,32 @@\n \t\t\t/* Disable the RX path */\n \t\t\tipn3ke_xmac_rx_disable(hw, i, 1);\n \n-\t\t\t/* Clear all TX statistics counters */\n-\t\t\tipn3ke_xmac_tx_clr_stcs(hw, i, 1);\n+\t\t\t/* Clear NIC side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear NIC side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear line side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);\n+\n+\t\t\t/* Clear line side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);\n+\t\t}\n+\t} else if (hw->retimer.mac_type ==\n+\t\t\tIFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {\n+\t\tfor (i = 0; i < hw->port_num; i++) {\n+\t\t\t/* Clear NIC side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear NIC side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);\n+\n+\t\t\t/* Clear line side TX statistics counters */\n+\t\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);\n \n-\t\t\t/* Clear all RX statistics counters */\n-\t\t\tipn3ke_xmac_rx_clr_stcs(hw, i, 1);\n+\t\t\t/* Clear line side RX statistics counters */\n+\t\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);\n \t\t}\n \t}\n }\ndiff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c\nindex 01ad92e..4456d9d 100644\n--- a/drivers/net/ipn3ke/ipn3ke_representor.c\n+++ b/drivers/net/ipn3ke/ipn3ke_representor.c\n@@ -159,11 +159,30 @@\n \t\t/* Enable the RX path */\n \t\tipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);\n \n-\t\t/* Clear all TX statistics counters */\n-\t\tipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);\n+\t\t/* Clear line side TX statistics counters */\n+\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);\n \n-\t\t/* Clear all RX statistics counters */\n-\t\tipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);\n+\t\t/* Clear line side RX statistics counters */\n+\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);\n+\n+\t\t/* Clear NIC side TX statistics counters */\n+\t\tipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);\n+\n+\t\t/* Clear NIC side RX statistics counters */\n+\t\tipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);\n+\t} else if (hw->retimer.mac_type ==\n+\t\t\t\tIFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {\n+\t\t/* Clear line side TX statistics counters */\n+\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);\n+\n+\t\t/* Clear line side RX statistics counters */\n+\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);\n+\n+\t\t/* Clear NIC side TX statistics counters */\n+\t\tipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);\n+\n+\t\t/* Clear NIC side RX statistics counters */\n+\t\tipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);\n \t}\n \n \tipn3ke_rpst_link_update(dev, 0);\n", "prefixes": [ "v5", "3/4" ] }{ "id": 55751, "url": "