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GET /api/patches/55631/?format=api
{ "id": 55631, "url": "https://patches.dpdk.org/api/patches/55631/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190628182354.228-27-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190628182354.228-27-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190628182354.228-27-pbhagavatula@marvell.com", "date": "2019-06-28T18:23:37", "name": "[v3,26/42] event/octeontx2: add event timer support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e62159752d295ba6d7b4f859db1ccf99794e160b", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190628182354.228-27-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 5227, "url": "https://patches.dpdk.org/api/series/5227/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5227", "date": "2019-06-28T18:23:11", "name": "OCTEONTX2 event device driver", "version": 3, "mbox": "https://patches.dpdk.org/series/5227/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/55631/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/55631/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DB2B51BACD;\n\tFri, 28 Jun 2019 20:25:27 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 9A7ED1B9F0\n\tfor <dev@dpdk.org>; Fri, 28 Jun 2019 20:25:01 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5SILsKQ011627; Fri, 28 Jun 2019 11:25:00 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2tdd77agp1-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tFri, 28 Jun 2019 11:25:00 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 28 Jun 2019 11:24:59 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 28 Jun 2019 11:24:59 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.12])\n\tby maili.marvell.com (Postfix) with ESMTP id 9A5413F7040;\n\tFri, 28 Jun 2019 11:24:57 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=50nHWItAX31rIxFZ3KvX+OUdcPvLZ5wAZqy/mFSibpg=;\n\tb=NbgBhSTBq0lOXwivOpKBldPJcdzYFSVLZVZvafEDF3MxZ1lutiI6Kw3CwIksOOmqsOnj\n\twXdR2MSNT2SOnTL+yhVGuRjZzA/88xn8c9kMn+qfg9OvfL18OzMiWtCvkRZ5dpTywmCW\n\tdU7poj48Orpo5KM913cFoO4QIFaKQuxKhlgZPgQu6LMC0RFJ1ts8A9RpTIBX0wU1RqXk\n\tlWxXI34u4fTuwaTH+iv8bna318WaykjnnbPNvsTu0ipsMWim+7QzxksceJzGTTild2na\n\t9AOjLaiUyEVSpaPlCZ3qc6SvXL1THze1DgZ4CPqnUncEo7flfJ8tEU+WYyzewZCeU4Ir\n\t3Q== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"John\n\tMcNamara\" <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Anatoly Burakov <anatoly.burakov@intel.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 28 Jun 2019 23:53:37 +0530", "Message-ID": "<20190628182354.228-27-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190628182354.228-1-pbhagavatula@marvell.com>", "References": "<20190628182354.228-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-28_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v3 26/42] event/octeontx2: add event timer support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd event timer adapter aka TIM initilization on SSO probe.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n doc/guides/eventdevs/octeontx2.rst | 6 ++\n drivers/event/octeontx2/Makefile | 1 +\n drivers/event/octeontx2/meson.build | 1 +\n drivers/event/octeontx2/otx2_evdev.c | 3 +\n drivers/event/octeontx2/otx2_tim_evdev.c | 78 ++++++++++++++++++++++++\n drivers/event/octeontx2/otx2_tim_evdev.h | 36 +++++++++++\n 6 files changed, 125 insertions(+)\n create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.c\n create mode 100644 drivers/event/octeontx2/otx2_tim_evdev.h", "diff": "diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst\nindex 562a83d07..98d0dfb6f 100644\n--- a/doc/guides/eventdevs/octeontx2.rst\n+++ b/doc/guides/eventdevs/octeontx2.rst\n@@ -28,6 +28,10 @@ Features of the OCTEON TX2 SSO PMD are:\n - Open system with configurable amount of outstanding events limited only by\n DRAM\n - HW accelerated dequeue timeout support to enable power management\n+- HW managed event timers support through TIM, with high precision and\n+ time granularity of 2.5us.\n+- Up to 256 TIM rings aka event timer adapters.\n+- Up to 8 rings traversed in parallel.\n \n Prerequisites and Compilation procedure\n ---------------------------------------\n@@ -102,3 +106,5 @@ Debugging Options\n +===+============+=======================================================+\n | 1 | SSO | --log-level='pmd\\.event\\.octeontx2,8' |\n +---+------------+-------------------------------------------------------+\n+ | 2 | TIM | --log-level='pmd\\.event\\.octeontx2\\.timer,8' |\n+ +---+------------+-------------------------------------------------------+\ndiff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex d6cffc1f6..2290622dd 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -33,6 +33,7 @@ LIBABIVER := 1\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_selftest.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_irq.c\n \ndiff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build\nindex 470564b08..ad7f2e084 100644\n--- a/drivers/event/octeontx2/meson.build\n+++ b/drivers/event/octeontx2/meson.build\n@@ -7,6 +7,7 @@ sources = files('otx2_worker.c',\n \t\t'otx2_evdev.c',\n \t\t'otx2_evdev_irq.c',\n \t\t'otx2_evdev_selftest.c',\n+\t\t'otx2_tim_evdev.c',\n \t\t)\n \n allow_experimental_apis = true\ndiff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex c5a150954..a716167b3 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -15,6 +15,7 @@\n #include \"otx2_evdev_stats.h\"\n #include \"otx2_evdev.h\"\n #include \"otx2_irq.h\"\n+#include \"otx2_tim_evdev.h\"\n \n static inline int\n sso_get_msix_offsets(const struct rte_eventdev *event_dev)\n@@ -1310,6 +1311,7 @@ otx2_sso_init(struct rte_eventdev *event_dev)\n \t\tevent_dev->dev_ops->dev_selftest();\n \t}\n \n+\totx2_tim_init(pci_dev, (struct otx2_dev *)dev);\n \n \treturn 0;\n \n@@ -1345,6 +1347,7 @@ otx2_sso_fini(struct rte_eventdev *event_dev)\n \t\treturn -EAGAIN;\n \t}\n \n+\totx2_tim_fini();\n \totx2_dev_fini(pci_dev, dev);\n \n \treturn 0;\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c\nnew file mode 100644\nindex 000000000..004701f64\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.c\n@@ -0,0 +1,78 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include \"otx2_evdev.h\"\n+#include \"otx2_tim_evdev.h\"\n+\n+void\n+otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev)\n+{\n+\tstruct rsrc_attach_req *atch_req;\n+\tstruct free_rsrcs_rsp *rsrc_cnt;\n+\tconst struct rte_memzone *mz;\n+\tstruct otx2_tim_evdev *dev;\n+\tint rc;\n+\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n+\tmz = rte_memzone_reserve(RTE_STR(OTX2_TIM_EVDEV_NAME),\n+\t\t\t\t sizeof(struct otx2_tim_evdev),\n+\t\t\t\t rte_socket_id(), 0);\n+\tif (mz == NULL) {\n+\t\totx2_tim_dbg(\"Unable to allocate memory for TIM Event device\");\n+\t\treturn;\n+\t}\n+\n+\tdev = mz->addr;\n+\tdev->pci_dev = pci_dev;\n+\tdev->mbox = cmn_dev->mbox;\n+\tdev->bar2 = cmn_dev->bar2;\n+\n+\totx2_mbox_alloc_msg_free_rsrc_cnt(dev->mbox);\n+\trc = otx2_mbox_process_msg(dev->mbox, (void *)&rsrc_cnt);\n+\tif (rc < 0) {\n+\t\totx2_err(\"Unable to get free rsrc count.\");\n+\t\tgoto mz_free;\n+\t}\n+\n+\tdev->nb_rings = rsrc_cnt->tim;\n+\n+\tif (!dev->nb_rings) {\n+\t\totx2_tim_dbg(\"No TIM Logical functions provisioned.\");\n+\t\tgoto mz_free;\n+\t}\n+\n+\tatch_req = otx2_mbox_alloc_msg_attach_resources(dev->mbox);\n+\tatch_req->modify = true;\n+\tatch_req->timlfs = dev->nb_rings;\n+\n+\trc = otx2_mbox_process(dev->mbox);\n+\tif (rc < 0) {\n+\t\totx2_err(\"Unable to attach TIM rings.\");\n+\t\tgoto mz_free;\n+\t}\n+\n+\treturn;\n+\n+mz_free:\n+\trte_memzone_free(mz);\n+}\n+\n+void\n+otx2_tim_fini(void)\n+{\n+\tstruct otx2_tim_evdev *dev = tim_priv_get();\n+\tstruct rsrc_detach_req *dtch_req;\n+\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn;\n+\n+\tdtch_req = otx2_mbox_alloc_msg_detach_resources(dev->mbox);\n+\tdtch_req->partial = true;\n+\tdtch_req->timlfs = true;\n+\n+\totx2_mbox_process(dev->mbox);\n+\trte_memzone_free(rte_memzone_lookup(RTE_STR(OTX2_TIM_EVDEV_NAME)));\n+}\ndiff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h\nnew file mode 100644\nindex 000000000..9f7aeb7df\n--- /dev/null\n+++ b/drivers/event/octeontx2/otx2_tim_evdev.h\n@@ -0,0 +1,36 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef __OTX2_TIM_EVDEV_H__\n+#define __OTX2_TIM_EVDEV_H__\n+\n+#include <rte_event_timer_adapter.h>\n+\n+#include \"otx2_dev.h\"\n+\n+#define OTX2_TIM_EVDEV_NAME otx2_tim_eventdev\n+\n+struct otx2_tim_evdev {\n+\tstruct rte_pci_device *pci_dev;\n+\tstruct otx2_mbox *mbox;\n+\tuint16_t nb_rings;\n+\tuintptr_t bar2;\n+};\n+\n+static inline struct otx2_tim_evdev *\n+tim_priv_get(void)\n+{\n+\tconst struct rte_memzone *mz;\n+\n+\tmz = rte_memzone_lookup(RTE_STR(OTX2_TIM_EVDEV_NAME));\n+\tif (mz == NULL)\n+\t\treturn NULL;\n+\n+\treturn mz->addr;\n+}\n+\n+void otx2_tim_init(struct rte_pci_device *pci_dev, struct otx2_dev *cmn_dev);\n+void otx2_tim_fini(void);\n+\n+#endif /* __OTX2_TIM_EVDEV_H__ */\n", "prefixes": [ "v3", "26/42" ] }