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GET /api/patches/55583/?format=api
{ "id": 55583, "url": "https://patches.dpdk.org/api/patches/55583/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1561710791-356325-1-git-send-email-andy.pei@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1561710791-356325-1-git-send-email-andy.pei@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1561710791-356325-1-git-send-email-andy.pei@intel.com", "date": "2019-06-28T08:33:11", "name": "[v2] net/i40e: i40e get link status update from ipn3ke", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "2311d38f3d08214623eef884b4c89eab2a02a52a", "submitter": { "id": 1185, "url": "https://patches.dpdk.org/api/people/1185/?format=api", "name": "Pei, Andy", "email": "andy.pei@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1561710791-356325-1-git-send-email-andy.pei@intel.com/mbox/", "series": [ { "id": 5219, "url": "https://patches.dpdk.org/api/series/5219/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5219", "date": "2019-06-28T08:33:11", "name": "[v2] net/i40e: i40e get link status update from ipn3ke", "version": 2, "mbox": "https://patches.dpdk.org/series/5219/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/55583/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/55583/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DACD61B970;\n\tFri, 28 Jun 2019 10:40:34 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 7C90158C6;\n\tFri, 28 Jun 2019 10:40:32 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t28 Jun 2019 01:40:31 -0700", "from dipei-st-npg.sh.intel.com ([10.67.110.220])\n\tby FMSMGA003.fm.intel.com with ESMTP; 28 Jun 2019 01:40:29 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,427,1557212400\"; d=\"scan'208\";a=\"170691555\"", "From": "Andy Pei <andy.pei@intel.com>", "To": "dev@dpdk.org", "Cc": "andy.pei@intel.com, qi.z.zhang@intel.com, jingjing.wu@intel.com,\n\tbeilei.xing@intel.com, ferruh.yigit@intel.com, rosen.xu@intel.com,\n\txiaolong.ye@intel.com, roy.fan.zhang@intel.com, stable@dpdk.org", "Date": "Fri, 28 Jun 2019 16:33:11 +0800", "Message-Id": "<1561710791-356325-1-git-send-email-andy.pei@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1558602875-429451-1-git-send-email-andy.pei@intel.com>", "References": "<1558602875-429451-1-git-send-email-andy.pei@intel.com>", "Subject": "[dpdk-dev] [PATCH v2] net/i40e: i40e get link status update from\n\tipn3ke", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add switch_mode argument for i40e PF to specify the specific FPGA that\ni40e PF is connected to. i40e PF get link status update via the\nconnected FPGA.\n\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\nCc: qi.z.zhang@intel.com\nCc: jingjing.wu@intel.com\nCc: beilei.xing@intel.com\nCc: ferruh.yigit@intel.com\nCc: rosen.xu@intel.com\nCc: xiaolong.ye@intel.com\nCc: roy.fan.zhang@intel.com\nCc: stable@dpdk.org\n\nv2:\n* use a more specific subject for this patch.\n* delete modifications that are not relevant.\n* free memory allocted by strdup.\n* delete unnecessary initializations.\n* name function more precisely.\n* wrap relevant code to a function to avoid too many levels of block\n nesting.\n\n drivers/net/i40e/i40e_ethdev.c | 121 ++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 120 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 3364455..abf95aa 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -44,6 +44,7 @@\n #define ETH_I40E_SUPPORT_MULTI_DRIVER\t\"support-multi-driver\"\n #define ETH_I40E_QUEUE_NUM_PER_VF_ARG\t\"queue-num-per-vf\"\n #define ETH_I40E_USE_LATEST_VEC\t\"use-latest-supported-vec\"\n+#define ETH_I40E_SWITCH_MODE_ARG\t\"switch_mode\"\n \n #define I40E_CLEAR_PXE_WAIT_MS 200\n \n@@ -406,6 +407,7 @@ static int i40e_sw_tunnel_filter_insert(struct i40e_pf *pf,\n \tETH_I40E_SUPPORT_MULTI_DRIVER,\n \tETH_I40E_QUEUE_NUM_PER_VF_ARG,\n \tETH_I40E_USE_LATEST_VEC,\n+\tETH_I40E_SWITCH_MODE_ARG,\n \tNULL};\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n@@ -2778,6 +2780,116 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \t}\n }\n \n+static int\n+i40e_pf_parse_switch_mode(const char *key __rte_unused,\n+\tconst char *value, void *extra_args)\n+{\n+\tif (!value || !extra_args)\n+\t\treturn -EINVAL;\n+\n+\t*(char **)extra_args = strdup(value);\n+\n+\tif (!*(char **)extra_args)\n+\t\treturn -ENOMEM;\n+\n+\treturn 0;\n+}\n+\n+static struct rte_eth_dev *\n+i40e_eth_dev_get_by_switch_mode_name(const char *cfg_str)\n+{\n+\tchar switch_name[RTE_ETH_NAME_MAX_LEN];\n+\tchar port_name[RTE_ETH_NAME_MAX_LEN];\n+\tchar switch_ethdev_name[RTE_ETH_NAME_MAX_LEN];\n+\tuint16_t port_id;\n+\tconst char *p_src;\n+\tchar *p_dst;\n+\tint ret;\n+\n+\t/* An example of cfg_str is \"IPN3KE_0@b3:00.0_0\" */\n+\tif (!strncmp(cfg_str, \"IPN3KE\", strlen(\"IPN3KE\"))) {\n+\t\tp_src = cfg_str;\n+\t\tPMD_DRV_LOG(DEBUG, \"cfg_str is %s\", cfg_str);\n+\n+\t\t/* move over \"IPN3KE\" */\n+\t\twhile ((*p_src != '_') && (*p_src))\n+\t\t\tp_src++;\n+\n+\t\t/* move over the first underline */\n+\t\tp_src++;\n+\n+\t\tp_dst = switch_name;\n+\t\twhile ((*p_src != '_') && (*p_src)) {\n+\t\t\tif (*p_src == '@') {\n+\t\t\t\t*p_dst++ = '|';\n+\t\t\t\tp_src++;\n+\t\t\t} else\n+\t\t\t\t*p_dst++ = *p_src++;\n+\t\t}\n+\t\t*p_dst = 0;\n+\t\tPMD_DRV_LOG(DEBUG, \"switch_name is %s\", switch_name);\n+\n+\t\t/* move over the second underline */\n+\t\tp_src++;\n+\n+\t\tp_dst = port_name;\n+\t\twhile (*p_src)\n+\t\t\t*p_dst++ = *p_src++;\n+\t\t*p_dst = 0;\n+\t\tPMD_DRV_LOG(DEBUG, \"port_name is %s\", port_name);\n+\n+\t\tsnprintf(switch_ethdev_name, sizeof(switch_ethdev_name),\n+\t\t\t\"net_%s_representor_%s\", switch_name, port_name);\n+\t\tPMD_DRV_LOG(DEBUG, \"switch_ethdev_name is %s\",\n+\t\t\tswitch_ethdev_name);\n+\n+\t\tret = rte_eth_dev_get_port_by_name(switch_ethdev_name,\n+\t\t\t&port_id);\n+\t\tif (ret)\n+\t\t\treturn NULL;\n+\t\telse\n+\t\t\treturn &rte_eth_devices[port_id];\n+\t} else\n+\t\treturn NULL;\n+}\n+\n+static void\n+i40e_pf_linkstatus_get_from_switch_ethdev\n+(struct rte_devargs *devargs, struct rte_eth_link *link)\n+{\n+\tstruct rte_kvargs *kvlist = NULL;\n+\tstruct rte_eth_dev *switch_ethdev;\n+\tchar *switch_cfg_str = NULL;\n+\n+\tkvlist = rte_kvargs_parse(devargs->args, valid_keys);\n+\tif (kvlist) {\n+\t\tif (rte_kvargs_count(kvlist, ETH_I40E_SWITCH_MODE_ARG) == 1) {\n+\t\t\tif (!rte_kvargs_process(kvlist,\n+\t\t\t\tETH_I40E_SWITCH_MODE_ARG,\n+\t\t\t\t&i40e_pf_parse_switch_mode, &switch_cfg_str)) {\n+\t\t\t\tswitch_ethdev =\n+\t\t\t\t\ti40e_eth_dev_get_by_switch_mode_name(\n+\t\t\t\t\tswitch_cfg_str);\n+\n+\t\t\t\trte_free(switch_cfg_str);\n+\n+\t\t\t\tif (switch_ethdev) {\n+\t\t\t\t\trte_eth_linkstatus_get(switch_ethdev,\n+\t\t\t\t\t\tlink);\n+\t\t\t\t} else {\n+\t\t\t\t\tlink->link_autoneg =\n+\t\t\t\t\t\tETH_LINK_SPEED_FIXED;\n+\t\t\t\t\tlink->link_duplex =\n+\t\t\t\t\t\tETH_LINK_FULL_DUPLEX;\n+\t\t\t\t\tlink->link_speed = ETH_SPEED_NUM_25G;\n+\t\t\t\t\tlink->link_status = 0;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t\trte_kvargs_free(kvlist);\n+\t}\n+}\n+\n int\n i40e_dev_link_update(struct rte_eth_dev *dev,\n \t\t int wait_to_complete)\n@@ -2785,6 +2897,8 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_eth_link link;\n \tbool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\tstruct rte_devargs *devargs;\n \tint ret;\n \n \tmemset(&link, 0, sizeof(link));\n@@ -2799,6 +2913,10 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)\n \telse\n \t\tupdate_link_aq(hw, &link, enable_lse, wait_to_complete);\n \n+\tdevargs = pci_dev->device.devargs;\n+\tif (devargs)\n+\t\ti40e_pf_linkstatus_get_from_switch_ethdev(devargs, &link);\n+\n \tret = rte_eth_linkstatus_set(dev, &link);\n \ti40e_notify_all_vfs_link_status(dev);\n \n@@ -12772,4 +12890,5 @@ struct i40e_customized_pctype*\n \t\t\t ETH_I40E_FLOATING_VEB_LIST_ARG \"=<string>\"\n \t\t\t ETH_I40E_QUEUE_NUM_PER_VF_ARG \"=1|2|4|8|16\"\n \t\t\t ETH_I40E_SUPPORT_MULTI_DRIVER \"=1\"\n-\t\t\t ETH_I40E_USE_LATEST_VEC \"=0|1\");\n+\t\t\t ETH_I40E_USE_LATEST_VEC \"=0|1\"\n+\t\t\t ETH_I40E_SWITCH_MODE_ARG \"=IPN3KE\");\n", "prefixes": [ "v2" ] }