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GET /api/patches/54215/?format=api
{ "id": 54215, "url": "https://patches.dpdk.org/api/patches/54215/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1559580584-5728-32-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1559580584-5728-32-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1559580584-5728-32-git-send-email-anoobj@marvell.com", "date": "2019-06-03T16:49:36", "name": "[31/39] eventdev: add routine to access event queue for eth Tx", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8955f2e5b317d164169a72ee20cb7d6dda38d50e", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1559580584-5728-32-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 4867, "url": "https://patches.dpdk.org/api/series/4867/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=4867", "date": "2019-06-03T16:49:08", "name": null, "version": 1, "mbox": "https://patches.dpdk.org/series/4867/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/54215/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/54215/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6A0421B9B8;\n\tMon, 3 Jun 2019 18:52:36 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id E165C1B9B6\n\tfor <dev@dpdk.org>; Mon, 3 Jun 2019 18:52:34 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx53Ge4mx031766; Mon, 3 Jun 2019 09:52:34 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2sw2wmh7b9-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tMon, 03 Jun 2019 09:52:34 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tMon, 3 Jun 2019 09:52:32 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Mon, 3 Jun 2019 09:52:32 -0700", "from ajoseph83.caveonetworks.com.com (unknown [10.29.45.56])\n\tby maili.marvell.com (Postfix) with ESMTP id C06D63F703F;\n\tMon, 3 Jun 2019 09:52:27 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=j3lxGIdDVDDcvxRcOGv7QnqbrhYhTE+6DLuLuWzoSXY=;\n\tb=Dt3YgZ2qjSKFE0zJheac4z8d2uvl2kFws9HDanlHMuMEYgL5tLprk82ixN88yw0QN7IA\n\tnDKnNrol5ExmC/VF3Kkdv2dWlR3vTijXZmbWLVi7PtXm/PbXvvFOydE0pgV8xEDHNGuw\n\tYgA34J4n8bKm01hY0/iWLjTsEtdnG56XlTemkA8lYVFu01M3ZPNUwdMFuMtl4vN0RCb3\n\tcNIEPrX8QGQpsDmZT9kz/dp51AWIHHGwiyOcgq4R02cJOA1xv2KH6gWWXJGbPlJ52rEF\n\tHV7kElqkpRL7yPLpG0F5OsXO3B/E5sRb9/29FvW4gNvKzigfpSNP2jAj+ZMBfLFgXNzz\n\tOQ== ", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nikhil Rao <nikhil.rao@intel.com>,\n\t\"Erik Gabriel Carrillo\" <erik.g.carrillo@intel.com>, Abhinandan Gujjar\n\t<abhinandan.gujjar@intel.com>,\n\tBruce Richardson <bruce.richardson@intel.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>", "CC": "Narayana Prasad <pathreya@marvell.com>, <dev@dpdk.org>, Lukasz Bartosik\n\t<lbartosik@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \n\t\"Hemant Agrawal\" <hemant.agrawal@nxp.com>, \n\tNipun Gupta <nipun.gupta@nxp.com>, \"Harry van Haaren\"\n\t<harry.van.haaren@intel.com>, =?utf-8?q?Mattias_R=C3=B6nnblom?=\n\t<mattias.ronnblom@ericsson.com>, Liang Ma <liang.j.ma@intel.com>,\n\t\"Anoob Joseph\" <anoobj@marvell.com>", "Date": "Mon, 3 Jun 2019 22:19:36 +0530", "Message-ID": "<1559580584-5728-32-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1559580584-5728-1-git-send-email-anoobj@marvell.com>", "References": "<1559580584-5728-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-03_13:, , signatures=0", "Subject": "[dpdk-dev] [PATCH 31/39] eventdev: add routine to access event\n\tqueue for eth Tx", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When the application is drafted for single stage eventmode, it will be\nefficient to have the loop in the application space, rather than passing\nit on to the helper.\n\nWhen the application's stage is in ORDERED sched mode, the application\nwill have to change the sched type of the event to ATOMIC before sending\nit, to ensure ingress ordering is maintained. Since, it is application\nwho would do the tx, this info is required in it's space.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Lukasz Bartosik <lbartosik@marvell.com>\n---\n lib/librte_eventdev/rte_eventdev_version.map | 1 +\n lib/librte_eventdev/rte_eventmode_helper.c | 53 ++++++++++++++++++++++++++++\n lib/librte_eventdev/rte_eventmode_helper.h | 21 +++++++++++\n 3 files changed, 75 insertions(+)", "diff": "diff --git a/lib/librte_eventdev/rte_eventdev_version.map b/lib/librte_eventdev/rte_eventdev_version.map\nindex 8137cb5..3cf926a 100644\n--- a/lib/librte_eventdev/rte_eventdev_version.map\n+++ b/lib/librte_eventdev/rte_eventdev_version.map\n@@ -134,4 +134,5 @@ EXPERIMENTAL {\n \trte_eventmode_helper_initialize_devs;\n \trte_eventmode_helper_display_conf;\n \trte_eventmode_helper_get_event_lcore_links;\n+\trte_eventmode_helper_get_tx_queue;\n };\ndiff --git a/lib/librte_eventdev/rte_eventmode_helper.c b/lib/librte_eventdev/rte_eventmode_helper.c\nindex 6c853f6..e7670e0 100644\n--- a/lib/librte_eventdev/rte_eventmode_helper.c\n+++ b/lib/librte_eventdev/rte_eventmode_helper.c\n@@ -93,6 +93,24 @@ internal_get_next_active_core(struct eventmode_conf *em_conf,\n \treturn next_core;\n }\n \n+static struct eventdev_params *\n+internal_get_eventdev_params(struct eventmode_conf *em_conf,\n+\t\tuint8_t eventdev_id)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < em_conf->nb_eventdev; i++) {\n+\t\tif (em_conf->eventdev_config[i].eventdev_id == eventdev_id)\n+\t\t\tbreak;\n+\t}\n+\n+\t/* No match */\n+\tif (i == em_conf->nb_eventdev)\n+\t\treturn NULL;\n+\n+\treturn &(em_conf->eventdev_config[i]);\n+}\n+\n /* Global functions */\n \n void __rte_experimental\n@@ -927,3 +945,38 @@ rte_eventmode_helper_get_event_lcore_links(uint32_t lcore_id,\n \treturn lcore_nb_link;\n }\n \n+uint8_t __rte_experimental\n+rte_eventmode_helper_get_tx_queue(struct rte_eventmode_helper_conf *mode_conf,\n+\t\tuint8_t eventdev_id)\n+{\n+\tstruct eventdev_params *eventdev_config;\n+\tstruct eventmode_conf *em_conf;\n+\n+\tif (mode_conf == NULL) {\n+\t\tRTE_EM_HLPR_LOG_ERR(\"Invalid conf\");\n+\t\treturn (uint8_t)(-1);\n+\t}\n+\n+\tif (mode_conf->mode_params == NULL) {\n+\t\tRTE_EM_HLPR_LOG_ERR(\"Invalid mode params\");\n+\t\treturn (uint8_t)(-1);\n+\t}\n+\n+\t/* Get eventmode conf */\n+\tem_conf = (struct eventmode_conf *)(mode_conf->mode_params);\n+\n+\t/* Get event device conf */\n+\teventdev_config = internal_get_eventdev_params(em_conf, eventdev_id);\n+\n+\tif (eventdev_config == NULL) {\n+\t\tRTE_EM_HLPR_LOG_ERR(\"Error reading eventdev conf\");\n+\t\treturn (uint8_t)(-1);\n+\t}\n+\n+\t/*\n+\t * The last queue would be reserved to be used as atomic queue for the\n+\t * last stage (eth packet tx stage)\n+\t */\n+\treturn eventdev_config->nb_eventqueue - 1;\n+}\n+\ndiff --git a/lib/librte_eventdev/rte_eventmode_helper.h b/lib/librte_eventdev/rte_eventmode_helper.h\nindex 925b660..cd6d708 100644\n--- a/lib/librte_eventdev/rte_eventmode_helper.h\n+++ b/lib/librte_eventdev/rte_eventmode_helper.h\n@@ -136,6 +136,27 @@ rte_eventmode_helper_get_event_lcore_links(uint32_t lcore_id,\n \t\tstruct rte_eventmode_helper_conf *mode_conf,\n \t\tstruct rte_eventmode_helper_event_link_info **links);\n \n+/**\n+ * Get eventdev tx queue\n+ *\n+ * If the application uses event device which does not support internal port\n+ * then it needs to submit the events to an atomic Tx queue before final\n+ * transmission. The Tx queue will be atomic to make sure that ingress order of\n+ * the packets is maintained. This Tx queue will be created internally by the\n+ * eventmode helper subsystem, and application will need it's queue ID when it\n+ * is running the execution loop.\n+ *\n+ * @param mode_conf\n+ * Configuration of the mode in which app is doing packet handling\n+ * @param eventdev_id\n+ * Event device ID\n+ * @return\n+ * Tx queue ID\n+ */\n+uint8_t __rte_experimental\n+rte_eventmode_helper_get_tx_queue(struct rte_eventmode_helper_conf *mode_conf,\n+\t\tuint8_t eventdev_id);\n+\n #ifdef __cplusplus\n }\n #endif\n", "prefixes": [ "31/39" ] }