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GET /api/patches/53745/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 53745,
    "url": "https://patches.dpdk.org/api/patches/53745/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190528120553.2992-12-lukaszx.krakowiak@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190528120553.2992-12-lukaszx.krakowiak@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190528120553.2992-12-lukaszx.krakowiak@intel.com",
    "date": "2019-05-28T12:05:37",
    "name": "[11/27] sched: update port memory footprint api",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ffb37b53cffbf76ffa9e097ebcf8dbcd15061397",
    "submitter": {
        "id": 1221,
        "url": "https://patches.dpdk.org/api/people/1221/?format=api",
        "name": "Lukasz Krakowiak",
        "email": "lukaszx.krakowiak@intel.com"
    },
    "delegate": {
        "id": 10018,
        "url": "https://patches.dpdk.org/api/users/10018/?format=api",
        "username": "cristian_dumitrescu",
        "first_name": "Cristian",
        "last_name": "Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190528120553.2992-12-lukaszx.krakowiak@intel.com/mbox/",
    "series": [
        {
            "id": 4794,
            "url": "https://patches.dpdk.org/api/series/4794/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=4794",
            "date": "2019-05-28T12:05:26",
            "name": "sched: feature enhancements",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/4794/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/53745/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/53745/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D07F41B9BF;\n\tTue, 28 May 2019 14:08:35 +0200 (CEST)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id C58AA1B99A\n\tfor <dev@dpdk.org>; Tue, 28 May 2019 14:08:24 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t28 May 2019 05:08:24 -0700",
            "from lkrakowx-mobl.ger.corp.intel.com ([10.103.104.99])\n\tby fmsmga001.fm.intel.com with ESMTP; 28 May 2019 05:08:22 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Lukasz Krakowiak <lukaszx.krakowiak@intel.com>",
        "To": "cristian.dumitrescu@intel.com",
        "Cc": "dev@dpdk.org, Jasvinder Singh <jasvinder.singh@intel.com>,\n\tAbraham Tovar <abrahamx.tovar@intel.com>,\n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>",
        "Date": "Tue, 28 May 2019 14:05:37 +0200",
        "Message-Id": "<20190528120553.2992-12-lukaszx.krakowiak@intel.com>",
        "X-Mailer": "git-send-email 2.19.2.windows.1",
        "In-Reply-To": "<20190528120553.2992-1-lukaszx.krakowiak@intel.com>",
        "References": "<20190528120553.2992-1-lukaszx.krakowiak@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 11/27] sched: update port memory footprint api",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Jasvinder Singh <jasvinder.singh@intel.com>\n\nUpdate port memory footprint api implementation of scheduler to allow\nconfiguration flexiblity for pipe traffic classes and queues, and subport\nlevel configuration of the pipe parameters.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Abraham Tovar <abrahamx.tovar@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n lib/librte_sched/rte_sched.c | 86 +++++++++---------------------------\n lib/librte_sched/rte_sched.h |  7 ++-\n 2 files changed, 25 insertions(+), 68 deletions(-)",
    "diff": "diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c\nindex 86f2bdf51..e2a49633d 100644\n--- a/lib/librte_sched/rte_sched.c\n+++ b/lib/librte_sched/rte_sched.c\n@@ -440,66 +440,6 @@ rte_sched_port_check_params(struct rte_sched_port_params *params)\n \treturn 0;\n }\n \n-static uint32_t\n-rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)\n-{\n-\tuint32_t n_subports_per_port = params->n_subports_per_port;\n-\tuint32_t n_pipes_per_subport = params->n_pipes_per_subport;\n-\tuint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;\n-\tuint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;\n-\n-\tuint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);\n-\tuint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);\n-\tuint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);\n-\tuint32_t size_queue_extra\n-\t\t= n_queues_per_port * sizeof(struct rte_sched_queue_extra);\n-\tuint32_t size_pipe_profiles\n-\t\t= RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);\n-\tuint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);\n-\tuint32_t size_per_pipe_queue_array, size_queue_array;\n-\n-\tuint32_t base, i;\n-\n-\tsize_per_pipe_queue_array = 0;\n-\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {\n-\t\tsize_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS\n-\t\t\t* params->qsize[i] * sizeof(struct rte_mbuf *);\n-\t}\n-\tsize_queue_array = n_pipes_per_port * size_per_pipe_queue_array;\n-\n-\tbase = 0;\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_subport);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_PIPE)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_pipe);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_queue);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);\n-\n-\tif (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)\n-\t\treturn base;\n-\tbase += RTE_CACHE_LINE_ROUNDUP(size_queue_array);\n-\n-\treturn base;\n-}\n-\n static uint32_t\n rte_sched_subport_get_array_base(struct rte_sched_subport_params *params,\n \tenum rte_sched_subport_array array)\n@@ -899,22 +839,36 @@ rte_sched_subport_get_memory_footprint(struct rte_sched_port *port,\n }\n \n uint32_t\n-rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)\n+rte_sched_port_get_memory_footprint(struct rte_sched_port_params *port_params,\n+\tstruct rte_sched_subport_params *subport_params)\n {\n-\tuint32_t size0, size1;\n+\tuint32_t size0 = 0, size1 = 0, i;\n \tint status;\n \n-\tstatus = rte_sched_port_check_params(params);\n+\tstatus = rte_sched_port_check_params(port_params);\n \tif (status != 0) {\n \t\tRTE_LOG(NOTICE, SCHED,\n-\t\t\t\"Port scheduler params check failed (%d)\\n\", status);\n+\t\t\t\"Port scheduler port params check failed (%d)\\n\", status);\n+\n+\t\treturn 0;\n+\t}\n+\n+\tstatus = rte_sched_subport_check_params(subport_params,\n+\t\t\t\tport_params->rate);\n+\tif (status != 0) {\n+\t\tRTE_LOG(NOTICE, SCHED,\n+\t\t\t\"Port scheduler subport params check failed (%d)\\n\", status);\n \n \t\treturn 0;\n \t}\n \n \tsize0 = sizeof(struct rte_sched_port);\n-\tsize1 = rte_sched_port_get_array_base(params,\n-\t\t\te_RTE_SCHED_PORT_ARRAY_TOTAL);\n+\n+\tfor (i = 0; i < port_params->n_subports_per_port; i++) {\n+\t\tstruct rte_sched_subport_params *sp = &subport_params[i];\n+\t\tsize1 += rte_sched_subport_get_array_base(sp,\n+\t\t\te_RTE_SCHED_SUBPORT_ARRAY_TOTAL);\n+\t}\n \n \treturn size0 + size1;\n }\ndiff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h\nindex 635b59550..28b589309 100644\n--- a/lib/librte_sched/rte_sched.h\n+++ b/lib/librte_sched/rte_sched.h\n@@ -332,13 +332,16 @@ rte_sched_pipe_config(struct rte_sched_port *port,\n /**\n  * Hierarchical scheduler memory footprint size per port\n  *\n- * @param params\n+ * @param port_params\n  *   Port scheduler configuration parameter structure\n+ * @param subport_params\n+ *   Subport configuration parameter structure\n  * @return\n  *   Memory footprint size in bytes upon success, 0 otherwise\n  */\n uint32_t\n-rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params);\n+rte_sched_port_get_memory_footprint(struct rte_sched_port_params *port_params,\n+\tstruct rte_sched_subport_params *subport_params);\n \n /*\n  * Statistics\n",
    "prefixes": [
        "11/27"
    ]
}