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GET /api/patches/53332/?format=api
{ "id": 53332, "url": "https://patches.dpdk.org/api/patches/53332/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com", "date": "2019-05-08T21:02:43", "name": "[v3,4/4] test: fix memory barrier test failure on power CPUs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ea83cf61357e40377252e67e1cb1f24013888eae", "submitter": { "id": 1256, "url": "https://patches.dpdk.org/api/people/1256/?format=api", "name": "David Christensen", "email": "drc@linux.vnet.ibm.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com/mbox/", "series": [ { "id": 4602, "url": "https://patches.dpdk.org/api/series/4602/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=4602", "date": "2019-05-08T21:02:08", "name": "[v3,1/4] test: fix typo in print statement", "version": 3, "mbox": "https://patches.dpdk.org/series/4602/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/53332/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/53332/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6897E4CC3;\n\tWed, 8 May 2019 23:02:51 +0200 (CEST)", "from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5]) by dpdk.org (Postfix) with ESMTP id 502F34C8F\n\tfor <dev@dpdk.org>; Wed, 8 May 2019 23:02:50 +0200 (CEST)", "from pps.filterd (m0098417.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx48Kr6p5016580 for <dev@dpdk.org>; Wed, 8 May 2019 17:02:49 -0400", "from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2sc6289u4x-1\n\t(version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Wed, 08 May 2019 17:02:49 -0400", "from localhost\n\tby e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <dev@dpdk.org> from <drc@linux.vnet.ibm.com>;\n\tWed, 8 May 2019 22:02:48 +0100", "from b01cxnp23033.gho.pok.ibm.com (9.57.198.28)\n\tby e13.ny.us.ibm.com (146.89.104.200) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\t(version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256)\n\tWed, 8 May 2019 22:02:46 +0100", "from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com\n\t[9.57.199.108])\n\tby b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid x48L2jSI27984006\n\t(version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256\n\tverify=OK); Wed, 8 May 2019 21:02:45 GMT", "from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id B3A7DB2065;\n\tWed, 8 May 2019 21:02:45 +0000 (GMT)", "from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 7B5FFB2064;\n\tWed, 8 May 2019 21:02:45 +0000 (GMT)", "from oprom9.localdomain (unknown [9.40.204.34])\n\tby b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP;\n\tWed, 8 May 2019 21:02:45 +0000 (GMT)" ], "From": "David Christensen <drc@linux.vnet.ibm.com>", "To": "dev@dpdk.org", "Cc": "David Christensen <drc@linux.vnet.ibm.com>", "Date": "Wed, 8 May 2019 16:02:43 -0500", "X-Mailer": "git-send-email 1.8.3.1", "X-TM-AS-GCONF": "00", "x-cbid": "19050821-0064-0000-0000-000003DBB94C", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00011072; HX=3.00000242; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000285; SDB=6.01200514; UDB=6.00629910;\n\tIPR=6.00981401; \n\tMB=3.00026797; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-08 21:02:47", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "19050821-0065-0000-0000-00003D651CC6", "Message-Id": "<1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-05-08_12:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tpriorityscore=1501\n\tmalwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0\n\tclxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0\n\tmlxlogscore=773 adultscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1810050000 definitions=main-1905080127", "Subject": "[dpdk-dev] [PATCH v3 4/4] test: fix memory barrier test failure on\n\tpower CPUs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The memory barrier test fails on IBM Power 9 systems. Add additional\nbarriers to accommodate the weakly ordered model used on Power CPUs.\n\nSigned-off-by: David Christensen <drc@linux.vnet.ibm.com>\n---\nv2:\n* Removed ifdef's for PPC since the rte_smp_*mb() macros are already\n customized for each CPU architecture\nv3:\n* None\n---\n app/test/test_barrier.c | 2 ++\n 1 file changed, 2 insertions(+)", "diff": "diff --git a/app/test/test_barrier.c b/app/test/test_barrier.c\nindex a0b4704..43b5f62 100644\n--- a/app/test/test_barrier.c\n+++ b/app/test/test_barrier.c\n@@ -92,12 +92,14 @@ struct lcore_plock_test {\n \tother = self ^ 1;\n \n \tl->flag[self] = 1;\n+\trte_smp_wmb();\n \tl->victim = self;\n \n \tstore_load_barrier(l->utype);\n \n \twhile (l->flag[other] == 1 && l->victim == self)\n \t\trte_pause();\n+\trte_smp_rmb();\n }\n \n static void\n", "prefixes": [ "v3", "4/4" ] }