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GET /api/patches/5178/?format=api
{ "id": 5178, "url": "https://patches.dpdk.org/api/patches/5178/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1433481718-24253-23-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1433481718-24253-23-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1433481718-24253-23-git-send-email-wenzhuo.lu@intel.com", "date": "2015-06-05T05:21:54", "name": "[dpdk-dev,22/26] ixgbe/base: add x550em PHY interrupt and forced 1G/10G support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2a6b72466a5fe8867c88f078f6b341ad1cf5f7d0", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1433481718-24253-23-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/5178/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/5178/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 776E7C346;\n\tFri, 5 Jun 2015 07:22:57 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id B6B0BC32A\n\tfor <dev@dpdk.org>; Fri, 5 Jun 2015 07:22:55 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP; 04 Jun 2015 22:22:55 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 04 Jun 2015 22:22:56 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t555MqMt001165;\n\tFri, 5 Jun 2015 13:22:52 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t555Mo1a024445; Fri, 5 Jun 2015 13:22:52 +0800", "(from wenzhuol@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t555MnmO024441; \n\tFri, 5 Jun 2015 13:22:49 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.13,556,1427785200\"; d=\"scan'208\";a=\"705714664\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 5 Jun 2015 13:21:54 +0800", "Message-Id": "<1433481718-24253-23-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1433481718-24253-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1433481718-24253-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH 22/26] ixgbe/base: add x550em PHY interrupt and\n\tforced 1G/10G support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds x550em external PHY interrupt and forced 1G/10G\nsupport. Support includes enabling and handling Link Status\nChange and Thermal Sensor interrupt. ixgbe_handle_lasi has been added\nto the API for handling the interrupts received from x550em PHY.\nixgbe_enable_lasi_ext_t_x550em and ixgbe_get_lasi_ext_t_x550em have been\nadded to X550em to enable mask and check interrupt flags for x550em PHY.\n\nForced 1G/10G link speed is handled via ixgbe_setup_mac_link_t_X550em.\nixgbe_setup_mac_link_t_X550em sets up the internal PHY and\nexternal PHY link to either 10G or 1G based on the user selected auto\nadvertised link speed setting. Then sets up the external PHY auto\nadvertised link speed.\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_api.c | 17 +++\n drivers/net/ixgbe/base/ixgbe_api.h | 1 +\n drivers/net/ixgbe/base/ixgbe_type.h | 18 ++-\n drivers/net/ixgbe/base/ixgbe_x550.c | 241 +++++++++++++++++++++++++++++++++++-\n drivers/net/ixgbe/base/ixgbe_x550.h | 4 +\n 5 files changed, 275 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_api.c b/drivers/net/ixgbe/base/ixgbe_api.c\nindex e08a2e0..916d744 100644\n--- a/drivers/net/ixgbe/base/ixgbe_api.c\n+++ b/drivers/net/ixgbe/base/ixgbe_api.c\n@@ -1293,6 +1293,23 @@ s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)\n }\n \n /**\n+ * ixgbe_handle_lasi - Handle external Base T PHY interrupt\n+ * @hw: pointer to hardware structure\n+ *\n+ * Handle external Base T PHY interrupt. If high temperature\n+ * failure alarm then return error, else if link status change\n+ * then setup internal/external PHY link\n+ *\n+ * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature\n+ * failure alarm, else return PHY access status.\n+ */\n+s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)\n+{\n+\treturn ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),\n+\t\t\t\tIXGBE_NOT_IMPLEMENTED);\n+}\n+\n+/**\n * ixgbe_read_analog_reg8 - Reads 8 bit analog register\n * @hw: pointer to hardware structure\n * @reg: analog register to read\ndiff --git a/drivers/net/ixgbe/base/ixgbe_api.h b/drivers/net/ixgbe/base/ixgbe_api.h\nindex b08c846..bd1208e 100644\n--- a/drivers/net/ixgbe/base/ixgbe_api.h\n+++ b/drivers/net/ixgbe/base/ixgbe_api.h\n@@ -212,6 +212,7 @@ void ixgbe_enable_mdd(struct ixgbe_hw *hw);\n void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);\n void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);\n s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);\n+s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);\n void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);\n void ixgbe_disable_rx(struct ixgbe_hw *hw);\n void ixgbe_enable_rx(struct ixgbe_hw *hw);\ndiff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h\nindex 6a00e5b..eaaba44 100644\n--- a/drivers/net/ixgbe/base/ixgbe_type.h\n+++ b/drivers/net/ixgbe/base/ixgbe_type.h\n@@ -1378,6 +1378,8 @@ struct ixgbe_dmac_config {\n #define IXGBE_MDIO_AUTO_NEG_STATUS\t0x1 /* AUTO_NEG Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_STAT\t0xC800 /* AUTO_NEG Vendor Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM 0xCC00 /* AUTO_NEG Vendor TX Reg */\n+#define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2 0xCC01 /* AUTO_NEG Vendor Tx Reg */\n+#define IXGBE_MDIO_AUTO_NEG_VEN_LSC\t0x1 /* AUTO_NEG Vendor Tx LSC */\n #define IXGBE_MDIO_AUTO_NEG_ADVT\t0x10 /* AUTO_NEG Advt Reg */\n #define IXGBE_MDIO_AUTO_NEG_LP\t\t0x13 /* AUTO_NEG LP Status Reg */\n #define IXGBE_MDIO_AUTO_NEG_EEE_ADVT\t0x3C /* AUTO_NEG EEE Advt Reg */\n@@ -1406,11 +1408,24 @@ struct ixgbe_dmac_config {\n #define IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK\t0x3 /* PHY Reset Complete Mask */\n #define IXGBE_MDIO_GLOBAL_RES_PR_10 0xC479 /* Global Resv Provisioning 10 Reg */\n #define IXGBE_MDIO_POWER_UP_STALL\t\t0x8000 /* Power Up Stall */\n-\n+#define IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK\t0xFF00 /* int std mask */\n+#define IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG\t0xFC00 /* chip std int flag */\n+#define IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK\t0xFF01 /* int chip-wide mask */\n+#define IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG\t0xFC01 /* int chip-wide mask */\n+#define IXGBE_MDIO_GLOBAL_ALARM_1\t\t0xCC00 /* Global alarm 1 */\n+#define IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL\t0x4000 /* high temp failure */\n+#define IXGBE_MDIO_GLOBAL_INT_MASK\t\t0xD400 /* Global int mask */\n+#define IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN\t0x1000 /* autoneg vendor alarm int enable */\n+#define IXGBE_MDIO_GLOBAL_ALARM_1_INT\t\t0x4 /* int in Global alarm 1 */\n+#define IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN\t0x1 /* vendor alarm int enable */\n+#define IXGBE_MDIO_GLOBAL_STD_ALM2_INT\t\t0x200 /* vendor alarm2 int mask */\n+#define IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN\t0x4000 /* int high temp enable */\n #define IXGBE_MDIO_PMA_PMD_CONTROL_ADDR\t0x0000 /* PMA/PMD Control Reg */\n #define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR\t0xC30A /* PHY_XS SDA/SCL Addr Reg */\n #define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA\t0xC30B /* PHY_XS SDA/SCL Data Reg */\n #define IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT\t0xC30C /* PHY_XS SDA/SCL Status Reg */\n+#define IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK 0xD401 /* PHY TX Vendor LASI */\n+#define IXGBE_MDIO_PMA_TX_VEN_LASI_INT_EN 0x1 /* PHY TX Vendor LASI enable */\n #define IXGBE_MDIO_PMD_STD_TX_DISABLE_CNTR 0x9 /* Standard Transmit Dis Reg */\n #define IXGBE_MDIO_PMD_GLOBAL_TX_DISABLE 0x0001 /* PMD Global Transmit Dis */\n \n@@ -3642,6 +3657,7 @@ struct ixgbe_phy_operations {\n \ts32 (*check_overtemp)(struct ixgbe_hw *);\n \ts32 (*set_phy_power)(struct ixgbe_hw *, bool on);\n \ts32 (*enter_lplu)(struct ixgbe_hw *);\n+\ts32 (*handle_lasi)(struct ixgbe_hw *hw);\n \ts32 (*read_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,\n \t\t\t\t\t u16 *value);\n \ts32 (*write_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,\ndiff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c\nindex 9abe927..3695215 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.c\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.c\n@@ -1055,10 +1055,11 @@ void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)\n \n \tDEBUGFUNC(\"ixgbe_init_mac_link_ops_X550em\");\n \n-\t/* CS4227 does not support autoneg, so disable the laser control\n-\t * functions for SFP+ fiber\n-\t */\n-\t if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {\n+\t switch (hw->mac.ops.get_media_type(hw)) {\n+\t case ixgbe_media_type_fiber:\n+\t\t/* CS4227 does not support autoneg, so disable the laser control\n+\t\t * functions for SFP+ fiber\n+\t\t */\n \t\tmac->ops.disable_tx_laser = NULL;\n \t\tmac->ops.enable_tx_laser = NULL;\n \t\tmac->ops.flap_tx_laser = NULL;\n@@ -1066,6 +1067,12 @@ void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)\n \t\tmac->ops.setup_mac_link = ixgbe_setup_mac_link_sfp_x550em;\n \t\tmac->ops.set_rate_select_speed =\n \t\t\t\t\tixgbe_set_soft_rate_select_speed;\n+\t\tbreak;\n+\tcase ixgbe_media_type_copper:\n+\t\tmac->ops.setup_link = ixgbe_setup_mac_link_t_X550em;\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n \t }\n }\n \n@@ -1112,6 +1119,163 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,\n }\n \n /**\n+ * ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause\n+ * @hw: pointer to hardware structure\n+ * @lsc: pointer to boolean flag which indicates whether external Base T\n+ * PHY interrupt is lsc\n+ *\n+ * Determime if external Base T PHY interrupt cause is high temperature\n+ * failure alarm or link status change.\n+ *\n+ * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature\n+ * failure alarm, else return PHY access status.\n+ */\n+STATIC s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)\n+{\n+\tu32 status;\n+\tu16 reg;\n+\n+\t*lsc = false;\n+\n+\t/* Vendor alarm triggered */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS ||\n+\t !(reg & IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN))\n+\t\treturn status;\n+\n+\t/* Vendor Auto-Neg alarm triggered or Global alarm 1 triggered */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS ||\n+\t !(reg & (IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN |\n+\t IXGBE_MDIO_GLOBAL_ALARM_1_INT)))\n+\t\treturn status;\n+\n+\t/* High temperature failure alarm triggered */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\t/* If high temperature failure, then return over temp error and exit */\n+\tif (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL)\n+\t\treturn IXGBE_ERR_OVERTEMP;\n+\n+\t/* Vendor alarm 2 triggered */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,\n+\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\n+\tif (status != IXGBE_SUCCESS ||\n+\t !(reg & IXGBE_MDIO_GLOBAL_STD_ALM2_INT))\n+\t\treturn status;\n+\n+\t/* link connect/disconnect event occurred */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,\n+\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\t/* Indicate LSC */\n+\tif (reg & IXGBE_MDIO_AUTO_NEG_VEN_LSC)\n+\t\t*lsc = true;\n+\n+\treturn IXGBE_SUCCESS;\n+}\n+\n+/**\n+ * ixgbe_enable_lasi_ext_t_x550em - Enable external Base T PHY interrupts\n+ * @hw: pointer to hardware structure\n+ *\n+ * Enable link status change and temperature failure alarm for the external\n+ * Base T PHY\n+ *\n+ * Returns PHY access status\n+ */\n+STATIC s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n+{\n+\tu32 status;\n+\tu16 reg;\n+\tbool lsc;\n+\n+\t/* Clear interrupt flags */\n+\tstatus = ixgbe_get_lasi_ext_t_x550em(hw, &lsc);\n+\n+\t/* Enable link status change alarm */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK,\n+\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\treg |= IXGBE_MDIO_PMA_TX_VEN_LASI_INT_EN;\n+\n+\tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK,\n+\t\t\t\t IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\t/* Enables high temperature failure alarm */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\treg |= IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN;\n+\n+\tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t reg);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\t/* Enable vendor Auto-Neg alarm and Global Interrupt Mask 1 alarm */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\treg |= (IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN |\n+\t\tIXGBE_MDIO_GLOBAL_ALARM_1_INT);\n+\n+\tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t reg);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\t/* Enable chip-wide vendor alarm */\n+\tstatus = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t ®);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\treg |= IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN;\n+\n+\tstatus = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,\n+\t\t\t\t IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,\n+\t\t\t\t reg);\n+\n+\treturn status;\n+}\n+\n+/**\n * ixgbe_init_phy_ops_X550em - PHY/SFP specific init\n * @hw: pointer to hardware structure\n *\n@@ -1136,7 +1300,7 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)\n \tif (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED)\n \t\treturn ret_val;\n \n-\t/* Setup function pointers based on detected SFP module and speeds */\n+\t/* Setup function pointers based on detected hardware */\n \tixgbe_init_mac_link_ops_X550em(hw);\n \tif (phy->sfp_type != ixgbe_sfp_type_unknown)\n \t\tphy->ops.reset = NULL;\n@@ -1157,6 +1321,7 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)\n \t\tphy->ops.setup_internal_link =\n \t\t\t\t\t ixgbe_setup_internal_phy_t_x550em;\n \t\tphy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;\n+\t\tphy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;\n \t\tbreak;\n \tdefault:\n \t\tbreak;\n@@ -1333,6 +1498,9 @@ s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)\n \t\t\treturn status;\n \t}\n \n+\t/* Configure Link Status Alarm and Temperature Threshold interrupts */\n+\tstatus = ixgbe_enable_lasi_ext_t_x550em(hw);\n+\n \treturn status;\n }\n \n@@ -2609,3 +2777,66 @@ void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)\n \n \tixgbe_release_swfw_sync_X540(hw, mask);\n }\n+\n+/**\n+ * ixgbe_handle_lasi_ext_t_x550em - Handle external Base T PHY interrupt\n+ * @hw: pointer to hardware structure\n+ *\n+ * Handle external Base T PHY interrupt. If high temperature\n+ * failure alarm then return error, else if link status change\n+ * then setup internal/external PHY link\n+ *\n+ * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature\n+ * failure alarm, else return PHY access status.\n+ */\n+s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw)\n+{\n+\tbool lsc;\n+\tu32 status;\n+\n+\tstatus = ixgbe_get_lasi_ext_t_x550em(hw, &lsc);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\tif (lsc)\n+\t\treturn ixgbe_setup_internal_phy_t_x550em(hw);\n+\n+\treturn IXGBE_SUCCESS;\n+}\n+\n+/**\n+ * ixgbe_setup_mac_link_t_X550em - Sets the auto advertised link speed\n+ * @hw: pointer to hardware structure\n+ * @speed: new link speed\n+ * @autoneg_wait_to_complete: true when waiting for completion is needed\n+ *\n+ * Setup internal/external PHY link speed based on link speed, then set\n+ * external PHY auto advertised link speed.\n+ *\n+ * Returns error status for any failure\n+ **/\n+s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,\n+\t\t\t\t ixgbe_link_speed speed,\n+\t\t\t\t bool autoneg_wait_to_complete)\n+{\n+\ts32 status;\n+\tixgbe_link_speed force_speed;\n+\n+\tDEBUGFUNC(\"ixgbe_setup_mac_link_t_X550em\");\n+\n+\t/* Setup internal/external PHY link speed to iXFI (10G), unless\n+\t * only 1G is auto advertised then setup KX link.\n+\t */\n+\tif (speed & IXGBE_LINK_SPEED_10GB_FULL)\n+\t\tforce_speed = IXGBE_LINK_SPEED_10GB_FULL;\n+\telse\n+\t\tforce_speed = IXGBE_LINK_SPEED_1GB_FULL;\n+\n+\tstatus = ixgbe_setup_ixfi_x550em(hw, &force_speed);\n+\n+\tif (status != IXGBE_SUCCESS)\n+\t\treturn status;\n+\n+\treturn hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);\n+}\ndiff --git a/drivers/net/ixgbe/base/ixgbe_x550.h b/drivers/net/ixgbe/base/ixgbe_x550.h\nindex bd6ce9d..ee23c76 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.h\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.h\n@@ -95,5 +95,9 @@ s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw);\n s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,\n \t\t\t\t ixgbe_link_speed speed,\n \t\t\t\t bool autoneg_wait_to_complete);\n+s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw);\n+s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,\n+\t\t\t\t ixgbe_link_speed speed,\n+\t\t\t\t bool autoneg_wait_to_complete);\n #endif /* _IXGBE_X550_H_ */\n \n", "prefixes": [ "dpdk-dev", "22/26" ] }