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GET /api/patches/51667/?format=api
{ "id": 51667, "url": "https://patches.dpdk.org/api/patches/51667/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190325192238.20940-6-yskoh@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190325192238.20940-6-yskoh@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190325192238.20940-6-yskoh@mellanox.com", "date": "2019-03-25T19:22:37", "name": "[v2,5/6] net/mlx4: add control of excessive memory pinning by kernel", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b7cf4d974e559b0c81a08f85135186fcd6962c47", "submitter": { "id": 636, "url": "https://patches.dpdk.org/api/people/636/?format=api", "name": "Yongseok Koh", "email": "yskoh@mellanox.com" }, "delegate": { "id": 6624, "url": "https://patches.dpdk.org/api/users/6624/?format=api", "username": "shahafs", "first_name": "Shahaf", "last_name": "Shuler", "email": "shahafs@mellanox.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190325192238.20940-6-yskoh@mellanox.com/mbox/", "series": [ { "id": 3907, "url": "https://patches.dpdk.org/api/series/3907/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3907", "date": "2019-03-25T19:22:33", "name": "net/mlx: enable secondary process to register DMA memory", "version": 2, "mbox": "https://patches.dpdk.org/series/3907/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/51667/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/51667/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id AE1C758FE;\n\tMon, 25 Mar 2019 20:23:06 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 567F54CBD\n\tfor <dev@dpdk.org>; Mon, 25 Mar 2019 20:22:52 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n\tyskoh@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 25 Mar 2019 21:22:51 +0200", "from scfae-sc-2.mti.labs.mlnx (scfae-sc-2.mti.labs.mlnx\n\t[10.101.0.96])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x2PJMfrI027389;\n\tMon, 25 Mar 2019 21:22:50 +0200" ], "From": "Yongseok Koh <yskoh@mellanox.com>", "To": "shahafs@mellanox.com", "Cc": "dev@dpdk.org", "Date": "Mon, 25 Mar 2019 12:22:37 -0700", "Message-Id": "<20190325192238.20940-6-yskoh@mellanox.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20190325192238.20940-1-yskoh@mellanox.com>", "References": "<20190307074151.18815-1-yskoh@mellanox.com>\n\t<20190325192238.20940-1-yskoh@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 5/6] net/mlx4: add control of excessive memory\n\tpinning by kernel", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "A new PMD parameter (mr_ext_memseg_en) is added to control extension of\nmemseg when creating a MR. It is enabled by default.\n\nIf enabled, mlx4_mr_create() tries to maximize the range of MR\nregistration so that the LKey lookup tables on datapath become smaller and\nget the best performance. However, it may worsen memory utilization\nbecause registered memory is pinned by kernel driver. Even if a page in the\nextended chunk is freed, that doesn't become reusable until the entire\nmemory is freed and the MR is destroyed.\n\nTo make freed pages available immediately, this parameter has to be turned\noff but it could drop performance.\n\nSigned-off-by: Yongseok Koh <yskoh@mellanox.com>\nAcked-by: Shahaf Shuler <shahafs@mellanox.com>\n---\n doc/guides/nics/mlx4.rst | 11 +++++++++++\n drivers/net/mlx4/mlx4.c | 11 +++++++++--\n drivers/net/mlx4/mlx4.h | 5 +++++\n drivers/net/mlx4/mlx4_mr.c | 20 +++++++++++++++-----\n 4 files changed, 40 insertions(+), 7 deletions(-)", "diff": "diff --git a/doc/guides/nics/mlx4.rst b/doc/guides/nics/mlx4.rst\nindex cd34838f41..c8a02be4dd 100644\n--- a/doc/guides/nics/mlx4.rst\n+++ b/doc/guides/nics/mlx4.rst\n@@ -119,6 +119,17 @@ Run-time configuration\n times for additional ports. All ports are probed by default if left\n unspecified.\n \n+- ``mr_ext_memseg_en`` parameter [int]\n+\n+ A nonzero value enables extending memseg when registering DMA memory. If\n+ enabled, the number of entries in MR (Memory Region) lookup table on datapath\n+ is minimized and it benefits performance. On the other hand, it worsens memory\n+ utilization because registered memory is pinned by kernel driver. Even if a\n+ page in the extended chunk is freed, that doesn't become reusable until the\n+ entire memory is freed.\n+\n+ Enabled by default.\n+\n Kernel module parameters\n ~~~~~~~~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c\nindex a5cfcdbee3..d913c2a47e 100644\n--- a/drivers/net/mlx4/mlx4.c\n+++ b/drivers/net/mlx4/mlx4.c\n@@ -71,11 +71,14 @@ struct mlx4_conf {\n \t\tuint32_t present; /**< Bit-field for existing ports. */\n \t\tuint32_t enabled; /**< Bit-field for user-enabled ports. */\n \t} ports;\n+\tint mr_ext_memseg_en;\n+\t/** Whether memseg should be extended for MR creation. */\n };\n \n /* Available parameters list. */\n const char *pmd_mlx4_init_params[] = {\n \tMLX4_PMD_PORT_KVARG,\n+\tMLX4_MR_EXT_MEMSEG_EN_KVARG,\n \tNULL,\n };\n \n@@ -516,6 +519,8 @@ mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)\n \t\t\treturn -rte_errno;\n \t\t}\n \t\tconf->ports.enabled |= 1 << tmp;\n+\t} else if (strcmp(MLX4_MR_EXT_MEMSEG_EN_KVARG, key) == 0) {\n+\t\tconf->mr_ext_memseg_en = !!tmp;\n \t} else {\n \t\trte_errno = EINVAL;\n \t\tWARN(\"%s: unknown parameter\", key);\n@@ -551,10 +556,10 @@ mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)\n \t}\n \t/* Process parameters. */\n \tfor (i = 0; pmd_mlx4_init_params[i]; ++i) {\n-\t\targ_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);\n+\t\targ_count = rte_kvargs_count(kvlist, pmd_mlx4_init_params[i]);\n \t\twhile (arg_count-- > 0) {\n \t\t\tret = rte_kvargs_process(kvlist,\n-\t\t\t\t\t\t MLX4_PMD_PORT_KVARG,\n+\t\t\t\t\t\t pmd_mlx4_init_params[i],\n \t\t\t\t\t\t (int (*)(const char *,\n \t\t\t\t\t\t\t const char *,\n \t\t\t\t\t\t\t void *))\n@@ -883,6 +888,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \tstruct ibv_device_attr_ex device_attr_ex;\n \tstruct mlx4_conf conf = {\n \t\t.ports.present = 0,\n+\t\t.mr_ext_memseg_en = 1,\n \t};\n \tunsigned int vf;\n \tint i;\n@@ -1100,6 +1106,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\t\t\t\tdevice_attr_ex.tso_caps.max_tso;\n \t\tDEBUG(\"TSO is %ssupported\",\n \t\t priv->tso ? \"\" : \"not \");\n+\t\tpriv->mr_ext_memseg_en = conf.mr_ext_memseg_en;\n \t\t/* Configure the first MAC address by default. */\n \t\terr = mlx4_get_mac(priv, &mac.addr_bytes);\n \t\tif (err) {\ndiff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h\nindex 832edc962d..5316c51247 100644\n--- a/drivers/net/mlx4/mlx4.h\n+++ b/drivers/net/mlx4/mlx4.h\n@@ -53,6 +53,9 @@\n /** Port parameter. */\n #define MLX4_PMD_PORT_KVARG \"port\"\n \n+/** Enable extending memsegs when creating a MR. */\n+#define MLX4_MR_EXT_MEMSEG_EN_KVARG \"mr_ext_memseg_en\"\n+\n /* Reserved address space for UAR mapping. */\n #define MLX4_UAR_SIZE (1ULL << (sizeof(uintptr_t) * 4))\n \n@@ -164,6 +167,8 @@ struct mlx4_priv {\n \tuint32_t hw_csum_l2tun:1; /**< Checksum support for L2 tunnels. */\n \tuint32_t hw_fcs_strip:1; /**< FCS stripping toggling is supported. */\n \tuint32_t tso:1; /**< Transmit segmentation offload is supported. */\n+\tuint32_t mr_ext_memseg_en:1;\n+\t/** Whether memseg should be extended for MR creation. */\n \tuint32_t tso_max_payload_sz; /**< Max supported TSO payload size. */\n \tuint32_t hw_rss_max_qps; /**< Max Rx Queues supported by RSS. */\n \tuint64_t hw_rss_sup; /**< Supported RSS hash fields (Verbs format). */\ndiff --git a/drivers/net/mlx4/mlx4_mr.c b/drivers/net/mlx4/mlx4_mr.c\nindex 0ba55fda04..6db917a092 100644\n--- a/drivers/net/mlx4/mlx4_mr.c\n+++ b/drivers/net/mlx4/mlx4_mr.c\n@@ -580,14 +580,24 @@ mlx4_mr_create(struct rte_eth_dev *dev, struct mlx4_mr_cache *entry,\n \t */\n \tmlx4_mr_garbage_collect(dev);\n \t/*\n-\t * Find out a contiguous virtual address chunk in use, to which the\n-\t * given address belongs, in order to register maximum range. In the\n-\t * best case where mempools are not dynamically recreated and\n+\t * If enabled, find out a contiguous virtual address chunk in use, to\n+\t * which the given address belongs, in order to register maximum range.\n+\t * In the best case where mempools are not dynamically recreated and\n \t * '--socket-mem' is specified as an EAL option, it is very likely to\n \t * have only one MR(LKey) per a socket and per a hugepage-size even\n-\t * though the system memory is highly fragmented.\n+\t * though the system memory is highly fragmented. As the whole memory\n+\t * chunk will be pinned by kernel, it can't be reused unless entire\n+\t * chunk is freed from EAL.\n+\t *\n+\t * If disabled, just register one memseg (page). Then, memory\n+\t * consumption will be minimized but it may drop performance if there\n+\t * are many MRs to lookup on the datapath.\n \t */\n-\tif (!rte_memseg_contig_walk(mr_find_contig_memsegs_cb, &data)) {\n+\tif (!priv->mr_ext_memseg_en) {\n+\t\tdata.msl = rte_mem_virt2memseg_list((void *)addr);\n+\t\tdata.start = RTE_ALIGN_FLOOR(addr, data.msl->page_sz);\n+\t\tdata.end = data.start + data.msl->page_sz;\n+\t} else if (!rte_memseg_contig_walk(mr_find_contig_memsegs_cb, &data)) {\n \t\tWARN(\"port %u unable to find virtually contiguous\"\n \t\t \" chunk for address (%p).\"\n \t\t \" rte_memseg_contig_walk() failed.\",\n", "prefixes": [ "v2", "5/6" ] }