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GET /api/patches/512/?format=api
{ "id": 512, "url": "https://patches.dpdk.org/api/patches/512/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1411654744-9460-7-git-send-email-changchun.ouyang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411654744-9460-7-git-send-email-changchun.ouyang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411654744-9460-7-git-send-email-changchun.ouyang@intel.com", "date": "2014-09-25T14:18:52", "name": "[dpdk-dev,06/18] ixgbe: New argument in host interface command function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "69e5a775a9fcd3062bb5a122679049a018be7fd1", "submitter": { "id": 31, "url": "https://patches.dpdk.org/api/people/31/?format=api", "name": "Ouyang Changchun", "email": "changchun.ouyang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1411654744-9460-7-git-send-email-changchun.ouyang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/512/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/512/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 8DBC5B40B;\n\tThu, 25 Sep 2014 16:13:13 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 427F9B3B6\n\tfor <dev@dpdk.org>; Thu, 25 Sep 2014 16:13:09 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga103.jf.intel.com with ESMTP; 25 Sep 2014 07:17:25 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 25 Sep 2014 07:19:25 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s8PEJNMT027776;\n\tThu, 25 Sep 2014 22:19:23 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s8PEJLs8009535; Thu, 25 Sep 2014 22:19:23 +0800", "(from couyang@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s8PEJLi2009531; \n\tThu, 25 Sep 2014 22:19:21 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,597,1406617200\"; d=\"scan'208\";a=\"608500060\"", "From": "Ouyang Changchun <changchun.ouyang@intel.com>", "To": "dev@dpdk.org", "Date": "Thu, 25 Sep 2014 22:18:52 +0800", "Message-Id": "<1411654744-9460-7-git-send-email-changchun.ouyang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1411654744-9460-1-git-send-email-changchun.ouyang@intel.com>", "References": "<1411654744-9460-1-git-send-email-changchun.ouyang@intel.com>", "Subject": "[dpdk-dev] [PATCH 06/18] ixgbe: New argument in host interface\n\tcommand function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch introduces a new argument to let caller determine if it need read and \nreturn data or not after executing host interface command in IXGBE base code.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\n---\n lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c | 66 ++++++++++++++++++-------------\n lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h | 3 +-\n 2 files changed, 40 insertions(+), 29 deletions(-)", "diff": "diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c\nindex 4bd004c..f8f4e7e 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.c\n@@ -4341,41 +4341,50 @@ u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)\n * @buffer: contains the command to write and where the return status will\n * be placed\n * @length: length of buffer, must be multiple of 4 bytes\n+ * @return_data: read and return data from the buffer (true) or not (false)\n+ * Needed because FW structures are big endian and decoding of\n+ * these fields can be 8 bit or 16 bit based on command. Decoding\n+ * is not easily understood without making a table of commands.\n+ * So we will leave this up to the caller to read back the data\n+ * in these cases.\n *\n * Communicates with the manageability block. On success return IXGBE_SUCCESS\n * else return IXGBE_ERR_HOST_INTERFACE_COMMAND.\n **/\n s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,\n-\t\t\t\t u32 length)\n+\t\t\t\t u32 length, bool return_data)\n {\n-\tu32 hicr, i, bi;\n+\tu32 hicr, i, bi, fwsts;\n \tu32 hdr_size = sizeof(struct ixgbe_hic_hdr);\n-\tu8 buf_len, dword_len;\n-\n-\ts32 ret_val = IXGBE_SUCCESS;\n+\tu16 buf_len;\n+\tu8 dword_len;\n \n \tDEBUGFUNC(\"ixgbe_host_interface_command\");\n \n-\tif (length == 0 || length & 0x3 ||\n-\t length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {\n-\t\tDEBUGOUT(\"Buffer length failure.\\n\");\n-\t\tret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;\n-\t\tgoto out;\n+\tif (length == 0 || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {\n+\t\tDEBUGOUT1(\"Buffer length failure buffersize=%d.\\n\", length);\n+\t\treturn IXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n+\t/* Set bit 9 of FWSTS clearing FW reset indication */\n+\tfwsts = IXGBE_READ_REG(hw, IXGBE_FWSTS);\n+\tIXGBE_WRITE_REG(hw, IXGBE_FWSTS, fwsts | IXGBE_FWSTS_FWRI);\n \n \t/* Check that the host interface is enabled. */\n \thicr = IXGBE_READ_REG(hw, IXGBE_HICR);\n \tif ((hicr & IXGBE_HICR_EN) == 0) {\n \t\tDEBUGOUT(\"IXGBE_HOST_EN bit disabled.\\n\");\n-\t\tret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;\n-\t\tgoto out;\n+\t\treturn IXGBE_ERR_HOST_INTERFACE_COMMAND;\n+\t}\n+\n+\t/* Calculate length in DWORDs. We must be DWORD aligned */\n+\tif ((length % (sizeof(u32))) != 0) {\n+\t\tDEBUGOUT(\"Buffer length failure, not aligned to dword\");\n+\t\treturn IXGBE_ERR_INVALID_ARGUMENT;\n \t}\n \n-\t/* Calculate length in DWORDs */\n \tdword_len = length >> 2;\n \n-\t/*\n-\t * The device driver writes the relevant command block\n+\t/* The device driver writes the relevant command block\n \t * into the ram area.\n \t */\n \tfor (i = 0; i < dword_len; i++)\n@@ -4392,14 +4401,17 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,\n \t\tmsec_delay(1);\n \t}\n \n-\t/* Check command successful completion. */\n+\t/* Check command completion */\n \tif (i == IXGBE_HI_COMMAND_TIMEOUT ||\n-\t (!(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV))) {\n-\t\tDEBUGOUT(\"Command has failed with no status valid.\\n\");\n-\t\tret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;\n-\t\tgoto out;\n+\t !(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) {\n+\t\tERROR_REPORT1(IXGBE_ERROR_CAUTION,\n+\t\t\t \"Command has failed with no status valid.\\n\");\n+\t\treturn IXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n+\tif (!return_data)\n+\t\treturn 0;\n+\n \t/* Calculate length in DWORDs */\n \tdword_len = hdr_size >> 2;\n \n@@ -4412,25 +4424,23 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,\n \t/* If there is any thing in data position pull it in */\n \tbuf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len;\n \tif (buf_len == 0)\n-\t\tgoto out;\n+\t\treturn 0;\n \n-\tif (length < (buf_len + hdr_size)) {\n+\tif (length < buf_len + hdr_size) {\n \t\tDEBUGOUT(\"Buffer not large enough for reply message.\\n\");\n-\t\tret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND;\n-\t\tgoto out;\n+\t\treturn IXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n \t/* Calculate length in DWORDs, add 3 for odd lengths */\n \tdword_len = (buf_len + 3) >> 2;\n \n-\t/* Pull in the rest of the buffer (bi is where we left off)*/\n+\t/* Pull in the rest of the buffer (bi is where we left off) */\n \tfor (; bi <= dword_len; bi++) {\n \t\tbuffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);\n \t\tIXGBE_LE32_TO_CPUS(&buffer[bi]);\n \t}\n \n-out:\n-\treturn ret_val;\n+\treturn 0;\n }\n \n /**\n@@ -4477,7 +4487,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,\n \n \tfor (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {\n \t\tret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,\n-\t\t\t\t\t\t sizeof(fw_cmd));\n+\t\t\t\t\t\t sizeof(fw_cmd), true);\n \t\tif (ret_val != IXGBE_SUCCESS)\n \t\t\tcontinue;\n \ndiff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h\nindex 03e71c0..8b8bd0b 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h\n+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h\n@@ -157,7 +157,8 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,\n \t\t\t\t u8 build, u8 ver);\n u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);\n s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,\n-\t\t\t\t u32 length);\n+\t\t\t\t u32 length, bool return_data);\n+\n void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);\n \n extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);\n", "prefixes": [ "dpdk-dev", "06/18" ] }