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GET /api/patches/51020/?format=api
{ "id": 51020, "url": "https://patches.dpdk.org/api/patches/51020/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/200fc09b8d81cecab76bdb433be338e65fe7b3c2.1552206211.git.shahafs@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<200fc09b8d81cecab76bdb433be338e65fe7b3c2.1552206211.git.shahafs@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/200fc09b8d81cecab76bdb433be338e65fe7b3c2.1552206211.git.shahafs@mellanox.com", "date": "2019-03-10T08:28:02", "name": "[v4,5/6] net/mlx5: support PCI device DMA map and unmap", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3b063cad6df71dda99d40b683f741d1a065ec530", "submitter": { "id": 634, "url": "https://patches.dpdk.org/api/people/634/?format=api", "name": "Shahaf Shuler", "email": "shahafs@mellanox.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/200fc09b8d81cecab76bdb433be338e65fe7b3c2.1552206211.git.shahafs@mellanox.com/mbox/", "series": [ { "id": 3689, "url": "https://patches.dpdk.org/api/series/3689/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3689", "date": "2019-03-10T08:27:57", "name": "introduce DMA memory mapping for external memory", "version": 4, "mbox": "https://patches.dpdk.org/series/3689/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/51020/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/51020/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B00464F94;\n\tSun, 10 Mar 2019 09:28:33 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id DB10D4C95\n\tfor <dev@dpdk.org>; Sun, 10 Mar 2019 09:28:23 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n\tshahafs@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 10 Mar 2019 10:28:18 +0200", "from unicorn01.mtl.labs.mlnx. (unicorn01.mtl.labs.mlnx\n\t[10.7.12.62])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x2A8SI5D029045;\n\tSun, 10 Mar 2019 10:28:18 +0200" ], "From": "Shahaf Shuler <shahafs@mellanox.com>", "To": "anatoly.burakov@intel.com, yskoh@mellanox.com, thomas@monjalon.net,\n\tferruh.yigit@intel.com, nhorman@tuxdriver.com, gaetan.rivet@6wind.com", "Cc": "dev@dpdk.org", "Date": "Sun, 10 Mar 2019 10:28:02 +0200", "Message-Id": "<200fc09b8d81cecab76bdb433be338e65fe7b3c2.1552206211.git.shahafs@mellanox.com>", "X-Mailer": "git-send-email 2.12.0", "In-Reply-To": "<cover.1552206210.git.shahafs@mellanox.com>", "References": "<cover.1551793527.git.shahafs@mellanox.com>\n\t<cover.1552206210.git.shahafs@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v4 5/6] net/mlx5: support PCI device DMA map and\n\tunmap", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The implementation reuses the external memory registration work done by\ncommit[1].\n\nNote about representors:\n\nThe current representor design will not work\nwith those map and unmap functions. The reason is that for representors\nwe have multiple IB devices share the same PCI function, so mapping will\nhappen only on one of the representors and not all of them.\n\nWhile it is possible to implement such support, the IB representor\ndesign is going to be changed during DPDK19.05. The new design will have\na single IB device for all representors, hence sharing of a single\nmemory region between all representors will be possible.\n\n[1]\ncommit 7e43a32ee060\n(\"net/mlx5: support externally allocated static memory\")\n\nSigned-off-by: Shahaf Shuler <shahafs@mellanox.com>\n---\n drivers/net/mlx5/mlx5.c | 2 +\n drivers/net/mlx5/mlx5_mr.c | 139 ++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_rxtx.h | 5 ++\n 3 files changed, 146 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex ae4b71695e..8141bda3fb 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1632,6 +1632,8 @@ static struct rte_pci_driver mlx5_driver = {\n \t.id_table = mlx5_pci_id_map,\n \t.probe = mlx5_pci_probe,\n \t.remove = mlx5_pci_remove,\n+\t.dma_map = mlx5_dma_map,\n+\t.dma_unmap = mlx5_dma_unmap,\n \t.drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |\n \t\t RTE_PCI_DRV_PROBE_AGAIN),\n };\ndiff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c\nindex 43ee9c961b..21f8b5e045 100644\n--- a/drivers/net/mlx5/mlx5_mr.c\n+++ b/drivers/net/mlx5/mlx5_mr.c\n@@ -14,6 +14,7 @@\n #include <rte_mempool.h>\n #include <rte_malloc.h>\n #include <rte_rwlock.h>\n+#include <rte_bus_pci.h>\n \n #include \"mlx5.h\"\n #include \"mlx5_mr.h\"\n@@ -1215,6 +1216,144 @@ mlx5_mr_update_ext_mp_cb(struct rte_mempool *mp, void *opaque,\n }\n \n /**\n+ * Finds the first ethdev that match the pci device.\n+ * The existence of multiple ethdev per pci device is only with representors.\n+ * On such case, it is enough to get only one of the ports as they all share\n+ * the same ibv context.\n+ *\n+ * @param pdev\n+ * Pointer to the PCI device.\n+ *\n+ * @return\n+ * Pointer to the ethdev if found, NULL otherwise.\n+ */\n+static struct rte_eth_dev *\n+pci_dev_to_eth_dev(struct rte_pci_device *pdev)\n+{\n+\tstruct rte_dev_iterator it;\n+\tstruct rte_device *dev;\n+\n+\t/**\n+\t * We really need to iterate all devices regardless of\n+\t * their owner.\n+\t */\n+\tRTE_DEV_FOREACH(dev, \"class=eth\", &it)\n+\t\tif (dev == &pdev->device)\n+\t\t\treturn it.class_device;\n+\treturn NULL;\n+}\n+\n+/**\n+ * DPDK callback to DMA map external memory to a PCI device.\n+ *\n+ * @param pdev\n+ * Pointer to the PCI device.\n+ * @param addr\n+ * Starting virtual address of memory to be mapped.\n+ * @param iova\n+ * Starting IOVA address of memory to be mapped.\n+ * @param len\n+ * Length of memory segment being mapped.\n+ *\n+ * @return\n+ * 0 on success, negative value on error.\n+ */\n+int\n+mlx5_dma_map(struct rte_pci_device *pdev, void *addr,\n+\t uint64_t iova __rte_unused, size_t len)\n+{\n+\tstruct rte_eth_dev *dev;\n+\tstruct mlx5_mr *mr;\n+\tstruct mlx5_priv *priv;\n+\n+\tdev = pci_dev_to_eth_dev(pdev);\n+\tif (!dev) {\n+\t\tDRV_LOG(WARNING, \"unable to find matching ethdev \"\n+\t\t\t\t \"to PCI device %p\", (void *)pdev);\n+\t\trte_errno = ENODEV;\n+\t\treturn -1;\n+\t}\n+\tpriv = dev->data->dev_private;\n+\tmr = mlx5_create_mr_ext(dev, (uintptr_t)addr, len, SOCKET_ID_ANY);\n+\tif (!mr) {\n+\t\tDRV_LOG(WARNING,\n+\t\t\t\"port %u unable to dma map\", dev->data->port_id);\n+\t\trte_errno = EINVAL;\n+\t\treturn -1;\n+\t}\n+\trte_rwlock_write_lock(&priv->mr.rwlock);\n+\tLIST_INSERT_HEAD(&priv->mr.mr_list, mr, mr);\n+\t/* Insert to the global cache table. */\n+\tmr_insert_dev_cache(dev, mr);\n+\trte_rwlock_write_unlock(&priv->mr.rwlock);\n+\treturn 0;\n+}\n+\n+/**\n+ * DPDK callback to DMA unmap external memory to a PCI device.\n+ *\n+ * @param pdev\n+ * Pointer to the PCI device.\n+ * @param addr\n+ * Starting virtual address of memory to be unmapped.\n+ * @param iova\n+ * Starting IOVA address of memory to be unmapped.\n+ * @param len\n+ * Length of memory segment being unmapped.\n+ *\n+ * @return\n+ * 0 on success, negative value on error.\n+ */\n+int\n+mlx5_dma_unmap(struct rte_pci_device *pdev, void *addr,\n+\t uint64_t iova __rte_unused, size_t len __rte_unused)\n+{\n+\tstruct rte_eth_dev *dev;\n+\tstruct mlx5_priv *priv;\n+\tstruct mlx5_mr *mr;\n+\tstruct mlx5_mr_cache entry;\n+\n+\tdev = pci_dev_to_eth_dev(pdev);\n+\tif (!dev) {\n+\t\tDRV_LOG(WARNING, \"unable to find matching ethdev \"\n+\t\t\t\t \"to PCI device %p\", (void *)pdev);\n+\t\trte_errno = ENODEV;\n+\t\treturn -1;\n+\t}\n+\tpriv = dev->data->dev_private;\n+\trte_rwlock_read_lock(&priv->mr.rwlock);\n+\tmr = mr_lookup_dev_list(dev, &entry, (uintptr_t)addr);\n+\tif (!mr) {\n+\t\trte_rwlock_read_unlock(&priv->mr.rwlock);\n+\t\tDRV_LOG(WARNING, \"address 0x%\" PRIxPTR \" wasn't registered \"\n+\t\t\t\t \"to PCI device %p\", (uintptr_t)addr,\n+\t\t\t\t (void *)pdev);\n+\t\trte_errno = EINVAL;\n+\t\treturn -1;\n+\t}\n+\tLIST_REMOVE(mr, mr);\n+\tLIST_INSERT_HEAD(&priv->mr.mr_free_list, mr, mr);\n+\tDEBUG(\"port %u remove MR(%p) from list\", dev->data->port_id,\n+\t (void *)mr);\n+\tmr_rebuild_dev_cache(dev);\n+\t/*\n+\t * Flush local caches by propagating invalidation across cores.\n+\t * rte_smp_wmb() is enough to synchronize this event. If one of\n+\t * freed memsegs is seen by other core, that means the memseg\n+\t * has been allocated by allocator, which will come after this\n+\t * free call. Therefore, this store instruction (incrementing\n+\t * generation below) will be guaranteed to be seen by other core\n+\t * before the core sees the newly allocated memory.\n+\t */\n+\t++priv->mr.dev_gen;\n+\tDEBUG(\"broadcasting local cache flush, gen=%d\",\n+\t\t\tpriv->mr.dev_gen);\n+\trte_smp_wmb();\n+\trte_rwlock_read_unlock(&priv->mr.rwlock);\n+\treturn 0;\n+}\n+\n+/**\n * Register MR for entire memory chunks in a Mempool having externally allocated\n * memory and fill in local cache.\n *\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 53115dde3d..ced9945888 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -28,6 +28,7 @@\n #include <rte_atomic.h>\n #include <rte_spinlock.h>\n #include <rte_io.h>\n+#include <rte_bus_pci.h>\n \n #include \"mlx5_utils.h\"\n #include \"mlx5.h\"\n@@ -367,6 +368,10 @@ uint32_t mlx5_rx_addr2mr_bh(struct mlx5_rxq_data *rxq, uintptr_t addr);\n uint32_t mlx5_tx_mb2mr_bh(struct mlx5_txq_data *txq, struct rte_mbuf *mb);\n uint32_t mlx5_tx_update_ext_mp(struct mlx5_txq_data *txq, uintptr_t addr,\n \t\t\t struct rte_mempool *mp);\n+int mlx5_dma_map(struct rte_pci_device *pdev, void *addr, uint64_t iova,\n+\t\t size_t len);\n+int mlx5_dma_unmap(struct rte_pci_device *pdev, void *addr, uint64_t iova,\n+\t\t size_t len);\n \n /**\n * Provide safe 64bit store operation to mlx5 UAR region for both 32bit and\n", "prefixes": [ "v4", "5/6" ] }