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GET /api/patches/50420/?format=api
{ "id": 50420, "url": "https://patches.dpdk.org/api/patches/50420/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/4c5192327d5b15e98e441968c6189023e6c552b2.1550760032.git.shahafs@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<4c5192327d5b15e98e441968c6189023e6c552b2.1550760032.git.shahafs@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/4c5192327d5b15e98e441968c6189023e6c552b2.1550760032.git.shahafs@mellanox.com", "date": "2019-02-21T14:50:47", "name": "[v2,4/6] net/mlx5: refactor external memory registration", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cc147d37a6629acc7f181ee5269d385ac693b858", "submitter": { "id": 634, "url": "https://patches.dpdk.org/api/people/634/?format=api", "name": "Shahaf Shuler", "email": "shahafs@mellanox.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/4c5192327d5b15e98e441968c6189023e6c552b2.1550760032.git.shahafs@mellanox.com/mbox/", "series": [ { "id": 3501, "url": "https://patches.dpdk.org/api/series/3501/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3501", "date": "2019-02-21T14:50:46", "name": "introduce DMA memory mapping for external memory", "version": 2, "mbox": "https://patches.dpdk.org/series/3501/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/50420/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/50420/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 977973421;\n\tThu, 21 Feb 2019 15:51:16 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 7F79A2BD5\n\tfor <dev@dpdk.org>; Thu, 21 Feb 2019 15:51:06 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n\tshahafs@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 21 Feb 2019 16:51:02 +0200", "from unicorn01.mtl.labs.mlnx. (unicorn01.mtl.labs.mlnx\n\t[10.7.12.62])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x1LEp2lr022817;\n\tThu, 21 Feb 2019 16:51:02 +0200" ], "From": "Shahaf Shuler <shahafs@mellanox.com>", "To": "anatoly.burakov@intel.com, yskoh@mellanox.com, thomas@monjalon.net,\n\tferruh.yigit@intel.com, nhorman@tuxdriver.com, gaetan.rivet@6wind.com", "Cc": "dev@dpdk.org", "Date": "Thu, 21 Feb 2019 16:50:47 +0200", "Message-Id": "<4c5192327d5b15e98e441968c6189023e6c552b2.1550760032.git.shahafs@mellanox.com>", "X-Mailer": "git-send-email 2.12.0", "In-Reply-To": [ "<cover.1550760026.git.shahafs@mellanox.com>", "<cover.1550760026.git.shahafs@mellanox.com>" ], "References": [ "<cover.1550760026.git.shahafs@mellanox.com>", "<cover.1550048187.git.shahafs@mellanox.com>\n\t<cover.1550760026.git.shahafs@mellanox.com>" ], "Subject": "[dpdk-dev] [PATCH v2 4/6] net/mlx5: refactor external memory\n\tregistration", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Move the memory region creation to a separate function to\nprepare the ground for the reuse of it on the PCI driver map and unmap\nfunctions.\n\nSigned-off-by: Shahaf Shuler <shahafs@mellanox.com>\n---\n drivers/net/mlx5/mlx5_mr.c | 86 +++++++++++++++++++++++++++--------------\n 1 file changed, 57 insertions(+), 29 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c\nindex 442b2d2321..32be6a5445 100644\n--- a/drivers/net/mlx5/mlx5_mr.c\n+++ b/drivers/net/mlx5/mlx5_mr.c\n@@ -1109,6 +1109,58 @@ mlx5_mr_flush_local_cache(struct mlx5_mr_ctrl *mr_ctrl)\n }\n \n /**\n+ * Creates a memory region for external memory, that is memory which is not\n+ * part of the DPDK memory segments.\n+ *\n+ * @param dev\n+ * Pointer to the ethernet device.\n+ * @param addr\n+ * Starting virtual address of memory.\n+ * @param len\n+ * Length of memory segment being mapped.\n+ * @param socked_id\n+ * Socket to allocate heap memory for the control structures.\n+ *\n+ * @return\n+ * Pointer to MR structure on success, NULL otherwise.\n+ */\n+static struct mlx5_mr *\n+mlx5_create_mr_ext(struct rte_eth_dev *dev, uintptr_t addr, size_t len,\n+\t\t int socket_id)\n+{\n+\tstruct priv *priv = dev->data->dev_private;\n+\tstruct mlx5_mr *mr = NULL;\n+\n+\tmr = rte_zmalloc_socket(NULL,\n+\t\t\t\tRTE_ALIGN_CEIL(sizeof(*mr),\n+\t\t\t\t\t RTE_CACHE_LINE_SIZE),\n+\t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n+\tif (mr == NULL)\n+\t\treturn NULL;\n+\tmr->ibv_mr = mlx5_glue->reg_mr(priv->pd, (void *)addr, len,\n+\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n+\tif (mr->ibv_mr == NULL) {\n+\t\tDRV_LOG(WARNING,\n+\t\t\t\"port %u fail to create a verbs MR for address (%p)\",\n+\t\t\tdev->data->port_id, (void *)addr);\n+\t\trte_free(mr);\n+\t\treturn NULL;\n+\t}\n+\tmr->msl = NULL; /* Mark it is external memory. */\n+\tmr->ms_bmp = NULL;\n+\tmr->ms_n = 1;\n+\tmr->ms_bmp_n = 1;\n+\tDRV_LOG(DEBUG,\n+\t\t\"port %u MR CREATED (%p) for external memory %p:\\n\"\n+\t\t\" [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n+\t\t\" lkey=0x%x base_idx=%u ms_n=%u, ms_bmp_n=%u\",\n+\t\tdev->data->port_id, (void *)mr, (void *)addr,\n+\t\taddr, addr + len, rte_cpu_to_be_32(mr->ibv_mr->lkey),\n+\t\tmr->ms_base_idx, mr->ms_n, mr->ms_bmp_n);\n+\treturn mr;\n+}\n+\n+/**\n * Called during rte_mempool_mem_iter() by mlx5_mr_update_ext_mp().\n *\n * Externally allocated chunk is registered and a MR is created for the chunk.\n@@ -1142,43 +1194,19 @@ mlx5_mr_update_ext_mp_cb(struct rte_mempool *mp, void *opaque,\n \trte_rwlock_read_unlock(&priv->mr.rwlock);\n \tif (lkey != UINT32_MAX)\n \t\treturn;\n-\tmr = rte_zmalloc_socket(NULL,\n-\t\t\t\tRTE_ALIGN_CEIL(sizeof(*mr),\n-\t\t\t\t\t RTE_CACHE_LINE_SIZE),\n-\t\t\t\tRTE_CACHE_LINE_SIZE, mp->socket_id);\n-\tif (mr == NULL) {\n-\t\tDRV_LOG(WARNING,\n-\t\t\t\"port %u unable to allocate memory for a new MR of\"\n-\t\t\t\" mempool (%s).\",\n-\t\t\tdev->data->port_id, mp->name);\n-\t\tdata->ret = -1;\n-\t\treturn;\n-\t}\n \tDRV_LOG(DEBUG, \"port %u register MR for chunk #%d of mempool (%s)\",\n \t\tdev->data->port_id, mem_idx, mp->name);\n-\tmr->ibv_mr = mlx5_glue->reg_mr(priv->pd, (void *)addr, len,\n-\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n-\tif (mr->ibv_mr == NULL) {\n+\tmr = mlx5_create_mr_ext(dev, addr, len, mp->socket_id);\n+\tif (!mr) {\n \t\tDRV_LOG(WARNING,\n-\t\t\t\"port %u fail to create a verbs MR for address (%p)\",\n-\t\t\tdev->data->port_id, (void *)addr);\n-\t\trte_free(mr);\n+\t\t\t\"port %u unable to allocate a new MR of\"\n+\t\t\t\" mempool (%s).\",\n+\t\t\tdev->data->port_id, mp->name);\n \t\tdata->ret = -1;\n \t\treturn;\n \t}\n-\tmr->msl = NULL; /* Mark it is external memory. */\n-\tmr->ms_bmp = NULL;\n-\tmr->ms_n = 1;\n-\tmr->ms_bmp_n = 1;\n \trte_rwlock_write_lock(&priv->mr.rwlock);\n \tLIST_INSERT_HEAD(&priv->mr.mr_list, mr, mr);\n-\tDRV_LOG(DEBUG,\n-\t\t\"port %u MR CREATED (%p) for external memory %p:\\n\"\n-\t\t\" [0x%\" PRIxPTR \", 0x%\" PRIxPTR \"),\"\n-\t\t\" lkey=0x%x base_idx=%u ms_n=%u, ms_bmp_n=%u\",\n-\t\tdev->data->port_id, (void *)mr, (void *)addr,\n-\t\taddr, addr + len, rte_cpu_to_be_32(mr->ibv_mr->lkey),\n-\t\tmr->ms_base_idx, mr->ms_n, mr->ms_bmp_n);\n \t/* Insert to the global cache table. */\n \tmr_insert_dev_cache(dev, mr);\n \trte_rwlock_write_unlock(&priv->mr.rwlock);\n", "prefixes": [ "v2", "4/6" ] }