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GET /api/patches/504/?format=api
{ "id": 504, "url": "https://patches.dpdk.org/api/patches/504/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1411634427-746-5-git-send-email-helin.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411634427-746-5-git-send-email-helin.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411634427-746-5-git-send-email-helin.zhang@intel.com", "date": "2014-09-25T08:40:18", "name": "[dpdk-dev,v2,04/13] ethdev: support of multiple sizes of redirection table", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8b3c2a5ec9365f7bbc37b266493dda977e84ca2d", "submitter": { "id": 14, "url": "https://patches.dpdk.org/api/people/14/?format=api", "name": "Zhang, Helin", "email": "helin.zhang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1411634427-746-5-git-send-email-helin.zhang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/504/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/504/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id D15AAB3D8;\n\tThu, 25 Sep 2014 10:35:02 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 7947BB3D8\n\tfor <dev@dpdk.org>; Thu, 25 Sep 2014 10:35:00 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga103.jf.intel.com with ESMTP; 25 Sep 2014 01:39:16 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga001.jf.intel.com with ESMTP; 25 Sep 2014 01:40:42 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s8P8ee44002309;\n\tThu, 25 Sep 2014 16:40:40 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s8P8ecHx000809; Thu, 25 Sep 2014 16:40:40 +0800", "(from hzhan75@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s8P8ecjr000805; \n\tThu, 25 Sep 2014 16:40:38 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,595,1406617200\"; d=\"scan'208\";a=\"578729181\"", "From": "Helin Zhang <helin.zhang@intel.com>", "To": "dev@dpdk.org", "Date": "Thu, 25 Sep 2014 16:40:18 +0800", "Message-Id": "<1411634427-746-5-git-send-email-helin.zhang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1411634427-746-1-git-send-email-helin.zhang@intel.com>", "References": "<1411634427-746-1-git-send-email-helin.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 04/13] ethdev: support of multiple sizes of\n\tredirection table", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To support possible different sizes of redirection table,\nstructures and functions need to be redefined. In detail,\n* 'struct rte_eth_rss_reta' has been redefined.\n* 'uint16_t reta_size' has been added into\n 'struct rte_eth_dev_info'.\n* Updating/querying reta have been reimplemented with one\n more parameter of redirection table size.\n\nv2 changes:\n* Put changes for supporting multiple sizes of reta in\n ethdev into a single patch.\n\nSigned-off-by: Helin Zhang <helin.zhang@intel.com>\nReviewed-by: Jijiang Liu <jijiang.liu@intel.com>\nReviewed-by: Cunming Liang <cunming.liang@intel.com>\nReviewed-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n lib/librte_ether/rte_ethdev.c | 116 ++++++++++++++++++++++++++----------------\n lib/librte_ether/rte_ethdev.h | 43 ++++++++++------\n 2 files changed, 99 insertions(+), 60 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex b71b679..8c1cb25 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -1917,78 +1917,104 @@ rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc\n \treturn (-ENOTSUP);\n }\n \n-int\n-rte_eth_dev_rss_reta_update(uint8_t port_id, struct rte_eth_rss_reta *reta_conf)\n+static inline int\n+rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\tuint16_t reta_size)\n {\n-\tstruct rte_eth_dev *dev;\n-\tuint16_t max_rxq;\n-\tuint8_t i,j;\n+\tuint16_t i, num = reta_size / RTE_BIT_WIDTH_64;\n \n-\tif (port_id >= nb_ports) {\n-\t\tPMD_DEBUG_TRACE(\"Invalid port_id=%d\\n\", port_id);\n-\t\treturn (-ENODEV);\n-\t}\n+\tif (!reta_conf)\n+\t\treturn -EINVAL;\n \n-\t/* Invalid mask bit(s) setting */\n-\tif ((reta_conf->mask_lo == 0) && (reta_conf->mask_hi == 0)) {\n-\t\tPMD_DEBUG_TRACE(\"Invalid update mask bits for port=%d\\n\",port_id);\n-\t\treturn (-EINVAL);\n+\tfor (i = 0; i < num; i++) {\n+\t\tif (reta_conf[i].mask)\n+\t\t\treturn 0;\n \t}\n \n-\tdev = &rte_eth_devices[port_id];\n-\tmax_rxq = (dev->data->nb_rx_queues <= ETH_RSS_RETA_MAX_QUEUE) ?\n-\t\tdev->data->nb_rx_queues : ETH_RSS_RETA_MAX_QUEUE;\n-\tif (reta_conf->mask_lo != 0) {\n-\t\tfor (i = 0; i < ETH_RSS_RETA_NUM_ENTRIES/2; i++) {\n-\t\t\tif ((reta_conf->mask_lo & (1ULL << i)) &&\n-\t\t\t\t(reta_conf->reta[i] >= max_rxq)) {\n-\t\t\t\tPMD_DEBUG_TRACE(\"RETA hash index output\"\n-\t\t\t\t\t\"configration for port=%d,invalid\"\n-\t\t\t\t\t\"queue=%d\\n\",port_id,reta_conf->reta[i]);\n+\treturn -EINVAL;\n+}\n \n-\t\t\t\treturn (-EINVAL);\n-\t\t\t}\n+static inline int\n+rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size,\n+\t\t\t uint8_t max_rxq)\n+{\n+\tuint16_t i, idx, shift;\n+\n+\tif (!reta_conf)\n+\t\treturn -EINVAL;\n+\n+\tif (max_rxq == 0) {\n+\t\tPMD_DEBUG_TRACE(\"No receive queue is available\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (i = 0; i < reta_size; i++) {\n+\t\tidx = i / RTE_BIT_WIDTH_64;\n+\t\tshift = i % RTE_BIT_WIDTH_64;\n+\t\tif ((reta_conf[idx].mask & (0x1 << shift)) &&\n+\t\t\t(reta_conf[idx].reta[shift] >= max_rxq)) {\n+\t\t\tPMD_DEBUG_TRACE(\"reta_conf[%u]->reta[%u]: %u exceeds \"\n+\t\t\t\t\"the maximum rxq index: %u\\n\", idx, shift,\n+\t\t\t\treta_conf[idx].reta[shift], max_rxq);\n+\t\t\treturn -EINVAL;\n \t\t}\n \t}\n \n-\tif (reta_conf->mask_hi != 0) {\n-\t\tfor (i = 0; i< ETH_RSS_RETA_NUM_ENTRIES/2; i++) {\n-\t\t\tj = (uint8_t)(i + ETH_RSS_RETA_NUM_ENTRIES/2);\n+\treturn 0;\n+}\n \n-\t\t\t/* Check if the max entry >= 128 */\n-\t\t\tif ((reta_conf->mask_hi & (1ULL << i)) &&\n-\t\t\t\t(reta_conf->reta[j] >= max_rxq)) {\n-\t\t\t\tPMD_DEBUG_TRACE(\"RETA hash index output\"\n-\t\t\t\t\t\"configration for port=%d,invalid\"\n-\t\t\t\t\t\"queue=%d\\n\",port_id,reta_conf->reta[j]);\n+int\n+rte_eth_dev_rss_reta_update(uint8_t port_id,\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size)\n+{\n+\tstruct rte_eth_dev *dev;\n+\tint ret;\n \n-\t\t\t\treturn (-EINVAL);\n-\t\t\t}\n-\t\t}\n+\tif (port_id >= nb_ports) {\n+\t\tPMD_DEBUG_TRACE(\"Invalid port_id=%d\\n\", port_id);\n+\t\treturn -ENODEV;\n \t}\n \n+\t/* Check mask bits */\n+\tret = rte_eth_check_reta_mask(reta_conf, reta_size);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\tdev = &rte_eth_devices[port_id];\n+\n+\t/* Check entry value */\n+\tret = rte_eth_check_reta_entry(reta_conf, reta_size,\n+\t\t\t\tdev->data->nb_rx_queues);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n \tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);\n-\treturn (*dev->dev_ops->reta_update)(dev, reta_conf);\n+\treturn (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);\n }\n \n int\n-rte_eth_dev_rss_reta_query(uint8_t port_id, struct rte_eth_rss_reta *reta_conf)\n+rte_eth_dev_rss_reta_query(uint8_t port_id,\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size)\n {\n \tstruct rte_eth_dev *dev;\n+\tint ret;\n \n \tif (port_id >= nb_ports) {\n \t\tPMD_DEBUG_TRACE(\"Invalid port_id=%d\\n\", port_id);\n-\t\treturn (-ENODEV);\n+\t\treturn -ENODEV;\n \t}\n \n-\tif((reta_conf->mask_lo == 0) && (reta_conf->mask_hi == 0)) {\n-\t\tPMD_DEBUG_TRACE(\"Invalid update mask bits for the port=%d\\n\",port_id);\n-\t\treturn (-EINVAL);\n-\t}\n+\t/* Check mask bits */\n+\tret = rte_eth_check_reta_mask(reta_conf, reta_size);\n+\tif (ret < 0)\n+\t\treturn ret;\n \n \tdev = &rte_eth_devices[port_id];\n \tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);\n-\treturn (*dev->dev_ops->reta_query)(dev, reta_conf);\n+\treturn (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);\n }\n \n int\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex 2c5ab13..9ed4437 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -426,8 +426,11 @@ struct rte_eth_rss_conf {\n \t\tETH_RSS_L2_PAYLOAD)\n \n /* Definitions used for redirection table entry size */\n-#define ETH_RSS_RETA_NUM_ENTRIES 128\n-#define ETH_RSS_RETA_MAX_QUEUE 16\n+#define ETH_RSS_RETA_SIZE_64 64\n+#define ETH_RSS_RETA_SIZE_128 128\n+#define ETH_RSS_RETA_SIZE_512 512\n+\n+#define RTE_BIT_WIDTH_64 (CHAR_BIT * sizeof(uint64_t))\n \n /* Definitions used for VMDQ and DCB functionality */\n #define ETH_VMDQ_MAX_VLAN_FILTERS 64 /**< Maximum nb. of VMDQ vlan filters. */\n@@ -491,15 +494,15 @@ struct rte_eth_vmdq_mirror_conf {\n };\n \n /**\n- * A structure used to configure Redirection Table of the Receive Side\n- * Scaling (RSS) feature of an Ethernet port.\n+ * A structure used to configure 64 entries of Redirection Table of the\n+ * Receive Side Scaling (RSS) feature of an Ethernet port. To configure\n+ * more than 64 entries supported by hardware, an array of this structure\n+ * is needed.\n */\n-struct rte_eth_rss_reta {\n-\t/** First 64 mask bits indicate which entry(s) need to updated/queried. */\n-\tuint64_t mask_lo;\n-\t/** Second 64 mask bits indicate which entry(s) need to updated/queried. */\n-\tuint64_t mask_hi;\n-\tuint8_t reta[ETH_RSS_RETA_NUM_ENTRIES]; /**< 128 RETA entries*/\n+struct rte_eth_rss_reta_entry64 {\n+\tuint64_t mask;\n+\t/**< Mask bits indicate which entries need to be updated/queried. */\n+\tuint8_t reta[RTE_BIT_WIDTH_64]; /**< 64 redirection table entries. */\n };\n \n /**\n@@ -906,6 +909,8 @@ struct rte_eth_dev_info {\n \tuint16_t max_vmdq_pools; /**< Maximum number of VMDq pools. */\n \tuint32_t rx_offload_capa; /**< Device RX offload capabilities. */\n \tuint32_t tx_offload_capa; /**< Device TX offload capabilities. */\n+\tuint16_t reta_size;\n+\t/**< Device redirection table size, the total number of entries. */\n };\n \n /** Maximum name length for extended statistics counters */\n@@ -1180,11 +1185,13 @@ typedef int (*priority_flow_ctrl_set_t)(struct rte_eth_dev *dev,\n /**< @internal Setup priority flow control parameter on an Ethernet device */\n \n typedef int (*reta_update_t)(struct rte_eth_dev *dev,\n-\t\t\t\tstruct rte_eth_rss_reta *reta_conf);\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n /**< @internal Update RSS redirection table on an Ethernet device */\n \n typedef int (*reta_query_t)(struct rte_eth_dev *dev,\n-\t\t\t\tstruct rte_eth_rss_reta *reta_conf);\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n /**< @internal Query RSS redirection table on an Ethernet device */\n \n typedef int (*rss_hash_update_t)(struct rte_eth_dev *dev,\n@@ -2896,14 +2903,17 @@ int rte_eth_dev_mac_addr_remove(uint8_t port, struct ether_addr *mac_addr);\n * @param port\n * The port identifier of the Ethernet device.\n * @param reta_conf\n- * RETA to update.\n+ * RETA to update.\n+ * @param reta_size\n+ * Redirection table size.\n * @return\n * - (0) if successful.\n * - (-ENOTSUP) if hardware doesn't support.\n * - (-EINVAL) if bad parameter.\n */\n int rte_eth_dev_rss_reta_update(uint8_t port,\n-\t\t\tstruct rte_eth_rss_reta *reta_conf);\n+\t\t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t\tuint16_t reta_size);\n \n /**\n * Query Redirection Table(RETA) of Receive Side Scaling of Ethernet device.\n@@ -2912,13 +2922,16 @@ int rte_eth_dev_rss_reta_update(uint8_t port,\n * The port identifier of the Ethernet device.\n * @param reta_conf\n * RETA to query.\n+ * @param reta_size\n+ * Redirection table size.\n * @return\n * - (0) if successful.\n * - (-ENOTSUP) if hardware doesn't support.\n * - (-EINVAL) if bad parameter.\n */\n int rte_eth_dev_rss_reta_query(uint8_t port,\n-\t\t\tstruct rte_eth_rss_reta *reta_conf);\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n \n /**\n * Updates unicast hash table for receiving packet with the given destination\n", "prefixes": [ "dpdk-dev", "v2", "04/13" ] }