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GET /api/patches/49840/?format=api
{ "id": 49840, "url": "https://patches.dpdk.org/api/patches/49840/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1547557979-153169-3-git-send-email-joyce.kong@arm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1547557979-153169-3-git-send-email-joyce.kong@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1547557979-153169-3-git-send-email-joyce.kong@arm.com", "date": "2019-01-15T13:12:58", "name": "[v2,2/3] test/rwlock: add perf test case", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9029facaca259dbd3f42272fa8c9f8e9697cac9d", "submitter": { "id": 970, "url": "https://patches.dpdk.org/api/people/970/?format=api", "name": "Joyce Kong", "email": "joyce.kong@arm.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1547557979-153169-3-git-send-email-joyce.kong@arm.com/mbox/", "series": [ { "id": 3190, "url": "https://patches.dpdk.org/api/series/3190/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3190", "date": "2019-01-15T13:12:56", "name": "reimplement rwlock and add relevant perf test case", "version": 2, "mbox": "https://patches.dpdk.org/series/3190/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/49840/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/49840/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A6E7F5F2F;\n\tTue, 15 Jan 2019 14:13:15 +0100 (CET)", "from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70])\n\tby dpdk.org (Postfix) with ESMTP id BFE435B40;\n\tTue, 15 Jan 2019 14:13:12 +0100 (CET)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 39046A78;\n\tTue, 15 Jan 2019 05:13:12 -0800 (PST)", "from net-arm-thunderx2.shanghai.arm.com\n\t(net-arm-thunderx2.shanghai.arm.com [10.169.40.106])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\tB45ED3F70D; Tue, 15 Jan 2019 05:13:10 -0800 (PST)" ], "From": "Joyce Kong <joyce.kong@arm.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, jerinj@marvell.com, hemant.agrawal@nxp.com,\n\tbruce.richardson@intel.com, chaozhu@linux.vnet.ibm.com,\n\thonnappa.nagarahalli@arm.com, nd@arm.com, stable@dpdk.org", "Date": "Tue, 15 Jan 2019 21:12:58 +0800", "Message-Id": "<1547557979-153169-3-git-send-email-joyce.kong@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1547557979-153169-1-git-send-email-joyce.kong@arm.com>", "References": "<1547557979-153169-1-git-send-email-joyce.kong@arm.com>", "Subject": "[dpdk-dev] [PATCH v2 2/3] test/rwlock: add perf test case", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add performance test on all available cores to benchmark\nthe scaling up performance of rw_lock.\n\nFixes: af75078fece3 (\"first public release\")\nCc: stable@dpdk.org\n\nSuggested-by: Gavin Hu <gavin.hu@arm.com>\nSigned-off-by: Joyce Kong <joyce.kong@arm.com>\nReviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nReviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n test/test/test_rwlock.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 73 insertions(+)", "diff": "diff --git a/test/test/test_rwlock.c b/test/test/test_rwlock.c\nindex 224f0de..250ea5a 100644\n--- a/test/test/test_rwlock.c\n+++ b/test/test/test_rwlock.c\n@@ -36,6 +36,7 @@\n \n static rte_rwlock_t sl;\n static rte_rwlock_t sl_tab[RTE_MAX_LCORE];\n+static rte_atomic32_t synchro;\n \n enum {\n \tLC_TYPE_RDLOCK,\n@@ -83,6 +84,75 @@ test_rwlock_per_core(__attribute__((unused)) void *arg)\n \treturn 0;\n }\n \n+static rte_rwlock_t lk = RTE_RWLOCK_INITIALIZER;\n+static volatile uint64_t rwlock_data;\n+static uint64_t lock_count[RTE_MAX_LCORE] = {0};\n+\n+#define TIME_MS 100\n+\n+static int\n+load_loop_fn(__attribute__((unused)) void *arg)\n+{\n+\tuint64_t time_diff = 0, begin;\n+\tuint64_t hz = rte_get_timer_hz();\n+\tuint64_t lcount = 0;\n+\tconst unsigned int lcore = rte_lcore_id();\n+\n+\t/* wait synchro for slaves */\n+\tif (lcore != rte_get_master_lcore())\n+\t\twhile (rte_atomic32_read(&synchro) == 0)\n+\t\t\t;\n+\n+\tbegin = rte_rdtsc_precise();\n+\twhile (time_diff < hz * TIME_MS / 1000) {\n+\t\trte_rwlock_write_lock(&lk);\n+\t\t++rwlock_data;\n+\t\trte_rwlock_write_unlock(&lk);\n+\n+\t\trte_rwlock_read_lock(&lk);\n+\t\tprintf(\"Core [%u] rwlock_data = %\"PRIu64\"\\n\",\n+\t\t\t\tlcore, rwlock_data);\n+\t\trte_rwlock_read_unlock(&lk);\n+\n+\t\tlcount++;\n+\t\t/* delay to make lock duty cycle slightly realistic */\n+\t\trte_pause();\n+\t\ttime_diff = rte_rdtsc_precise() - begin;\n+\t}\n+\n+\tlock_count[lcore] = lcount;\n+\treturn 0;\n+}\n+\n+static int\n+test_rwlock_perf(void)\n+{\n+\tunsigned int i;\n+\tuint64_t total = 0;\n+\n+\tprintf(\"\\nRwlock Perf Test on %u cores...\\n\", rte_lcore_count());\n+\n+\t/* clear synchro and start slaves */\n+\trte_atomic32_set(&synchro, 0);\n+\tif (rte_eal_mp_remote_launch(load_loop_fn, NULL, SKIP_MASTER) < 0)\n+\t\treturn -1;\n+\n+\t/* start synchro and launch test on master */\n+\trte_atomic32_set(&synchro, 1);\n+\tload_loop_fn(NULL);\n+\n+\trte_eal_mp_wait_lcore();\n+\n+\tRTE_LCORE_FOREACH(i) {\n+\t\tprintf(\"Core [%u] count = %\"PRIu64\"\\n\", i, lock_count[i]);\n+\t\ttotal += lock_count[i];\n+\t}\n+\n+\tprintf(\"Total count = %\"PRIu64\"\\n\", total);\n+\n+\treturn 0;\n+}\n+\n /*\n * - There is a global rwlock and a table of rwlocks (one per lcore).\n *\n@@ -132,6 +202,9 @@ rwlock_test1(void)\n \n \trte_eal_mp_wait_lcore();\n \n+\tif (test_rwlock_perf() < 0)\n+\t\treturn -1;\n+\n \treturn 0;\n }\n \n", "prefixes": [ "v2", "2/3" ] }