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GET /api/patches/49261/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 49261,
    "url": "https://patches.dpdk.org/api/patches/49261/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545716688-34608-2-git-send-email-wei.zhao1@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1545716688-34608-2-git-send-email-wei.zhao1@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1545716688-34608-2-git-send-email-wei.zhao1@intel.com",
    "date": "2018-12-25T05:44:47",
    "name": "[v2,1/2] net/ixgbe: enable x550 flexible byte filter",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "80eba96520b65c9b0c3866c6e0892679e895c309",
    "submitter": {
        "id": 495,
        "url": "https://patches.dpdk.org/api/people/495/?format=api",
        "name": "Zhao1, Wei",
        "email": "wei.zhao1@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545716688-34608-2-git-send-email-wei.zhao1@intel.com/mbox/",
    "series": [
        {
            "id": 2941,
            "url": "https://patches.dpdk.org/api/series/2941/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2941",
            "date": "2018-12-25T05:44:46",
            "name": "enable x550 flexible byte filter",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/2941/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/49261/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/49261/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id AE3451B44E;\n\tTue, 25 Dec 2018 07:10:13 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 1EE8B1B436;\n\tTue, 25 Dec 2018 07:10:10 +0100 (CET)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t24 Dec 2018 22:10:10 -0800",
            "from dpdk6.bj.intel.com ([172.16.182.192])\n\tby orsmga001.jf.intel.com with ESMTP; 24 Dec 2018 22:10:08 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.56,395,1539673200\"; d=\"scan'208\";a=\"121503673\"",
        "From": "Wei Zhao <wei.zhao1@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "stable@dpdk.org, wenzhuo.lu@intel.com, qi.z.zhang@intel.com,\n\tyuan.peng@intel.com, Wei Zhao <wei.zhao1@intel.com>",
        "Date": "Tue, 25 Dec 2018 13:44:47 +0800",
        "Message-Id": "<1545716688-34608-2-git-send-email-wei.zhao1@intel.com>",
        "X-Mailer": "git-send-email 2.7.5",
        "In-Reply-To": "<1545716688-34608-1-git-send-email-wei.zhao1@intel.com>",
        "References": "<1545025982-2065-1-git-send-email-wei.zhao1@intel.com>\n\t<1545716688-34608-1-git-send-email-wei.zhao1@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 1/2] net/ixgbe: enable x550 flexible byte\n\tfilter",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "There is need for users to use flexible byte filter on x550.\nx550 support IP mode and tunnel mode flexible byte filter.\ntunnel mode flexible byte filter is used for vxlan packets\nand so on. It can be used combined with FDIR tunnel filter.\nBy now, ixgbe PMD flow parer code do not support tunnel mode\nflexible byte filter for x550, So I have to enable it in function\nixgbe_parse_fdir_filter_tunnel(). Although IP mode flexible byte\nfilter parser is support in function ixgbe_parse_fdir_filter_normal(),\nbut some flow like  \"flow create 0 ingress pattern raw pattern is\n0xab / end actions queue index 3 / end\" need to be support, so\nparser code also need change a little.\nThis patch enable all of these feature.\n\nFixes: 82fb702077f6 (\"ixgbe: support new flow director modes for X550\")\nFixes: 11777435c727 (\"net/ixgbe: parse flow director filter\")\n\nSigned-off-by: Wei Zhao <wei.zhao1@intel.com>\n---\n drivers/net/ixgbe/ixgbe_fdir.c |   9 +-\n drivers/net/ixgbe/ixgbe_flow.c | 274 ++++++++++++++++++++++++++++-------------\n 2 files changed, 195 insertions(+), 88 deletions(-)",
    "diff": "diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c\nindex e559f0f..deb9a21 100644\n--- a/drivers/net/ixgbe/ixgbe_fdir.c\n+++ b/drivers/net/ixgbe/ixgbe_fdir.c\n@@ -307,6 +307,8 @@ fdir_set_input_mask_82599(struct rte_eth_dev *dev)\n \t/* flex byte mask */\n \tif (info->mask.flex_bytes_mask == 0)\n \t\tfdirm |= IXGBE_FDIRM_FLEX;\n+\tif (info->mask.src_ipv4_mask == 0 && info->mask.dst_ipv4_mask == 0)\n+\t\tfdirm |= IXGBE_FDIRM_L3P;\n \n \tIXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm);\n \n@@ -356,8 +358,7 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev)\n \t/* mask VM pool and DIPv6 since there are currently not supported\n \t * mask FLEX byte, it will be set in flex_conf\n \t */\n-\tuint32_t fdirm = IXGBE_FDIRM_POOL | IXGBE_FDIRM_DIPv6 |\n-\t\t\t IXGBE_FDIRM_FLEX;\n+\tuint32_t fdirm = IXGBE_FDIRM_POOL | IXGBE_FDIRM_DIPv6;\n \tuint32_t fdiripv6m;\n \tenum rte_fdir_mode mode = dev->data->dev_conf.fdir_conf.mode;\n \tuint16_t mac_mask;\n@@ -385,6 +386,10 @@ fdir_set_input_mask_x550(struct rte_eth_dev *dev)\n \t\treturn -EINVAL;\n \t}\n \n+\t/* flex byte mask */\n+\tif (info->mask.flex_bytes_mask == 0)\n+\t\tfdirm |= IXGBE_FDIRM_FLEX;\n+\n \tIXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm);\n \n \tfdiripv6m = ((u32)0xFFFFU << IXGBE_FDIRIP6M_DIPM_SHIFT);\ndiff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c\nindex f0fafeb..dc210c5 100644\n--- a/drivers/net/ixgbe/ixgbe_flow.c\n+++ b/drivers/net/ixgbe/ixgbe_flow.c\n@@ -1622,9 +1622,9 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,\n \tconst struct rte_flow_item_raw *raw_mask;\n \tconst struct rte_flow_item_raw *raw_spec;\n \tuint8_t j;\n-\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\n \tif (!pattern) {\n \t\trte_flow_error_set(error, EINVAL,\n \t\t\tRTE_FLOW_ERROR_TYPE_ITEM_NUM,\n@@ -1651,9 +1651,7 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,\n \t * value. So, we need not do anything for the not provided fields later.\n \t */\n \tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\tmemset(&rule->mask, 0xFF, sizeof(struct ixgbe_hw_fdir_mask));\n-\trule->mask.vlan_tci_mask = 0;\n-\trule->mask.flex_bytes_mask = 0;\n+\tmemset(&rule->mask, 0, sizeof(struct ixgbe_hw_fdir_mask));\n \n \t/**\n \t * The first not void item should be\n@@ -1665,7 +1663,8 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,\n \t    item->type != RTE_FLOW_ITEM_TYPE_IPV6 &&\n \t    item->type != RTE_FLOW_ITEM_TYPE_TCP &&\n \t    item->type != RTE_FLOW_ITEM_TYPE_UDP &&\n-\t    item->type != RTE_FLOW_ITEM_TYPE_SCTP) {\n+\t    item->type != RTE_FLOW_ITEM_TYPE_SCTP &&\n+\t    item->type != RTE_FLOW_ITEM_TYPE_RAW) {\n \t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n \t\trte_flow_error_set(error, EINVAL,\n \t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n@@ -2201,6 +2200,7 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,\n \t\t}\n \n \t\traw_mask = item->mask;\n+\t\trule->b_mask = TRUE;\n \n \t\t/* check mask */\n \t\tif (raw_mask->relative != 0x1 ||\n@@ -2217,6 +2217,7 @@ ixgbe_parse_fdir_filter_normal(struct rte_eth_dev *dev,\n \t\t}\n \n \t\traw_spec = item->spec;\n+\t\trule->b_spec = TRUE;\n \n \t\t/* check spec */\n \t\tif (raw_spec->relative != 0 ||\n@@ -2323,6 +2324,8 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \tconst struct rte_flow_item_eth *eth_mask;\n \tconst struct rte_flow_item_vlan *vlan_spec;\n \tconst struct rte_flow_item_vlan *vlan_mask;\n+\tconst struct rte_flow_item_raw *raw_mask;\n+\tconst struct rte_flow_item_raw *raw_spec;\n \tuint32_t j;\n \n \tif (!pattern) {\n@@ -2351,8 +2354,7 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t * value. So, we need not do anything for the not provided fields later.\n \t */\n \tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\tmemset(&rule->mask, 0xFF, sizeof(struct ixgbe_hw_fdir_mask));\n-\trule->mask.vlan_tci_mask = 0;\n+\tmemset(&rule->mask, 0, sizeof(struct ixgbe_hw_fdir_mask));\n \n \t/**\n \t * The first not void item should be\n@@ -2364,7 +2366,8 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t    item->type != RTE_FLOW_ITEM_TYPE_IPV6 &&\n \t    item->type != RTE_FLOW_ITEM_TYPE_UDP &&\n \t    item->type != RTE_FLOW_ITEM_TYPE_VXLAN &&\n-\t    item->type != RTE_FLOW_ITEM_TYPE_NVGRE) {\n+\t    item->type != RTE_FLOW_ITEM_TYPE_NVGRE &&\n+\t    item->type != RTE_FLOW_ITEM_TYPE_RAW) {\n \t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n \t\trte_flow_error_set(error, EINVAL,\n \t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n@@ -2520,6 +2523,18 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t\t\t\t&rule->ixgbe_fdir.formatted.tni_vni),\n \t\t\t\tvxlan_spec->vni, RTE_DIM(vxlan_spec->vni));\n \t\t}\n+\t\t/* check if the next not void item is MAC VLAN RAW or END*/\n+\t\titem = next_no_void_pattern(pattern, item);\n+\t\tif (item->type != RTE_FLOW_ITEM_TYPE_ETH &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_VLAN &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_RAW &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_END){\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n \t}\n \n \t/* Get the NVGRE info */\n@@ -2616,16 +2631,19 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t\t\trte_memcpy(&rule->ixgbe_fdir.formatted.tni_vni,\n \t\t\tnvgre_spec->tni, RTE_DIM(nvgre_spec->tni));\n \t\t}\n-\t}\n \n-\t/* check if the next not void item is MAC */\n-\titem = next_no_void_pattern(pattern, item);\n-\tif (item->type != RTE_FLOW_ITEM_TYPE_ETH) {\n-\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\titem, \"Not supported by fdir filter\");\n-\t\treturn -rte_errno;\n+\t\t/* check if the next not void item is MAC VLAN RAW or END*/\n+\t\titem = next_no_void_pattern(pattern, item);\n+\t\tif (item->type != RTE_FLOW_ITEM_TYPE_ETH &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_VLAN &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_RAW &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_END){\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n \t}\n \n \t/**\n@@ -2633,92 +2651,91 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t * others should be masked.\n \t */\n \n-\tif (!item->mask) {\n-\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\titem, \"Not supported by fdir filter\");\n-\t\treturn -rte_errno;\n-\t}\n-\t/*Not supported last point for range*/\n-\tif (item->last) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\titem, \"Not supported last point for range\");\n-\t\treturn -rte_errno;\n-\t}\n-\trule->b_mask = TRUE;\n-\teth_mask = item->mask;\n-\n-\t/* Ether type should be masked. */\n-\tif (eth_mask->type) {\n-\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\titem, \"Not supported by fdir filter\");\n-\t\treturn -rte_errno;\n-\t}\n-\n-\t/* src MAC address should be masked. */\n-\tfor (j = 0; j < ETHER_ADDR_LEN; j++) {\n-\t\tif (eth_mask->src.addr_bytes[j]) {\n-\t\t\tmemset(rule, 0,\n-\t\t\t       sizeof(struct ixgbe_fdir_rule));\n+\tif (item->type == RTE_FLOW_ITEM_TYPE_ETH) {\n+\t\tif (!item->mask) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n \t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n \t\t\t\titem, \"Not supported by fdir filter\");\n \t\t\treturn -rte_errno;\n \t\t}\n-\t}\n-\trule->mask.mac_addr_byte_mask = 0;\n-\tfor (j = 0; j < ETHER_ADDR_LEN; j++) {\n-\t\t/* It's a per byte mask. */\n-\t\tif (eth_mask->dst.addr_bytes[j] == 0xFF) {\n-\t\t\trule->mask.mac_addr_byte_mask |= 0x1 << j;\n-\t\t} else if (eth_mask->dst.addr_bytes[j]) {\n-\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t/*Not supported last point for range*/\n+\t\tif (item->last) {\n \t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\titem, \"Not supported last point for range\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\trule->b_mask = TRUE;\n+\t\teth_mask = item->mask;\n+\n+\t\t/* Ether type should be masked. */\n+\t\tif (eth_mask->type) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n \t\t\t\titem, \"Not supported by fdir filter\");\n \t\t\treturn -rte_errno;\n \t\t}\n-\t}\n \n-\t/* When no vlan, considered as full mask. */\n-\trule->mask.vlan_tci_mask = rte_cpu_to_be_16(0xEFFF);\n-\n-\tif (item->spec) {\n-\t\trule->b_spec = TRUE;\n-\t\teth_spec = item->spec;\n-\n-\t\t/* Get the dst MAC. */\n+\t\t/* src MAC address should be masked. */\n \t\tfor (j = 0; j < ETHER_ADDR_LEN; j++) {\n-\t\t\trule->ixgbe_fdir.formatted.inner_mac[j] =\n-\t\t\t\teth_spec->dst.addr_bytes[j];\n+\t\t\tif (eth_mask->src.addr_bytes[j]) {\n+\t\t\t\tmemset(rule, 0,\n+\t\t\t       sizeof(struct ixgbe_fdir_rule));\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\t\t}\n+\t\tfor (j = 0; j < ETHER_ADDR_LEN; j++) {\n+\t\t\t/* It's a per byte mask. */\n+\t\t\tif (eth_mask->dst.addr_bytes[j] == 0xFF) {\n+\t\t\t\trule->mask.mac_addr_byte_mask |= 0x1 << j;\n+\t\t\t} else if (eth_mask->dst.addr_bytes[j]) {\n+\t\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n \t\t}\n-\t}\n \n-\t/**\n-\t * Check if the next not void item is vlan or ipv4.\n-\t * IPv6 is not supported.\n-\t */\n-\titem = next_no_void_pattern(pattern, item);\n-\tif ((item->type != RTE_FLOW_ITEM_TYPE_VLAN) &&\n-\t\t(item->type != RTE_FLOW_ITEM_TYPE_IPV4)) {\n-\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\titem, \"Not supported by fdir filter\");\n-\t\treturn -rte_errno;\n-\t}\n-\t/*Not supported last point for range*/\n-\tif (item->last) {\n-\t\trte_flow_error_set(error, EINVAL,\n+\t\tif (item->spec) {\n+\t\t\trule->b_spec = TRUE;\n+\t\t\teth_spec = item->spec;\n+\n+\t\t\t/* Get the dst MAC. */\n+\t\t\tfor (j = 0; j < ETHER_ADDR_LEN; j++) {\n+\t\t\t\trule->ixgbe_fdir.formatted.inner_mac[j] =\n+\t\t\t\t\teth_spec->dst.addr_bytes[j];\n+\t\t\t}\n+\t\t}\n+\t\t/**\n+\t\t * Check if the next not void item is vlan or ipv4.\n+\t\t * IPv6 is not supported.\n+\t\t */\n+\t\titem = next_no_void_pattern(pattern, item);\n+\t\tif (item->type != RTE_FLOW_ITEM_TYPE_VLAN &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_RAW &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\t\t/*Not supported last point for range*/\n+\t\tif (item->last) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n \t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\titem, \"Not supported last point for range\");\n-\t\treturn -rte_errno;\n+\t\t\treturn -rte_errno;\n+\t\t}\n \t}\n \n+\n \tif (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {\n \t\tif (!(item->spec && item->mask)) {\n \t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n@@ -2736,10 +2753,90 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr,\n \t\trule->mask.vlan_tci_mask = vlan_mask->tci;\n \t\trule->mask.vlan_tci_mask &= rte_cpu_to_be_16(0xEFFF);\n \t\t/* More than one tags are not supported. */\n+\t\titem = next_no_void_pattern(pattern, item);\n+\t\tif (item->type != RTE_FLOW_ITEM_TYPE_RAW &&\n+\t\t\titem->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\n+\t/* Get the flex byte info */\n+\tif (item->type == RTE_FLOW_ITEM_TYPE_RAW) {\n+\t\t/* Not supported last point for range*/\n+\t\tif (item->last) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\titem, \"Not supported last point for range\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\t/* mask should not be null */\n+\t\tif (!item->mask || !item->spec) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\n+\t\traw_mask = item->mask;\n+\t\trule->b_mask = TRUE;\n \n+\t\t/* check mask */\n+\t\tif (raw_mask->relative != 0x1 ||\n+\t\t    raw_mask->search != 0x1 ||\n+\t\t    raw_mask->reserved != 0x0 ||\n+\t\t    (uint32_t)raw_mask->offset != 0xffffffff ||\n+\t\t    raw_mask->limit != 0xffff ||\n+\t\t    raw_mask->length != 0xffff) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\n+\t\traw_spec = item->spec;\n+\t\trule->b_spec = TRUE;\n+\n+\t\t/* check spec */\n+\t\tif (raw_spec->relative != 0 ||\n+\t\t    raw_spec->search != 0 ||\n+\t\t    raw_spec->reserved != 0 ||\n+\t\t    raw_spec->offset > IXGBE_MAX_FLX_SOURCE_OFF ||\n+\t\t    raw_spec->offset % 2 ||\n+\t\t    raw_spec->limit != 0 ||\n+\t\t    raw_spec->length != 2 ||\n+\t\t    /* pattern can't be 0xffff */\n+\t\t    (raw_spec->pattern[0] == 0xff &&\n+\t\t     raw_spec->pattern[1] == 0xff)) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\n+\t\t/* check pattern mask */\n+\t\tif (raw_mask->pattern[0] != 0xff ||\n+\t\t    raw_mask->pattern[1] != 0xff) {\n+\t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\titem, \"Not supported by fdir filter\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\n+\t\trule->mask.flex_bytes_mask = 0xffff;\n+\t\trule->ixgbe_fdir.formatted.flex_bytes =\n+\t\t\t(((uint16_t)raw_spec->pattern[1]) << 8) |\n+\t\t\traw_spec->pattern[0];\n+\t\trule->flex_bytes_offset = raw_spec->offset;\n \t\t/* check if the next not void item is END */\n \t\titem = next_no_void_pattern(pattern, item);\n-\n \t\tif (item->type != RTE_FLOW_ITEM_TYPE_END) {\n \t\t\tmemset(rule, 0, sizeof(struct ixgbe_fdir_rule));\n \t\t\trte_flow_error_set(error, EINVAL,\n@@ -2776,12 +2873,17 @@ ixgbe_parse_fdir_filter(struct rte_eth_dev *dev,\n \t\thw->mac.type != ixgbe_mac_X550EM_a)\n \t\treturn -ENOTSUP;\n \n+\tif (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)\n+\t\tgoto tunnel_filter;\n+\n \tret = ixgbe_parse_fdir_filter_normal(dev, attr, pattern,\n \t\t\t\t\tactions, rule, error);\n \n \tif (!ret)\n \t\tgoto step_next;\n \n+tunnel_filter:\n+\n \tret = ixgbe_parse_fdir_filter_tunnel(attr, pattern,\n \t\t\t\t\tactions, rule, error);\n \n",
    "prefixes": [
        "v2",
        "1/2"
    ]
}