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GET /api/patches/48999/?format=api
{ "id": 48999, "url": "https://patches.dpdk.org/api/patches/48999/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-32-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545032259-77179-32-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545032259-77179-32-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-17T07:37:39", "name": "[v5,31/31] net/ice: support descriptor ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ed4dc35be23bd6632920be121cc85b75ffd6bb9e", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-32-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2824, "url": "https://patches.dpdk.org/api/series/2824/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2824", "date": "2018-12-17T07:37:08", "name": "A new net PMD - ICE", "version": 5, "mbox": "https://patches.dpdk.org/series/2824/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48999/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/48999/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BFEEE1B91C;\n\tMon, 17 Dec 2018 08:33:44 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 829711BA42\n\tfor <dev@dpdk.org>; Mon, 17 Dec 2018 08:33:33 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Dec 2018 23:33:32 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2018 23:33:32 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,364,1539673200\"; d=\"scan'208\";a=\"118899374\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Wenzhuo Lu <wenzhuo.lu@intel.com>, Qiming Yang <qiming.yang@intel.com>, \n\tXiaoyun Li <xiaoyun.li@intel.com>, Jingjing Wu <jingjing.wu@intel.com>", "Date": "Mon, 17 Dec 2018 15:37:39 +0800", "Message-Id": "<1545032259-77179-32-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 31/31] net/ice: support descriptor ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add below ops,\nrx_descriptor_status\ntx_descriptor_status\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n doc/guides/nics/features/ice.ini | 2 ++\n drivers/net/ice/ice_ethdev.c | 2 ++\n drivers/net/ice/ice_lan_rxtx.c | 58 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/ice_rxtx.h | 2 ++\n 4 files changed, 64 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini\nindex 300eced..196b8d5 100644\n--- a/doc/guides/nics/features/ice.ini\n+++ b/doc/guides/nics/features/ice.ini\n@@ -25,6 +25,8 @@ QinQ offload = Y\n L3 checksum offload = Y\n L4 checksum offload = Y\n Packet type parsing = Y\n+Rx descriptor status = Y\n+Tx descriptor status = Y\n Basic stats = Y\n Extended stats = Y\n FW version = Y\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex ab8fe3b..86db69d 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -112,6 +112,8 @@ static int ice_xstats_get_names(struct rte_eth_dev *dev,\n \t.get_eeprom_length = ice_get_eeprom_length,\n \t.get_eeprom = ice_get_eeprom,\n \t.rx_queue_count = ice_rx_queue_count,\n+\t.rx_descriptor_status = ice_rx_descriptor_status,\n+\t.tx_descriptor_status = ice_tx_descriptor_status,\n \t.stats_get = ice_stats_get,\n \t.stats_reset = ice_stats_reset,\n \t.xstats_get = ice_xstats_get,\ndiff --git a/drivers/net/ice/ice_lan_rxtx.c b/drivers/net/ice/ice_lan_rxtx.c\nindex b328a96..c481aed 100644\n--- a/drivers/net/ice/ice_lan_rxtx.c\n+++ b/drivers/net/ice/ice_lan_rxtx.c\n@@ -1490,6 +1490,64 @@\n \treturn desc;\n }\n \n+int\n+ice_rx_descriptor_status(void *rx_queue, uint16_t offset)\n+{\n+\tstruct ice_rx_queue *rxq = rx_queue;\n+\tvolatile uint64_t *status;\n+\tuint64_t mask;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn -EINVAL;\n+\n+\tif (offset >= rxq->nb_rx_desc - rxq->nb_rx_hold)\n+\t\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\tstatus = &rxq->rx_ring[desc].wb.qword1.status_error_len;\n+\tmask = rte_cpu_to_le_64((1ULL << ICE_RX_DESC_STATUS_DD_S) <<\n+\t\t\t\tICE_RXD_QW1_STATUS_S);\n+\tif (*status & mask)\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n+int\n+ice_tx_descriptor_status(void *tx_queue, uint16_t offset)\n+{\n+\tstruct ice_tx_queue *txq = tx_queue;\n+\tvolatile uint64_t *status;\n+\tuint64_t mask, expect;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= txq->nb_tx_desc))\n+\t\treturn -EINVAL;\n+\n+\tdesc = txq->tx_tail + offset;\n+\t/* go to next desc that has the RS bit */\n+\tdesc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *\n+\t\ttxq->tx_rs_thresh;\n+\tif (desc >= txq->nb_tx_desc) {\n+\t\tdesc -= txq->nb_tx_desc;\n+\t\tif (desc >= txq->nb_tx_desc)\n+\t\t\tdesc -= txq->nb_tx_desc;\n+\t}\n+\n+\tstatus = &txq->tx_ring[desc].cmd_type_offset_bsz;\n+\tmask = rte_cpu_to_le_64(ICE_TXD_QW1_DTYPE_M);\n+\texpect = rte_cpu_to_le_64(ICE_TX_DESC_DTYPE_DESC_DONE <<\n+\t\t\t\t ICE_TXD_QW1_DTYPE_S);\n+\tif ((*status & mask) == expect)\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\n+\treturn RTE_ETH_TX_DESC_FULL;\n+}\n+\n void\n ice_clear_queues(struct rte_eth_dev *dev)\n {\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex e0218b3..a0aa8f9 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -143,6 +143,8 @@ uint16_t ice_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t uint16_t nb_pkts);\n void ice_set_tx_function(struct rte_eth_dev *dev);\n uint32_t ice_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n+int ice_rx_descriptor_status(void *rx_queue, uint16_t offset);\n+int ice_tx_descriptor_status(void *tx_queue, uint16_t offset);\n void ice_set_default_ptype_table(struct rte_eth_dev *dev);\n const uint32_t *ice_dev_supported_ptypes_get(struct rte_eth_dev *dev);\n void ice_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n", "prefixes": [ "v5", "31/31" ] }