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GET /api/patches/48990/?format=api
{ "id": 48990, "url": "https://patches.dpdk.org/api/patches/48990/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-29-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545032259-77179-29-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545032259-77179-29-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-17T07:37:36", "name": "[v5,28/31] net/ice: support queue information getting", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bfed6064ac11ee0da9a348bf4fe3e5f0b952938a", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-29-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2824, "url": "https://patches.dpdk.org/api/series/2824/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2824", "date": "2018-12-17T07:37:08", "name": "A new net PMD - ICE", "version": 5, "mbox": "https://patches.dpdk.org/series/2824/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48990/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/48990/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9DB1F1BB27;\n\tMon, 17 Dec 2018 08:33:41 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 65F361B9BD\n\tfor <dev@dpdk.org>; Mon, 17 Dec 2018 08:33:29 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Dec 2018 23:33:28 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2018 23:33:28 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,364,1539673200\"; d=\"scan'208\";a=\"118899358\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Wenzhuo Lu <wenzhuo.lu@intel.com>, Qiming Yang <qiming.yang@intel.com>, \n\tXiaoyun Li <xiaoyun.li@intel.com>, Jingjing Wu <jingjing.wu@intel.com>", "Date": "Mon, 17 Dec 2018 15:37:36 +0800", "Message-Id": "<1545032259-77179-29-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 28/31] net/ice: support queue information\n\tgetting", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add below ops,\nrxq_info_get\ntxq_info_get\nrx_queue_count\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 3 ++\n drivers/net/ice/ice_lan_rxtx.c | 66 ++++++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/ice_rxtx.h | 5 ++++\n 3 files changed, 74 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 0b11a42..3235d01 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -107,8 +107,11 @@ static int ice_xstats_get_names(struct rte_eth_dev *dev,\n \t.rx_queue_intr_disable = ice_rx_queue_intr_disable,\n \t.fw_version_get = ice_fw_version_get,\n \t.vlan_pvid_set = ice_vlan_pvid_set,\n+\t.rxq_info_get = ice_rxq_info_get,\n+\t.txq_info_get = ice_txq_info_get,\n \t.get_eeprom_length = ice_get_eeprom_length,\n \t.get_eeprom = ice_get_eeprom,\n+\t.rx_queue_count = ice_rx_queue_count,\n \t.stats_get = ice_stats_get,\n \t.stats_reset = ice_stats_reset,\n \t.xstats_get = ice_xstats_get,\ndiff --git a/drivers/net/ice/ice_lan_rxtx.c b/drivers/net/ice/ice_lan_rxtx.c\nindex 8230bb2..fed12b4 100644\n--- a/drivers/net/ice/ice_lan_rxtx.c\n+++ b/drivers/net/ice/ice_lan_rxtx.c\n@@ -921,6 +921,72 @@\n }\n \n void\n+ice_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_rxq_info *qinfo)\n+{\n+\tstruct ice_rx_queue *rxq;\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\n+\tqinfo->mp = rxq->mp;\n+\tqinfo->scattered_rx = dev->data->scattered_rx;\n+\tqinfo->nb_desc = rxq->nb_rx_desc;\n+\n+\tqinfo->conf.rx_free_thresh = rxq->rx_free_thresh;\n+\tqinfo->conf.rx_drop_en = rxq->drop_en;\n+\tqinfo->conf.rx_deferred_start = rxq->rx_deferred_start;\n+}\n+\n+void\n+ice_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_txq_info *qinfo)\n+{\n+\tstruct ice_tx_queue *txq;\n+\n+\ttxq = dev->data->tx_queues[queue_id];\n+\n+\tqinfo->nb_desc = txq->nb_tx_desc;\n+\n+\tqinfo->conf.tx_thresh.pthresh = txq->pthresh;\n+\tqinfo->conf.tx_thresh.hthresh = txq->hthresh;\n+\tqinfo->conf.tx_thresh.wthresh = txq->wthresh;\n+\n+\tqinfo->conf.tx_free_thresh = txq->tx_free_thresh;\n+\tqinfo->conf.tx_rs_thresh = txq->tx_rs_thresh;\n+\tqinfo->conf.offloads = txq->offloads;\n+\tqinfo->conf.tx_deferred_start = txq->tx_deferred_start;\n+}\n+\n+uint32_t\n+ice_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n+{\n+#define ICE_RXQ_SCAN_INTERVAL 4\n+\tvolatile union ice_rx_desc *rxdp;\n+\tstruct ice_rx_queue *rxq;\n+\tuint16_t desc = 0;\n+\n+\trxq = dev->data->rx_queues[rx_queue_id];\n+\trxdp = &rxq->rx_ring[rxq->rx_tail];\n+\twhile ((desc < rxq->nb_rx_desc) &&\n+\t ((rte_le_to_cpu_64(rxdp->wb.qword1.status_error_len) &\n+\t\t ICE_RXD_QW1_STATUS_M) >> ICE_RXD_QW1_STATUS_S) &\n+\t (1 << ICE_RX_DESC_STATUS_DD_S)) {\n+\t\t/**\n+\t\t * Check the DD bit of a rx descriptor of each 4 in a group,\n+\t\t * to avoid checking too frequently and downgrading performance\n+\t\t * too much.\n+\t\t */\n+\t\tdesc += ICE_RXQ_SCAN_INTERVAL;\n+\t\trxdp += ICE_RXQ_SCAN_INTERVAL;\n+\t\tif (rxq->rx_tail + desc >= rxq->nb_rx_desc)\n+\t\t\trxdp = &(rxq->rx_ring[rxq->rx_tail +\n+\t\t\t\t desc - rxq->nb_rx_desc]);\n+\t}\n+\n+\treturn desc;\n+}\n+\n+void\n ice_clear_queues(struct rte_eth_dev *dev)\n {\n \tuint16_t i;\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex 871646f..bad2b89 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -134,6 +134,11 @@ int ice_tx_queue_setup(struct rte_eth_dev *dev,\n void ice_tx_queue_release(void *txq);\n void ice_clear_queues(struct rte_eth_dev *dev);\n void ice_free_queues(struct rte_eth_dev *dev);\n+uint32_t ice_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n void ice_set_default_ptype_table(struct rte_eth_dev *dev);\n const uint32_t *ice_dev_supported_ptypes_get(struct rte_eth_dev *dev);\n+void ice_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_rxq_info *qinfo);\n+void ice_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_txq_info *qinfo);\n #endif /* _ICE_RXTX_H_ */\n", "prefixes": [ "v5", "28/31" ] }