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GET /api/patches/48989/?format=api
{ "id": 48989, "url": "https://patches.dpdk.org/api/patches/48989/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-28-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545032259-77179-28-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545032259-77179-28-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-17T07:37:35", "name": "[v5,27/31] net/ice: support statistics", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a796c2ab70236545a872a2bd798a6dcb37378410", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-28-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2824, "url": "https://patches.dpdk.org/api/series/2824/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2824", "date": "2018-12-17T07:37:08", "name": "A new net PMD - ICE", "version": 5, "mbox": "https://patches.dpdk.org/series/2824/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48989/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/48989/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8FCB71BB0F;\n\tMon, 17 Dec 2018 08:33:40 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 2E5FD1B91F\n\tfor <dev@dpdk.org>; Mon, 17 Dec 2018 08:33:28 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Dec 2018 23:33:27 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2018 23:33:26 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,364,1539673200\"; d=\"scan'208\";a=\"118899348\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Wenzhuo Lu <wenzhuo.lu@intel.com>,\n\tJia Guo <jia.guo@intel.com>", "Date": "Mon, 17 Dec 2018 15:37:35 +0800", "Message-Id": "<1545032259-77179-28-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 27/31] net/ice: support statistics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add below ops,\nstats_get\nstats_reset\nxstats_get\nxstats_get_names\nxstats_reset\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\nSigned-off-by: Jia Guo <jia.guo@intel.com>\n---\n doc/guides/nics/features/ice.ini | 2 +\n drivers/net/ice/ice_ethdev.c | 566 +++++++++++++++++++++++++++++++++++++++\n 2 files changed, 568 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini\nindex c939b52..67fd044 100644\n--- a/doc/guides/nics/features/ice.ini\n+++ b/doc/guides/nics/features/ice.ini\n@@ -19,6 +19,8 @@ RSS reta update = Y\n VLAN filter = Y\n VLAN offload = Y\n QinQ offload = Y\n+Basic stats = Y\n+Extended stats = Y\n FW version = Y\n Module EEPROM dump = Y\n BSD nic_uio = Y\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 42460a4..0b11a42 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -59,6 +59,14 @@ static int ice_vlan_pvid_set(struct rte_eth_dev *dev,\n static int ice_get_eeprom_length(struct rte_eth_dev *dev);\n static int ice_get_eeprom(struct rte_eth_dev *dev,\n \t\t\t struct rte_dev_eeprom_info *eeprom);\n+static int ice_stats_get(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_stats *stats);\n+static void ice_stats_reset(struct rte_eth_dev *dev);\n+static int ice_xstats_get(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_xstat *xstats, unsigned int n);\n+static int ice_xstats_get_names(struct rte_eth_dev *dev,\n+\t\t\t\tstruct rte_eth_xstat_name *xstats_names,\n+\t\t\t\tunsigned int limit);\n \n static const struct rte_pci_id pci_id_ice_map[] = {\n \t{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) },\n@@ -101,8 +109,92 @@ static int ice_get_eeprom(struct rte_eth_dev *dev,\n \t.vlan_pvid_set = ice_vlan_pvid_set,\n \t.get_eeprom_length = ice_get_eeprom_length,\n \t.get_eeprom = ice_get_eeprom,\n+\t.stats_get = ice_stats_get,\n+\t.stats_reset = ice_stats_reset,\n+\t.xstats_get = ice_xstats_get,\n+\t.xstats_get_names = ice_xstats_get_names,\n+\t.xstats_reset = ice_stats_reset,\n };\n \n+/* store statistics names and its offset in stats structure */\n+struct ice_xstats_name_off {\n+\tchar name[RTE_ETH_XSTATS_NAME_SIZE];\n+\tunsigned int offset;\n+};\n+\n+static const struct ice_xstats_name_off ice_stats_strings[] = {\n+\t{\"rx_unicast_packets\", offsetof(struct ice_eth_stats, rx_unicast)},\n+\t{\"rx_multicast_packets\", offsetof(struct ice_eth_stats, rx_multicast)},\n+\t{\"rx_broadcast_packets\", offsetof(struct ice_eth_stats, rx_broadcast)},\n+\t{\"rx_dropped\", offsetof(struct ice_eth_stats, rx_discards)},\n+\t{\"rx_unknown_protocol_packets\", offsetof(struct ice_eth_stats,\n+\t\trx_unknown_protocol)},\n+\t{\"tx_unicast_packets\", offsetof(struct ice_eth_stats, tx_unicast)},\n+\t{\"tx_multicast_packets\", offsetof(struct ice_eth_stats, tx_multicast)},\n+\t{\"tx_broadcast_packets\", offsetof(struct ice_eth_stats, tx_broadcast)},\n+\t{\"tx_dropped\", offsetof(struct ice_eth_stats, tx_discards)},\n+};\n+\n+#define ICE_NB_ETH_XSTATS (sizeof(ice_stats_strings) / \\\n+\t\tsizeof(ice_stats_strings[0]))\n+\n+static const struct ice_xstats_name_off ice_hw_port_strings[] = {\n+\t{\"tx_link_down_dropped\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_dropped_link_down)},\n+\t{\"rx_crc_errors\", offsetof(struct ice_hw_port_stats, crc_errors)},\n+\t{\"rx_illegal_byte_errors\", offsetof(struct ice_hw_port_stats,\n+\t\tillegal_bytes)},\n+\t{\"rx_error_bytes\", offsetof(struct ice_hw_port_stats, error_bytes)},\n+\t{\"mac_local_errors\", offsetof(struct ice_hw_port_stats,\n+\t\tmac_local_faults)},\n+\t{\"mac_remote_errors\", offsetof(struct ice_hw_port_stats,\n+\t\tmac_remote_faults)},\n+\t{\"rx_len_errors\", offsetof(struct ice_hw_port_stats,\n+\t\trx_len_errors)},\n+\t{\"tx_xon_packets\", offsetof(struct ice_hw_port_stats, link_xon_tx)},\n+\t{\"rx_xon_packets\", offsetof(struct ice_hw_port_stats, link_xon_rx)},\n+\t{\"tx_xoff_packets\", offsetof(struct ice_hw_port_stats, link_xoff_tx)},\n+\t{\"rx_xoff_packets\", offsetof(struct ice_hw_port_stats, link_xoff_rx)},\n+\t{\"rx_size_64_packets\", offsetof(struct ice_hw_port_stats, rx_size_64)},\n+\t{\"rx_size_65_to_127_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_127)},\n+\t{\"rx_size_128_to_255_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_255)},\n+\t{\"rx_size_256_to_511_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_511)},\n+\t{\"rx_size_512_to_1023_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_1023)},\n+\t{\"rx_size_1024_to_1522_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_1522)},\n+\t{\"rx_size_1523_to_max_packets\", offsetof(struct ice_hw_port_stats,\n+\t\trx_size_big)},\n+\t{\"rx_undersized_errors\", offsetof(struct ice_hw_port_stats,\n+\t\trx_undersize)},\n+\t{\"rx_oversize_errors\", offsetof(struct ice_hw_port_stats,\n+\t\trx_oversize)},\n+\t{\"rx_mac_short_pkt_dropped\", offsetof(struct ice_hw_port_stats,\n+\t\tmac_short_pkt_dropped)},\n+\t{\"rx_fragmented_errors\", offsetof(struct ice_hw_port_stats,\n+\t\trx_fragments)},\n+\t{\"rx_jabber_errors\", offsetof(struct ice_hw_port_stats, rx_jabber)},\n+\t{\"tx_size_64_packets\", offsetof(struct ice_hw_port_stats, tx_size_64)},\n+\t{\"tx_size_65_to_127_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_127)},\n+\t{\"tx_size_128_to_255_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_255)},\n+\t{\"tx_size_256_to_511_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_511)},\n+\t{\"tx_size_512_to_1023_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_1023)},\n+\t{\"tx_size_1024_to_1522_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_1522)},\n+\t{\"tx_size_1523_to_max_packets\", offsetof(struct ice_hw_port_stats,\n+\t\ttx_size_big)},\n+};\n+\n+#define ICE_NB_HW_PORT_XSTATS (sizeof(ice_hw_port_strings) / \\\n+\t\tsizeof(ice_hw_port_strings[0]))\n+\n static void\n ice_init_controlq_parameter(struct ice_hw *hw)\n {\n@@ -2625,6 +2717,480 @@ static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static void\n+ice_stat_update_32(struct ice_hw *hw,\n+\t\t uint32_t reg,\n+\t\t bool offset_loaded,\n+\t\t uint64_t *offset,\n+\t\t uint64_t *stat)\n+{\n+\tuint64_t new_data;\n+\n+\tnew_data = (uint64_t)ICE_READ_REG(hw, reg);\n+\tif (!offset_loaded)\n+\t\t*offset = new_data;\n+\n+\tif (new_data >= *offset)\n+\t\t*stat = (uint64_t)(new_data - *offset);\n+\telse\n+\t\t*stat = (uint64_t)((new_data +\n+\t\t\t\t ((uint64_t)1 << ICE_32_BIT_WIDTH))\n+\t\t\t\t - *offset);\n+}\n+\n+static void\n+ice_stat_update_40(struct ice_hw *hw,\n+\t\t uint32_t hireg,\n+\t\t uint32_t loreg,\n+\t\t bool offset_loaded,\n+\t\t uint64_t *offset,\n+\t\t uint64_t *stat)\n+{\n+\tuint64_t new_data;\n+\n+\tnew_data = (uint64_t)ICE_READ_REG(hw, loreg);\n+\tnew_data |= (uint64_t)(ICE_READ_REG(hw, hireg) & ICE_8_BIT_MASK) <<\n+\t\t ICE_32_BIT_WIDTH;\n+\n+\tif (!offset_loaded)\n+\t\t*offset = new_data;\n+\n+\tif (new_data >= *offset)\n+\t\t*stat = new_data - *offset;\n+\telse\n+\t\t*stat = (uint64_t)((new_data +\n+\t\t\t\t ((uint64_t)1 << ICE_40_BIT_WIDTH)) -\n+\t\t\t\t *offset);\n+\n+\t*stat &= ICE_40_BIT_MASK;\n+}\n+\n+/* Get all the statistics of a VSI */\n+static void\n+ice_update_vsi_stats(struct ice_vsi *vsi)\n+{\n+\tstruct ice_eth_stats *oes = &vsi->eth_stats_offset;\n+\tstruct ice_eth_stats *nes = &vsi->eth_stats;\n+\tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tint idx = rte_le_to_cpu_16(vsi->vsi_id);\n+\n+\tice_stat_update_40(hw, GLV_GORCH(idx), GLV_GORCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->rx_bytes,\n+\t\t\t &nes->rx_bytes);\n+\tice_stat_update_40(hw, GLV_UPRCH(idx), GLV_UPRCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->rx_unicast,\n+\t\t\t &nes->rx_unicast);\n+\tice_stat_update_40(hw, GLV_MPRCH(idx), GLV_MPRCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->rx_multicast,\n+\t\t\t &nes->rx_multicast);\n+\tice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->rx_broadcast,\n+\t\t\t &nes->rx_broadcast);\n+\t/* exclude CRC bytes */\n+\tnes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +\n+\t\t\t nes->rx_broadcast) * ETHER_CRC_LEN;\n+\n+\tice_stat_update_32(hw, GLV_RDPC(idx), vsi->offset_loaded,\n+\t\t\t &oes->rx_discards, &nes->rx_discards);\n+\t/* GLV_REPC not supported */\n+\t/* GLV_RMPC not supported */\n+\tice_stat_update_32(hw, GLSWID_RUPP(idx), vsi->offset_loaded,\n+\t\t\t &oes->rx_unknown_protocol,\n+\t\t\t &nes->rx_unknown_protocol);\n+\tice_stat_update_40(hw, GLV_GOTCH(idx), GLV_GOTCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->tx_bytes,\n+\t\t\t &nes->tx_bytes);\n+\tice_stat_update_40(hw, GLV_UPTCH(idx), GLV_UPTCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->tx_unicast,\n+\t\t\t &nes->tx_unicast);\n+\tice_stat_update_40(hw, GLV_MPTCH(idx), GLV_MPTCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->tx_multicast,\n+\t\t\t &nes->tx_multicast);\n+\tice_stat_update_40(hw, GLV_BPTCH(idx), GLV_BPTCL(idx),\n+\t\t\t vsi->offset_loaded, &oes->tx_broadcast,\n+\t\t\t &nes->tx_broadcast);\n+\t/* GLV_TDPC not supported */\n+\tice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,\n+\t\t\t &oes->tx_errors, &nes->tx_errors);\n+\tvsi->offset_loaded = true;\n+\n+\tPMD_DRV_LOG(DEBUG, \"************** VSI[%u] stats start **************\",\n+\t\t vsi->vsi_id);\n+\tPMD_DRV_LOG(DEBUG, \"rx_bytes: %\"PRIu64\"\", nes->rx_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"rx_unicast: %\"PRIu64\"\", nes->rx_unicast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_multicast: %\"PRIu64\"\", nes->rx_multicast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_broadcast: %\"PRIu64\"\", nes->rx_broadcast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_discards: %\"PRIu64\"\", nes->rx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"rx_unknown_protocol: %\"PRIu64\"\",\n+\t\t nes->rx_unknown_protocol);\n+\tPMD_DRV_LOG(DEBUG, \"tx_bytes: %\"PRIu64\"\", nes->tx_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"tx_unicast: %\"PRIu64\"\", nes->tx_unicast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_multicast: %\"PRIu64\"\", nes->tx_multicast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_broadcast: %\"PRIu64\"\", nes->tx_broadcast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_discards: %\"PRIu64\"\", nes->tx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"tx_errors: %\"PRIu64\"\", nes->tx_errors);\n+\tPMD_DRV_LOG(DEBUG, \"************** VSI[%u] stats end ****************\",\n+\t\t vsi->vsi_id);\n+}\n+\n+static void\n+ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)\n+{\n+\tstruct ice_hw_port_stats *ns = &pf->stats; /* new stats */\n+\tstruct ice_hw_port_stats *os = &pf->stats_offset; /* old stats */\n+\n+\t/* Get statistics of struct ice_eth_stats */\n+\tice_stat_update_40(hw, GLPRT_GORCH(hw->port_info->lport),\n+\t\t\t GLPRT_GORCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.rx_bytes,\n+\t\t\t &ns->eth.rx_bytes);\n+\tice_stat_update_40(hw, GLPRT_UPRCH(hw->port_info->lport),\n+\t\t\t GLPRT_UPRCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.rx_unicast,\n+\t\t\t &ns->eth.rx_unicast);\n+\tice_stat_update_40(hw, GLPRT_MPRCH(hw->port_info->lport),\n+\t\t\t GLPRT_MPRCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.rx_multicast,\n+\t\t\t &ns->eth.rx_multicast);\n+\tice_stat_update_40(hw, GLPRT_BPRCH(hw->port_info->lport),\n+\t\t\t GLPRT_BPRCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.rx_broadcast,\n+\t\t\t &ns->eth.rx_broadcast);\n+\tice_stat_update_32(hw, PRTRPB_RDPC,\n+\t\t\t pf->offset_loaded, &os->eth.rx_discards,\n+\t\t\t &ns->eth.rx_discards);\n+\n+\t/* Workaround: CRC size should not be included in byte statistics,\n+\t * so subtract ETHER_CRC_LEN from the byte counter for each rx packet.\n+\t */\n+\tns->eth.rx_bytes -= (ns->eth.rx_unicast + ns->eth.rx_multicast +\n+\t\t\t ns->eth.rx_broadcast) * ETHER_CRC_LEN;\n+\n+\t/* GLPRT_REPC not supported */\n+\t/* GLPRT_RMPC not supported */\n+\tice_stat_update_32(hw, GLSWID_RUPP(hw->port_info->lport),\n+\t\t\t pf->offset_loaded,\n+\t\t\t &os->eth.rx_unknown_protocol,\n+\t\t\t &ns->eth.rx_unknown_protocol);\n+\tice_stat_update_40(hw, GLPRT_GOTCH(hw->port_info->lport),\n+\t\t\t GLPRT_GOTCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.tx_bytes,\n+\t\t\t &ns->eth.tx_bytes);\n+\tice_stat_update_40(hw, GLPRT_UPTCH(hw->port_info->lport),\n+\t\t\t GLPRT_UPTCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.tx_unicast,\n+\t\t\t &ns->eth.tx_unicast);\n+\tice_stat_update_40(hw, GLPRT_MPTCH(hw->port_info->lport),\n+\t\t\t GLPRT_MPTCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.tx_multicast,\n+\t\t\t &ns->eth.tx_multicast);\n+\tice_stat_update_40(hw, GLPRT_BPTCH(hw->port_info->lport),\n+\t\t\t GLPRT_BPTCL(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->eth.tx_broadcast,\n+\t\t\t &ns->eth.tx_broadcast);\n+\tns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +\n+\t\t\t ns->eth.tx_broadcast) * ETHER_CRC_LEN;\n+\n+\t/* GLPRT_TEPC not supported */\n+\n+\t/* additional port specific stats */\n+\tice_stat_update_32(hw, GLPRT_TDOLD(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_dropped_link_down,\n+\t\t\t &ns->tx_dropped_link_down);\n+\tice_stat_update_32(hw, GLPRT_CRCERRS(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->crc_errors,\n+\t\t\t &ns->crc_errors);\n+\tice_stat_update_32(hw, GLPRT_ILLERRC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->illegal_bytes,\n+\t\t\t &ns->illegal_bytes);\n+\t/* GLPRT_ERRBC not supported */\n+\tice_stat_update_32(hw, GLPRT_MLFC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->mac_local_faults,\n+\t\t\t &ns->mac_local_faults);\n+\tice_stat_update_32(hw, GLPRT_MRFC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->mac_remote_faults,\n+\t\t\t &ns->mac_remote_faults);\n+\n+\tice_stat_update_32(hw, GLPRT_RLEC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_len_errors,\n+\t\t\t &ns->rx_len_errors);\n+\n+\tice_stat_update_32(hw, GLPRT_LXONRXC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->link_xon_rx,\n+\t\t\t &ns->link_xon_rx);\n+\tice_stat_update_32(hw, GLPRT_LXOFFRXC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->link_xoff_rx,\n+\t\t\t &ns->link_xoff_rx);\n+\tice_stat_update_32(hw, GLPRT_LXONTXC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->link_xon_tx,\n+\t\t\t &ns->link_xon_tx);\n+\tice_stat_update_32(hw, GLPRT_LXOFFTXC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->link_xoff_tx,\n+\t\t\t &ns->link_xoff_tx);\n+\tice_stat_update_40(hw, GLPRT_PRC64H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC64L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_64,\n+\t\t\t &ns->rx_size_64);\n+\tice_stat_update_40(hw, GLPRT_PRC127H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC127L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_127,\n+\t\t\t &ns->rx_size_127);\n+\tice_stat_update_40(hw, GLPRT_PRC255H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC255L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_255,\n+\t\t\t &ns->rx_size_255);\n+\tice_stat_update_40(hw, GLPRT_PRC511H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC511L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_511,\n+\t\t\t &ns->rx_size_511);\n+\tice_stat_update_40(hw, GLPRT_PRC1023H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC1023L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_1023,\n+\t\t\t &ns->rx_size_1023);\n+\tice_stat_update_40(hw, GLPRT_PRC1522H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC1522L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_1522,\n+\t\t\t &ns->rx_size_1522);\n+\tice_stat_update_40(hw, GLPRT_PRC9522H(hw->port_info->lport),\n+\t\t\t GLPRT_PRC9522L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_size_big,\n+\t\t\t &ns->rx_size_big);\n+\tice_stat_update_32(hw, GLPRT_RUC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_undersize,\n+\t\t\t &ns->rx_undersize);\n+\tice_stat_update_32(hw, GLPRT_RFC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_fragments,\n+\t\t\t &ns->rx_fragments);\n+\tice_stat_update_32(hw, GLPRT_ROC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_oversize,\n+\t\t\t &ns->rx_oversize);\n+\tice_stat_update_32(hw, GLPRT_RJC(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->rx_jabber,\n+\t\t\t &ns->rx_jabber);\n+\tice_stat_update_40(hw, GLPRT_PTC64H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC64L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_64,\n+\t\t\t &ns->tx_size_64);\n+\tice_stat_update_40(hw, GLPRT_PTC127H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC127L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_127,\n+\t\t\t &ns->tx_size_127);\n+\tice_stat_update_40(hw, GLPRT_PTC255H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC255L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_255,\n+\t\t\t &ns->tx_size_255);\n+\tice_stat_update_40(hw, GLPRT_PTC511H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC511L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_511,\n+\t\t\t &ns->tx_size_511);\n+\tice_stat_update_40(hw, GLPRT_PTC1023H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC1023L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_1023,\n+\t\t\t &ns->tx_size_1023);\n+\tice_stat_update_40(hw, GLPRT_PTC1522H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC1522L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_1522,\n+\t\t\t &ns->tx_size_1522);\n+\tice_stat_update_40(hw, GLPRT_PTC9522H(hw->port_info->lport),\n+\t\t\t GLPRT_PTC9522L(hw->port_info->lport),\n+\t\t\t pf->offset_loaded, &os->tx_size_big,\n+\t\t\t &ns->tx_size_big);\n+\n+\t/* GLPRT_MSPDC not supported */\n+\t/* GLPRT_XEC not supported */\n+\n+\tpf->offset_loaded = true;\n+\n+\tif (pf->main_vsi)\n+\t\tice_update_vsi_stats(pf->main_vsi);\n+}\n+\n+/* Get all statistics of a port */\n+static int\n+ice_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct ice_hw_port_stats *ns = &pf->stats; /* new stats */\n+\n+\t/* call read registers - updates values, now write them to struct */\n+\tice_read_stats_registers(pf, hw);\n+\n+\tstats->ipackets = ns->eth.rx_unicast +\n+\t\t\t ns->eth.rx_multicast +\n+\t\t\t ns->eth.rx_broadcast -\n+\t\t\t ns->eth.rx_discards -\n+\t\t\t pf->main_vsi->eth_stats.rx_discards;\n+\tstats->opackets = ns->eth.tx_unicast +\n+\t\t\t ns->eth.tx_multicast +\n+\t\t\t ns->eth.tx_broadcast;\n+\tstats->ibytes = ns->eth.rx_bytes;\n+\tstats->obytes = ns->eth.tx_bytes;\n+\tstats->oerrors = ns->eth.tx_errors +\n+\t\t\t pf->main_vsi->eth_stats.tx_errors;\n+\n+\t/* Rx Errors */\n+\tstats->imissed = ns->eth.rx_discards +\n+\t\t\t pf->main_vsi->eth_stats.rx_discards;\n+\tstats->ierrors = ns->crc_errors +\n+\t\t\t ns->rx_undersize +\n+\t\t\t ns->rx_oversize + ns->rx_fragments + ns->rx_jabber;\n+\n+\tPMD_DRV_LOG(DEBUG, \"*************** PF stats start *****************\");\n+\tPMD_DRV_LOG(DEBUG, \"rx_bytes:\t%\"PRIu64\"\", ns->eth.rx_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"rx_unicast:\t%\"PRIu64\"\", ns->eth.rx_unicast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_multicast:%\"PRIu64\"\", ns->eth.rx_multicast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_broadcast:%\"PRIu64\"\", ns->eth.rx_broadcast);\n+\tPMD_DRV_LOG(DEBUG, \"rx_discards:%\"PRIu64\"\", ns->eth.rx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"vsi rx_discards:%\"PRIu64\"\",\n+\t\t pf->main_vsi->eth_stats.rx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"rx_unknown_protocol: %\"PRIu64\"\",\n+\t\t ns->eth.rx_unknown_protocol);\n+\tPMD_DRV_LOG(DEBUG, \"tx_bytes:\t%\"PRIu64\"\", ns->eth.tx_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"tx_unicast:\t%\"PRIu64\"\", ns->eth.tx_unicast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_multicast:%\"PRIu64\"\", ns->eth.tx_multicast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_broadcast:%\"PRIu64\"\", ns->eth.tx_broadcast);\n+\tPMD_DRV_LOG(DEBUG, \"tx_discards:%\"PRIu64\"\", ns->eth.tx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"vsi tx_discards:%\"PRIu64\"\",\n+\t\t pf->main_vsi->eth_stats.tx_discards);\n+\tPMD_DRV_LOG(DEBUG, \"tx_errors:\t\t%\"PRIu64\"\", ns->eth.tx_errors);\n+\n+\tPMD_DRV_LOG(DEBUG, \"tx_dropped_link_down:\t%\"PRIu64\"\",\n+\t\t ns->tx_dropped_link_down);\n+\tPMD_DRV_LOG(DEBUG, \"crc_errors:\t%\"PRIu64\"\", ns->crc_errors);\n+\tPMD_DRV_LOG(DEBUG, \"illegal_bytes:\t%\"PRIu64\"\",\n+\t\t ns->illegal_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"error_bytes:\t%\"PRIu64\"\", ns->error_bytes);\n+\tPMD_DRV_LOG(DEBUG, \"mac_local_faults:\t%\"PRIu64\"\",\n+\t\t ns->mac_local_faults);\n+\tPMD_DRV_LOG(DEBUG, \"mac_remote_faults:\t%\"PRIu64\"\",\n+\t\t ns->mac_remote_faults);\n+\tPMD_DRV_LOG(DEBUG, \"link_xon_rx:\t%\"PRIu64\"\", ns->link_xon_rx);\n+\tPMD_DRV_LOG(DEBUG, \"link_xoff_rx:\t%\"PRIu64\"\", ns->link_xoff_rx);\n+\tPMD_DRV_LOG(DEBUG, \"link_xon_tx:\t%\"PRIu64\"\", ns->link_xon_tx);\n+\tPMD_DRV_LOG(DEBUG, \"link_xoff_tx:\t%\"PRIu64\"\", ns->link_xoff_tx);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_64:\t\t%\"PRIu64\"\", ns->rx_size_64);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_127:\t%\"PRIu64\"\", ns->rx_size_127);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_255:\t%\"PRIu64\"\", ns->rx_size_255);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_511:\t%\"PRIu64\"\", ns->rx_size_511);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_1023:\t%\"PRIu64\"\", ns->rx_size_1023);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_1522:\t%\"PRIu64\"\", ns->rx_size_1522);\n+\tPMD_DRV_LOG(DEBUG, \"rx_size_big:\t%\"PRIu64\"\", ns->rx_size_big);\n+\tPMD_DRV_LOG(DEBUG, \"rx_undersize:\t%\"PRIu64\"\", ns->rx_undersize);\n+\tPMD_DRV_LOG(DEBUG, \"rx_fragments:\t%\"PRIu64\"\", ns->rx_fragments);\n+\tPMD_DRV_LOG(DEBUG, \"rx_oversize:\t%\"PRIu64\"\", ns->rx_oversize);\n+\tPMD_DRV_LOG(DEBUG, \"rx_jabber:\t\t%\"PRIu64\"\", ns->rx_jabber);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_64:\t\t%\"PRIu64\"\", ns->tx_size_64);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_127:\t%\"PRIu64\"\", ns->tx_size_127);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_255:\t%\"PRIu64\"\", ns->tx_size_255);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_511:\t%\"PRIu64\"\", ns->tx_size_511);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_1023:\t%\"PRIu64\"\", ns->tx_size_1023);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_1522:\t%\"PRIu64\"\", ns->tx_size_1522);\n+\tPMD_DRV_LOG(DEBUG, \"tx_size_big:\t%\"PRIu64\"\", ns->tx_size_big);\n+\tPMD_DRV_LOG(DEBUG, \"rx_len_errors:\t%\"PRIu64\"\", ns->rx_len_errors);\n+\tPMD_DRV_LOG(DEBUG, \"************* PF stats end ****************\");\n+\treturn 0;\n+}\n+\n+/* Reset the statistics */\n+static void\n+ice_stats_reset(struct rte_eth_dev *dev)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/* Mark PF and VSI stats to update the offset, aka \"reset\" */\n+\tpf->offset_loaded = false;\n+\tif (pf->main_vsi)\n+\t\tpf->main_vsi->offset_loaded = false;\n+\n+\t/* read the stats, reading current register values into offset */\n+\tice_read_stats_registers(pf, hw);\n+}\n+\n+static uint32_t\n+ice_xstats_calc_num(void)\n+{\n+\tuint32_t num;\n+\n+\tnum = ICE_NB_ETH_XSTATS + ICE_NB_HW_PORT_XSTATS;\n+\n+\treturn num;\n+}\n+\n+static int\n+ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n+\t unsigned int n)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tunsigned int i;\n+\tunsigned int count;\n+\tstruct ice_hw_port_stats *hw_stats = &pf->stats;\n+\n+\tcount = ice_xstats_calc_num();\n+\tif (n < count)\n+\t\treturn count;\n+\n+\tice_read_stats_registers(pf, hw);\n+\n+\tif (!xstats)\n+\t\treturn 0;\n+\n+\tcount = 0;\n+\n+\t/* Get stats from ice_eth_stats struct */\n+\tfor (i = 0; i < ICE_NB_ETH_XSTATS; i++) {\n+\t\txstats[count].value =\n+\t\t\t*(uint64_t *)((char *)&hw_stats->eth +\n+\t\t\t\t ice_stats_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n+\t/* Get individiual stats from ice_hw_port struct */\n+\tfor (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {\n+\t\txstats[count].value =\n+\t\t\t*(uint64_t *)((char *)hw_stats +\n+\t\t\t\t ice_hw_port_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n+\treturn count;\n+}\n+\n+static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n+\t\t\t\tstruct rte_eth_xstat_name *xstats_names,\n+\t\t\t\t__rte_unused unsigned int limit)\n+{\n+\tunsigned int count = 0;\n+\tunsigned int i;\n+\n+\tif (!xstats_names)\n+\t\treturn ice_xstats_calc_num();\n+\n+\t/* Note: limit checked in rte_eth_xstats_names() */\n+\n+\t/* Get stats from ice_eth_stats struct */\n+\tfor (i = 0; i < ICE_NB_ETH_XSTATS; i++) {\n+\t\tsnprintf(xstats_names[count].name,\n+\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t \"%s\", ice_stats_strings[i].name);\n+\t\tcount++;\n+\t}\n+\n+\t/* Get individiual stats from ice_hw_port struct */\n+\tfor (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {\n+\t\tsnprintf(xstats_names[count].name,\n+\t\t\t sizeof(xstats_names[count].name),\n+\t\t\t \"%s\", ice_hw_port_strings[i].name);\n+\t\tcount++;\n+\t}\n+\n+\treturn count;\n+}\n+\n static int\n ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t struct rte_pci_device *pci_dev)\n", "prefixes": [ "v5", "27/31" ] }