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GET /api/patches/48972/?format=api
{ "id": 48972, "url": "https://patches.dpdk.org/api/patches/48972/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-5-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545032259-77179-5-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545032259-77179-5-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-17T07:37:12", "name": "[v5,04/31] net/ice/base: add sideband queue info", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "33e25bb1e9b92d93255f4d524803690b0d720c56", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-5-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2824, "url": "https://patches.dpdk.org/api/series/2824/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2824", "date": "2018-12-17T07:37:08", "name": "A new net PMD - ICE", "version": 5, "mbox": "https://patches.dpdk.org/series/2824/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48972/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/48972/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 11A271B5AD;\n\tMon, 17 Dec 2018 08:33:02 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 549FC1B57F\n\tfor <dev@dpdk.org>; Mon, 17 Dec 2018 08:32:59 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Dec 2018 23:32:58 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2018 23:32:58 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,364,1539673200\"; d=\"scan'208\";a=\"118899085\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 17 Dec 2018 15:37:12 +0800", "Message-Id": "<1545032259-77179-5-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 04/31] net/ice/base: add sideband queue info", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n\nAdd the commands, error codes, and structures\nfor the sideband queue.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n---\n drivers/net/ice/base/ice_sbq_cmd.h | 93 ++++++++++++++++++++++++++++++++++++++\n 1 file changed, 93 insertions(+)\n create mode 100644 drivers/net/ice/base/ice_sbq_cmd.h", "diff": "diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h\nnew file mode 100644\nindex 0000000..6dff378\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_sbq_cmd.h\n@@ -0,0 +1,93 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2018\n+ */\n+\n+#ifndef _ICE_SBQ_CMD_H_\n+#define _ICE_SBQ_CMD_H_\n+\n+/* This header file defines the Sideband Queue commands, error codes and\n+ * descriptor format. It is shared between Firmware and Software.\n+ */\n+\n+/* Sideband Queue command structure and opcodes */\n+enum ice_sbq_opc {\n+\t/* Sideband Queue commands */\n+\tice_sbq_opc_neigh_dev_req\t\t\t= 0x0C00,\n+\tice_sbq_opc_neigh_dev_ev\t\t\t= 0x0C01\n+};\n+\n+/* Sideband Queue descriptor. Indirect command\n+ * and non posted\n+ */\n+struct ice_sbq_cmd_desc {\n+\t__le16 flags;\n+\t__le16 opcode;\n+\t__le16 datalen;\n+\t__le16 cmd_retval;\n+\n+\t/* Opaque message data */\n+\t__le32 cookie_high;\n+\t__le32 cookie_low;\n+\n+\tunion {\n+\t\t__le16 cmd_len;\n+\t\t__le16 cmpl_len;\n+\t} param0;\n+\n+\tu8 reserved[6];\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n+struct ice_sbq_evt_desc {\n+\t__le16 flags;\n+\t__le16 opcode;\n+\t__le16 datalen;\n+\t__le16 cmd_retval;\n+\tu8 data[24];\n+};\n+\n+enum ice_sbq_msg_dev {\n+\trmn_0\t= 0x02,\n+\trmn_1\t= 0x03,\n+\trmn_2\t= 0x04,\n+\tcgu\t= 0x06\n+};\n+\n+enum ice_sbq_msg_opcode {\n+\tice_sbq_msg_rd\t= 0x00,\n+\tice_sbq_msg_wr\t= 0x01\n+};\n+\n+#define ICE_SBQ_MSG_FLAGS\t0x40\n+#define ICE_SBQ_MSG_SBE_FBE\t0x0F\n+\n+struct ice_sbq_msg_req {\n+\tu8 dest_dev;\n+\tu8 src_dev;\n+\tu8 opcode;\n+\tu8 flags;\n+\tu8 sbe_fbe;\n+\tu8 func_id;\n+\t__le16 msg_addr_low;\n+\t__le32 msg_addr_high;\n+\t__le32 data;\n+};\n+\n+struct ice_sbq_msg_cmpl {\n+\tu8 dest_dev;\n+\tu8 src_dev;\n+\tu8 opcode;\n+\tu8 flags;\n+\t__le32 data;\n+};\n+\n+/* Internal struct */\n+struct ice_sbq_msg_input {\n+\tu8 dest_dev;\n+\tu8 opcode;\n+\tu16 msg_addr_low;\n+\tu32 msg_addr_high;\n+\tu32 data;\n+};\n+#endif /* _ICE_SBQ_CMD_H_ */\n", "prefixes": [ "v5", "04/31" ] }