Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 48841,
    "url": "https://patches.dpdk.org/api/patches/48841/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1544786028-10138-1-git-send-email-liang.j.ma@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1544786028-10138-1-git-send-email-liang.j.ma@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1544786028-10138-1-git-send-email-liang.j.ma@intel.com",
    "date": "2018-12-14T11:13:48",
    "name": "[v2] libs/power: add p-state driver compatibility",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a0041635bfe03d86987638fc13bdf8f4e75fb45a",
    "submitter": {
        "id": 904,
        "url": "https://patches.dpdk.org/api/people/904/?format=api",
        "name": "Liang, Ma",
        "email": "liang.j.ma@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1544786028-10138-1-git-send-email-liang.j.ma@intel.com/mbox/",
    "series": [
        {
            "id": 2774,
            "url": "https://patches.dpdk.org/api/series/2774/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2774",
            "date": "2018-12-14T11:13:48",
            "name": "[v2] libs/power: add p-state driver compatibility",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/2774/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/48841/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/48841/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EB75F1B8C6;\n\tFri, 14 Dec 2018 12:14:08 +0100 (CET)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 49D6A1B8C1\n\tfor <dev@dpdk.org>; Fri, 14 Dec 2018 12:14:05 +0100 (CET)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Dec 2018 03:14:05 -0800",
            "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby fmsmga001.fm.intel.com with ESMTP; 14 Dec 2018 03:14:03 -0800",
            "from sivswdev09.ir.intel.com (sivswdev09.ir.intel.com\n\t[10.237.217.48])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\twBEBE3Ag028954; Fri, 14 Dec 2018 11:14:03 GMT",
            "from sivswdev09.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev09.ir.intel.com with ESMTP id wBEBE2Pi010255;\n\tFri, 14 Dec 2018 11:14:02 GMT",
            "(from lma25@localhost)\n\tby sivswdev09.ir.intel.com with LOCAL id wBEBE2o2010251;\n\tFri, 14 Dec 2018 11:14:02 GMT"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.56,352,1539673200\"; d=\"scan'208\";a=\"129924763\"",
        "From": "Liang Ma <liang.j.ma@intel.com>",
        "To": "david.hunt@intel.com",
        "Cc": "dev@dpdk.org, anatoly.burakov@intel.com, Liang Ma <liang.j.ma@intel.com>",
        "Date": "Fri, 14 Dec 2018 11:13:48 +0000",
        "Message-Id": "<1544786028-10138-1-git-send-email-liang.j.ma@intel.com>",
        "X-Mailer": "git-send-email 1.7.7.4",
        "In-Reply-To": "<1542972781-6149-1-git-send-email-liang.j.ma@intel.com>",
        "References": "<1542972781-6149-1-git-send-email-liang.j.ma@intel.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v2] libs/power: add p-state driver compatibility",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Previously, in order to use the power library, it was necessary\nfor the user to disable the intel_pstate driver by adding\n“intel_pstate=disable” to the kernel command line for the system,\nwhich causes the acpi_cpufreq driver to be loaded in its place.\n\nThis patch adds the ability for the power library use the intel-pstate\ndriver.\n\nIt adds a new suite of functions behind the current power library API,\nand will seamlessly set up the user facing API function pointers to\nthe relevant functions depending on whether the system is running with\nacpi_cpufreq kernel driver, intel_pstate kernel driver or in a guest,\nusing kvm. The library API and ABI is unchanged.\n\nSigned-off-by: Liang Ma <liang.j.ma@intel.com>\n---\n lib/librte_power/Makefile               |   2 +\n lib/librte_power/meson.build            |   4 +-\n lib/librte_power/power_pstate_cpufreq.c | 770 ++++++++++++++++++++++++++++++++\n lib/librte_power/power_pstate_cpufreq.h | 218 +++++++++\n lib/librte_power/rte_power.c            |  48 +-\n lib/librte_power/rte_power.h            |   3 +-\n 6 files changed, 1032 insertions(+), 13 deletions(-)\n create mode 100644 lib/librte_power/power_pstate_cpufreq.c\n create mode 100644 lib/librte_power/power_pstate_cpufreq.h",
    "diff": "diff --git a/lib/librte_power/Makefile b/lib/librte_power/Makefile\nindex 9bec668..ab77152 100644\n--- a/lib/librte_power/Makefile\n+++ b/lib/librte_power/Makefile\n@@ -6,6 +6,7 @@ include $(RTE_SDK)/mk/rte.vars.mk\n # library name\n LIB = librte_power.a\n \n+CFLAGS += -DALLOW_EXPERIMENTAL_API\n CFLAGS += $(WERROR_FLAGS) -I$(SRCDIR) -O3 -fno-strict-aliasing\n LDLIBS += -lrte_eal -lrte_timer\n \n@@ -17,6 +18,7 @@ LIBABIVER := 1\n SRCS-$(CONFIG_RTE_LIBRTE_POWER) := rte_power.c power_acpi_cpufreq.c\n SRCS-$(CONFIG_RTE_LIBRTE_POWER) += power_kvm_vm.c guest_channel.c\n SRCS-$(CONFIG_RTE_LIBRTE_POWER) += rte_power_empty_poll.c\n+SRCS-$(CONFIG_RTE_LIBRTE_POWER) += power_pstate_cpufreq.c\n \n # install this header file\n SYMLINK-$(CONFIG_RTE_LIBRTE_POWER)-include := rte_power.h  rte_power_empty_poll.h\ndiff --git a/lib/librte_power/meson.build b/lib/librte_power/meson.build\nindex 9ed8b56..14a2128 100644\n--- a/lib/librte_power/meson.build\n+++ b/lib/librte_power/meson.build\n@@ -6,6 +6,6 @@ if host_machine.system() != 'linux'\n endif\n sources = files('rte_power.c', 'power_acpi_cpufreq.c',\n \t\t'power_kvm_vm.c', 'guest_channel.c',\n-\t\t'rte_power_empty_poll.c')\n+\t\t'rte_power_empty_poll.c',\n+\t\t'power_pstate_cpufreq.c')\n headers = files('rte_power.h','rte_power_empty_poll.h')\n-deps += ['timer']\ndiff --git a/lib/librte_power/power_pstate_cpufreq.c b/lib/librte_power/power_pstate_cpufreq.c\nnew file mode 100644\nindex 0000000..1711484\n--- /dev/null\n+++ b/lib/librte_power/power_pstate_cpufreq.c\n@@ -0,0 +1,770 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2018 Intel Corporation\n+ */\n+\n+#include <stdio.h>\n+#include <sys/types.h>\n+#include <sys/stat.h>\n+#include <fcntl.h>\n+#include <stdlib.h>\n+#include <string.h>\n+#include <unistd.h>\n+#include <signal.h>\n+#include <limits.h>\n+#include <errno.h>\n+\n+#include <rte_memcpy.h>\n+#include <rte_atomic.h>\n+\n+#include \"power_pstate_cpufreq.h\"\n+#include \"power_common.h\"\n+\n+\n+#ifdef RTE_LIBRTE_POWER_DEBUG\n+#define POWER_DEBUG_TRACE(fmt, args...) do { \\\n+\t\tRTE_LOG(ERR, POWER, \"%s: \" fmt, __func__, ## args); \\\n+} while (0)\n+#else\n+#define POWER_DEBUG_TRACE(fmt, args...)\n+#endif\n+\n+#define FOPEN_OR_ERR_RET(f, retval) do { \\\n+\t\tif ((f) == NULL) { \\\n+\t\t\tRTE_LOG(ERR, POWER, \"File not openned\\n\"); \\\n+\t\t\treturn retval; \\\n+\t\t} \\\n+} while (0)\n+\n+#define FOPS_OR_NULL_GOTO(ret, label) do { \\\n+\t\tif ((ret) == NULL) { \\\n+\t\t\tRTE_LOG(ERR, POWER, \"fgets returns nothing\\n\"); \\\n+\t\t\tgoto label; \\\n+\t\t} \\\n+} while (0)\n+\n+#define FOPS_OR_ERR_GOTO(ret, label) do { \\\n+\t\tif ((ret) < 0) { \\\n+\t\t\tRTE_LOG(ERR, POWER, \"File operations failed\\n\"); \\\n+\t\t\tgoto label; \\\n+\t\t} \\\n+} while (0)\n+\n+\n+#define POWER_CONVERT_TO_DECIMAL 10\n+#define BUS_FREQ     100000\n+\n+#define POWER_GOVERNOR_PERF \"performance\"\n+#define POWER_SYSFILE_GOVERNOR  \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_governor\"\n+#define POWER_SYSFILE_MAX_FREQ \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq\"\n+#define POWER_SYSFILE_MIN_FREQ  \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq\"\n+#define POWER_SYSFILE_CUR_FREQ  \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq\"\n+#define POWER_SYSFILE_BASE_MAX_FREQ \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq\"\n+#define POWER_SYSFILE_BASE_MIN_FREQ  \\\n+\t\t\"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq\"\n+#define POWER_MSR_PATH  \"/dev/cpu/%u/msr\"\n+\n+/*\n+ * MSR related\n+ */\n+#define PLATFORM_INFO     0x0CE\n+#define NON_TURBO_MASK    0xFF00\n+#define NON_TURBO_OFFSET  0x8\n+\n+\n+enum power_state {\n+\tPOWER_IDLE = 0,\n+\tPOWER_ONGOING,\n+\tPOWER_USED,\n+\tPOWER_UNKNOWN\n+};\n+\n+struct pstate_power_info {\n+\tunsigned int lcore_id;               /**< Logical core id */\n+\tuint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */\n+\tuint32_t nb_freqs;                   /**< number of available freqs */\n+\tFILE *f_cur_min;                     /**< FD of scaling_min */\n+\tFILE *f_cur_max;                     /**< FD of scaling_max */\n+\tchar governor_ori[32];               /**< Original governor name */\n+\tuint32_t curr_idx;                   /**< Freq index in freqs array */\n+\tuint32_t non_turbo_max_ratio;        /**< Non Turbo Max ratio  */\n+\tuint32_t sys_max_freq;               /**< system wide max freq  */\n+\tvolatile uint32_t state;             /**< Power in use state */\n+\tuint16_t turbo_available;            /**< Turbo Boost available */\n+\tuint16_t turbo_enable;               /**< Turbo Boost enable/disable */\n+} __rte_cache_aligned;\n+\n+\n+static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];\n+\n+/**\n+ * It is to read the specific MSR.\n+ */\n+\n+static int32_t\n+power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)\n+{\n+\tint fd, ret;\n+\tchar fullpath[PATH_MAX];\n+\n+\tsnprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);\n+\n+\tfd = open(fullpath, O_RDONLY);\n+\n+\tif (fd < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Error opening '%s': %s\\n\", fullpath,\n+\t\t\t\t strerror(errno));\n+\t\treturn fd;\n+\t}\n+\n+\tret = pread(fd, val, sizeof(uint64_t), msr);\n+\n+\tif (ret < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Error reading '%s': %s\\n\", fullpath,\n+\t\t\t\t strerror(errno));\n+\t\tgoto out;\n+\t}\n+\n+\tPOWER_DEBUG_TRACE(\"MSR Path %s, offset 0x%X for lcore %u\\n\",\n+\t\t\tfullpath, msr, lcore_id);\n+\n+\tPOWER_DEBUG_TRACE(\"Ret value %d, content is 0x%lx\\n\", ret, *val);\n+\n+out:\tclose(fd);\n+\treturn ret;\n+}\n+\n+/**\n+ * It is to fopen the sys file for the future setting the lcore frequency.\n+ */\n+static int\n+power_init_for_setting_freq(struct pstate_power_info *pi)\n+{\n+\tFILE *f_min, *f_max;\n+\tchar fullpath_min[PATH_MAX];\n+\tchar fullpath_max[PATH_MAX];\n+\tuint64_t max_non_turbo = 0;\n+\n+\tsnprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,\n+\t\t\tpi->lcore_id);\n+\n+\tf_min = fopen(fullpath_min, \"rw+\");\n+\tFOPEN_OR_ERR_RET(f_min, -1);\n+\n+\tsnprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,\n+\t\t\tpi->lcore_id);\n+\n+\tf_max = fopen(fullpath_max, \"rw+\");\n+\tFOPEN_OR_ERR_RET(f_max, -1);\n+\n+\tpi->f_cur_min = f_min;\n+\tpi->f_cur_max = f_max;\n+\n+\t/* Add MSR read to detect turbo status */\n+\n+\tif (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)\n+\t\treturn -1;\n+\n+\tmax_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;\n+\n+\tPOWER_DEBUG_TRACE(\"no turbo perf %lu\\n\", max_non_turbo);\n+\n+\tpi->non_turbo_max_ratio = max_non_turbo;\n+\n+\treturn 0;\n+}\n+\n+static int\n+set_freq_internal(struct pstate_power_info *pi, uint32_t idx)\n+{\n+\tuint32_t target_freq = 0;\n+\n+\tif (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid frequency index %u, which \"\n+\t\t\t\t\"should be less than %u\\n\", idx, pi->nb_freqs);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Check if it is the same as current */\n+\tif (idx == pi->curr_idx)\n+\t\treturn 0;\n+\n+\t/* Because Intel Pstate Driver only allow user change min/max hint\n+\t * User need change the min/max as same value.\n+\t */\n+\tif (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Fail to set file position indicator to 0 \"\n+\t\t\t\t\"for setting frequency for lcore %u\\n\",\n+\t\t\t\tpi->lcore_id);\n+\t\treturn -1;\n+\t}\n+\n+\tif (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Fail to set file position indicator to 0 \"\n+\t\t\t\t\"for setting frequency for lcore %u\\n\",\n+\t\t\t\tpi->lcore_id);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Turbo is available and enabled, first freq bucket is sys max freq */\n+\tif (pi->turbo_available && pi->turbo_enable && (idx == 0))\n+\t\ttarget_freq = pi->sys_max_freq;\n+\telse\n+\t\ttarget_freq = pi->freqs[idx];\n+\n+\t/* Decrease freq, the min freq should be updated first */\n+\tif (idx  >  pi->curr_idx) {\n+\n+\t\tif (fprintf(pi->f_cur_min, \"%u\", target_freq) < 0) {\n+\t\t\tRTE_LOG(ERR, POWER, \"Fail to write new frequency for \"\n+\t\t\t\t\t\"lcore %u\\n\", pi->lcore_id);\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tif (fprintf(pi->f_cur_max, \"%u\", target_freq) < 0) {\n+\t\t\tRTE_LOG(ERR, POWER, \"Fail to write new frequency for \"\n+\t\t\t\t\t\"lcore %u\\n\", pi->lcore_id);\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tPOWER_DEBUG_TRACE(\"Freqency '%u' to be set for lcore %u\\n\",\n+\t\t\t\t  target_freq, pi->lcore_id);\n+\n+\t\tfflush(pi->f_cur_min);\n+\t\tfflush(pi->f_cur_max);\n+\n+\t}\n+\n+\t/* Increase freq, the max freq should be updated first */\n+\tif (idx  <  pi->curr_idx) {\n+\n+\t\tif (fprintf(pi->f_cur_max, \"%u\", target_freq) < 0) {\n+\t\t\tRTE_LOG(ERR, POWER, \"Fail to write new frequency for \"\n+\t\t\t\t\t\"lcore %u\\n\", pi->lcore_id);\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tif (fprintf(pi->f_cur_min, \"%u\", target_freq) < 0) {\n+\t\t\tRTE_LOG(ERR, POWER, \"Fail to write new frequency for \"\n+\t\t\t\t\t\"lcore %u\\n\", pi->lcore_id);\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tPOWER_DEBUG_TRACE(\"Freqency '%u' to be set for lcore %u\\n\",\n+\t\t\t\t  target_freq, pi->lcore_id);\n+\n+\t\tfflush(pi->f_cur_max);\n+\t\tfflush(pi->f_cur_min);\n+\t}\n+\n+\tpi->curr_idx = idx;\n+\n+\treturn 1;\n+}\n+\n+/**\n+ * It is to check the current scaling governor by reading sys file, and then\n+ * set it into 'performance' if it is not by writing the sys file. The original\n+ * governor will be saved for rolling back.\n+ */\n+static int\n+power_set_governor_performance(struct pstate_power_info *pi)\n+{\n+\tFILE *f;\n+\tint ret = -1;\n+\tchar buf[BUFSIZ];\n+\tchar fullpath[PATH_MAX];\n+\tchar *s;\n+\tint val;\n+\n+\tsnprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,\n+\t\t\tpi->lcore_id);\n+\tf = fopen(fullpath, \"rw+\");\n+\tFOPEN_OR_ERR_RET(f, ret);\n+\n+\ts = fgets(buf, sizeof(buf), f);\n+\tFOPS_OR_NULL_GOTO(s, out);\n+\n+\t/* Check if current governor is performance */\n+\tif (strncmp(buf, POWER_GOVERNOR_PERF,\n+\t\t\tsizeof(POWER_GOVERNOR_PERF)) == 0) {\n+\t\tret = 0;\n+\t\tPOWER_DEBUG_TRACE(\"Power management governor of lcore %u is \"\n+\t\t\t\t\"already performance\\n\", pi->lcore_id);\n+\t\tgoto out;\n+\t}\n+\t/* Save the original governor */\n+\tsnprintf(pi->governor_ori, sizeof(pi->governor_ori), \"%s\", buf);\n+\n+\t/* Write 'performance' to the governor */\n+\tval = fseek(f, 0, SEEK_SET);\n+\tFOPS_OR_ERR_GOTO(val, out);\n+\n+\tval = fputs(POWER_GOVERNOR_PERF, f);\n+\tFOPS_OR_ERR_GOTO(val, out);\n+\n+\tret = 0;\n+\tRTE_LOG(INFO, POWER, \"Power management governor of lcore %u has been \"\n+\t\t\t\"set to performance successfully\\n\", pi->lcore_id);\n+out:\n+\tfclose(f);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * It is to check the governor and then set the original governor back if\n+ * needed by writing the sys file.\n+ */\n+static int\n+power_set_governor_original(struct pstate_power_info *pi)\n+{\n+\tFILE *f;\n+\tint ret = -1;\n+\tchar buf[BUFSIZ];\n+\tchar fullpath[PATH_MAX];\n+\tchar *s;\n+\tint val;\n+\n+\tsnprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,\n+\t\t\tpi->lcore_id);\n+\tf = fopen(fullpath, \"rw+\");\n+\tFOPEN_OR_ERR_RET(f, ret);\n+\n+\ts = fgets(buf, sizeof(buf), f);\n+\tFOPS_OR_NULL_GOTO(s, out);\n+\n+\t/* Check if the governor to be set is the same as current */\n+\tif (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {\n+\t\tret = 0;\n+\t\tPOWER_DEBUG_TRACE(\"Power management governor of lcore %u \"\n+\t\t\t\t\"has already been set to %s\\n\",\n+\t\t\t\tpi->lcore_id, pi->governor_ori);\n+\t\tgoto out;\n+\t}\n+\n+\t/* Write back the original governor */\n+\tval = fseek(f, 0, SEEK_SET);\n+\tFOPS_OR_ERR_GOTO(val, out);\n+\n+\tval = fputs(pi->governor_ori, f);\n+\tFOPS_OR_ERR_GOTO(val, out);\n+\n+\tret = 0;\n+\tRTE_LOG(INFO, POWER, \"Power management governor of lcore %u \"\n+\t\t\t\"has been set back to %s successfully\\n\",\n+\t\t\tpi->lcore_id, pi->governor_ori);\n+out:\n+\tfclose(f);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * It is to get the available frequencies of the specific lcore by reading the\n+ * sys file.\n+ */\n+static int\n+power_get_available_freqs(struct pstate_power_info *pi)\n+{\n+\tFILE *f_min, *f_max;\n+\tint ret = -1;\n+\tchar *p_min, *p_max;\n+\tchar buf_min[BUFSIZ];\n+\tchar buf_max[BUFSIZ];\n+\tchar fullpath_min[PATH_MAX];\n+\tchar fullpath_max[PATH_MAX];\n+\tchar *s_min, *s_max;\n+\tuint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;\n+\tuint32_t i, num_freqs = 0;\n+\n+\tsnprintf(fullpath_max, sizeof(fullpath_max),\n+\t\t\tPOWER_SYSFILE_BASE_MAX_FREQ,\n+\t\t\tpi->lcore_id);\n+\tsnprintf(fullpath_min, sizeof(fullpath_min),\n+\t\t\tPOWER_SYSFILE_BASE_MIN_FREQ,\n+\t\t\tpi->lcore_id);\n+\n+\tf_min = fopen(fullpath_min, \"r\");\n+\tFOPEN_OR_ERR_RET(f_min, ret);\n+\n+\tf_max = fopen(fullpath_max, \"r\");\n+\tFOPEN_OR_ERR_RET(f_max, ret);\n+\n+\ts_min = fgets(buf_min, sizeof(buf_min), f_min);\n+\tFOPS_OR_NULL_GOTO(s_min, out);\n+\n+\ts_max = fgets(buf_max, sizeof(buf_max), f_max);\n+\tFOPS_OR_NULL_GOTO(s_max, out);\n+\n+\n+\t/* Strip the line break if there is */\n+\tp_min = strchr(buf_min, '\\n');\n+\tif (p_min != NULL)\n+\t\t*p_min = 0;\n+\n+\tp_max = strchr(buf_max, '\\n');\n+\tif (p_max != NULL)\n+\t\t*p_max = 0;\n+\n+\tsys_min_freq = strtoul(buf_min, &p_min, POWER_CONVERT_TO_DECIMAL);\n+\tsys_max_freq = strtoul(buf_max, &p_max, POWER_CONVERT_TO_DECIMAL);\n+\n+\tif (sys_max_freq < sys_min_freq)\n+\t\tgoto out;\n+\n+\tpi->sys_max_freq = sys_max_freq;\n+\n+\tbase_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;\n+\n+\tPOWER_DEBUG_TRACE(\"sys min %u, sys max %u, base_max %u\\n\",\n+\t\t\tsys_min_freq,\n+\t\t\tsys_max_freq,\n+\t\t\tbase_max_freq);\n+\n+\tif (base_max_freq < sys_max_freq)\n+\t\tpi->turbo_available = 1;\n+\telse\n+\t\tpi->turbo_available = 0;\n+\n+\t/* If turbo is available then there is one extra freq bucket\n+\t * to store the sys max freq which value is base_max +1\n+\t */\n+\tnum_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +\n+\t\tpi->turbo_available;\n+\n+\t/* Generate the freq bucket array.\n+\t * If turbo is available the freq bucket[0] value is base_max +1\n+\t * the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ\n+\t * and so on.\n+\t * If turbo is not available bucket[0] is base_max and so on\n+\t */\n+\tfor (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {\n+\t\tif ((i == 0) && pi->turbo_available)\n+\t\t\tpi->freqs[pi->nb_freqs++] = base_max_freq + 1;\n+\t\telse\n+\t\t\tpi->freqs[pi->nb_freqs++] =\n+\t\t\tbase_max_freq - (i - pi->turbo_available) * BUS_FREQ;\n+\t}\n+\n+\tret = 0;\n+\n+\tPOWER_DEBUG_TRACE(\"%d frequency(s) of lcore %u are available\\n\",\n+\t\t\tnum_freqs, pi->lcore_id);\n+\n+out:\n+\tfclose(f_min);\n+\tfclose(f_max);\n+\n+\treturn ret;\n+}\n+\n+int\n+power_pstate_cpufreq_init(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Lcore id %u can not exceed %u\\n\",\n+\t\t\t\tlcore_id, RTE_MAX_LCORE - 1U);\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\tif (rte_atomic32_cmpset(&(pi->state), POWER_IDLE, POWER_ONGOING)\n+\t\t\t== 0) {\n+\t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n+\t\t\t\t\"in use\\n\", lcore_id);\n+\t\treturn -1;\n+\t}\n+\n+\tpi->lcore_id = lcore_id;\n+\t/* Check and set the governor */\n+\tif (power_set_governor_performance(pi) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Cannot set governor of lcore %u to \"\n+\t\t\t\t\"performance\\n\", lcore_id);\n+\t\tgoto fail;\n+\t}\n+\t/* Init for setting lcore frequency */\n+\tif (power_init_for_setting_freq(pi) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Cannot init for setting frequency for \"\n+\t\t\t\t\"lcore %u\\n\", lcore_id);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Get the available frequencies */\n+\tif (power_get_available_freqs(pi) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Cannot get available frequencies of \"\n+\t\t\t\t\"lcore %u\\n\", lcore_id);\n+\t\tgoto fail;\n+\t}\n+\n+\n+\t/* Set freq to max by default */\n+\tif (power_pstate_cpufreq_freq_max(lcore_id) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Cannot set frequency of lcore %u \"\n+\t\t\t\t\"to max\\n\", lcore_id);\n+\t\tgoto fail;\n+\t}\n+\n+\tRTE_LOG(INFO, POWER, \"Initialized successfully for lcore %u \"\n+\t\t\t\"power management\\n\", lcore_id);\n+\trte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_USED);\n+\n+\treturn 0;\n+\n+fail:\n+\trte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);\n+\n+\treturn -1;\n+}\n+\n+int\n+power_pstate_cpufreq_exit(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Lcore id %u can not exceeds %u\\n\",\n+\t\t\t\tlcore_id, RTE_MAX_LCORE - 1U);\n+\t\treturn -1;\n+\t}\n+\tpi = &lcore_power_info[lcore_id];\n+\n+\tif (rte_atomic32_cmpset(&(pi->state), POWER_USED, POWER_ONGOING)\n+\t\t\t== 0) {\n+\t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n+\t\t\t\t\"not used\\n\", lcore_id);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Close FD of setting freq */\n+\tfclose(pi->f_cur_min);\n+\tfclose(pi->f_cur_max);\n+\tpi->f_cur_min = NULL;\n+\tpi->f_cur_max = NULL;\n+\n+\t/* Set the governor back to the original */\n+\tif (power_set_governor_original(pi) < 0) {\n+\t\tRTE_LOG(ERR, POWER, \"Cannot set the governor of %u back \"\n+\t\t\t\t\"to the original\\n\", lcore_id);\n+\t\tgoto fail;\n+\t}\n+\n+\tRTE_LOG(INFO, POWER, \"Power management of lcore %u has exited from \"\n+\t\t\t\"'performance' mode and been set back to the \"\n+\t\t\t\"original\\n\", lcore_id);\n+\trte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_IDLE);\n+\n+\treturn 0;\n+\n+fail:\n+\trte_atomic32_cmpset(&(pi->state), POWER_ONGOING, POWER_UNKNOWN);\n+\n+\treturn -1;\n+}\n+\n+\n+uint32_t\n+power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\tif (num < pi->nb_freqs) {\n+\t\tRTE_LOG(ERR, POWER, \"Buffer size is not enough\\n\");\n+\t\treturn 0;\n+\t}\n+\trte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));\n+\n+\treturn pi->nb_freqs;\n+}\n+\n+uint32_t\n+power_pstate_cpufreq_get_freq(unsigned int lcore_id)\n+{\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn RTE_POWER_INVALID_FREQ_INDEX;\n+\t}\n+\n+\treturn lcore_power_info[lcore_id].curr_idx;\n+}\n+\n+\n+int\n+power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)\n+{\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\treturn set_freq_internal(&(lcore_power_info[lcore_id]), index);\n+}\n+\n+int\n+power_pstate_cpufreq_freq_up(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\tif (pi->curr_idx == 0)\n+\t\treturn 0;\n+\n+\t/* Frequencies in the array are from high to low. */\n+\treturn set_freq_internal(pi, pi->curr_idx - 1);\n+}\n+\n+int\n+power_pstate_cpufreq_freq_down(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\tif (pi->curr_idx + 1 == pi->nb_freqs)\n+\t\treturn 0;\n+\n+\t/* Frequencies in the array are from high to low. */\n+\treturn set_freq_internal(pi, pi->curr_idx + 1);\n+}\n+\n+int\n+power_pstate_cpufreq_freq_max(unsigned int lcore_id)\n+{\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Frequencies in the array are from high to low. */\n+\tif (lcore_power_info[lcore_id].turbo_available) {\n+\t\tif (lcore_power_info[lcore_id].turbo_enable)\n+\t\t\t/* Set to Turbo */\n+\t\t\treturn set_freq_internal(\n+\t\t\t\t\t&lcore_power_info[lcore_id], 0);\n+\t\telse\n+\t\t\t/* Set to max non-turbo */\n+\t\t\treturn set_freq_internal(\n+\t\t\t\t\t&lcore_power_info[lcore_id], 1);\n+\t} else\n+\t\treturn set_freq_internal(&lcore_power_info[lcore_id], 0);\n+}\n+\n+\n+int\n+power_pstate_cpufreq_freq_min(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\n+\t/* Frequencies in the array are from high to low. */\n+\treturn set_freq_internal(pi, pi->nb_freqs - 1);\n+}\n+\n+\n+int\n+power_pstate_turbo_status(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\n+\treturn pi->turbo_enable;\n+}\n+\n+int\n+power_pstate_enable_turbo(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\n+\tif (pi->turbo_available)\n+\t\tpi->turbo_enable = 1;\n+\telse {\n+\t\tpi->turbo_enable = 0;\n+\t\tRTE_LOG(ERR, POWER,\n+\t\t\t\"Failed to enable turbo on lcore %u\\n\",\n+\t\t\tlcore_id);\n+\t\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+\n+int\n+power_pstate_disable_turbo(unsigned int lcore_id)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\n+\tpi->turbo_enable = 0;\n+\n+\n+\treturn 0;\n+}\n+\n+\n+int power_pstate_get_capabilities(unsigned int lcore_id,\n+\t\tstruct rte_power_core_capabilities *caps)\n+{\n+\tstruct pstate_power_info *pi;\n+\n+\tif (lcore_id >= RTE_MAX_LCORE) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid lcore ID\\n\");\n+\t\treturn -1;\n+\t}\n+\tif (caps == NULL) {\n+\t\tRTE_LOG(ERR, POWER, \"Invalid argument\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tpi = &lcore_power_info[lcore_id];\n+\tcaps->capabilities = 0;\n+\tcaps->turbo = !!(pi->turbo_available);\n+\n+\treturn 0;\n+}\ndiff --git a/lib/librte_power/power_pstate_cpufreq.h b/lib/librte_power/power_pstate_cpufreq.h\nnew file mode 100644\nindex 0000000..2f11128\n--- /dev/null\n+++ b/lib/librte_power/power_pstate_cpufreq.h\n@@ -0,0 +1,218 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2018 Intel Corporation\n+ */\n+\n+#ifndef _POWER_PSTATE_CPUFREQ_H\n+#define _POWER_PSTATE_CPUFREQ_H\n+\n+/**\n+ * @file\n+ * RTE Power Management via Intel Pstate driver\n+ */\n+\n+#include <rte_common.h>\n+#include <rte_byteorder.h>\n+#include <rte_log.h>\n+#include <rte_string_fns.h>\n+#include \"rte_power.h\"\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+/**\n+ * Initialize power management for a specific lcore. It will check and set the\n+ * governor to performance for the lcore, get the available frequencies, and\n+ * prepare to set new lcore frequency.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 0 on success.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_init(unsigned int lcore_id);\n+\n+/**\n+ * Exit power management on a specific lcore. It will set the governor to which\n+ * is before initialized.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 0 on success.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_exit(unsigned int lcore_id);\n+\n+/**\n+ * Get the available frequencies of a specific lcore. The return value will be\n+ * the minimal one of the total number of available frequencies and the number\n+ * of buffer. The index of available frequencies used in other interfaces\n+ * should be in the range of 0 to this return value.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ * @param freqs\n+ *  The buffer array to save the frequencies.\n+ * @param num\n+ *  The number of frequencies to get.\n+ *\n+ * @return\n+ *  The number of available frequencies.\n+ */\n+uint32_t power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs,\n+\t\tuint32_t num);\n+\n+/**\n+ * Return the current index of available frequencies of a specific lcore.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  The current index of available frequencies.\n+ *  If error, it will return 'RTE_POWER_INVALID_FREQ_INDEX = (~0)'.\n+ */\n+uint32_t power_pstate_cpufreq_get_freq(unsigned int lcore_id);\n+\n+/**\n+ * Set the new frequency for a specific lcore by indicating the index of\n+ * available frequencies.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ * @param index\n+ *  The index of available frequencies.\n+ *\n+ * @return\n+ *  - 1 on success with frequency changed.\n+ *  - 0 on success without frequency changed.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index);\n+\n+/**\n+ * Scale up the frequency of a specific lcore according to the available\n+ * frequencies.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 1 on success with frequency changed.\n+ *  - 0 on success without frequency changed.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_freq_up(unsigned int lcore_id);\n+\n+/**\n+ * Scale down the frequency of a specific lcore according to the available\n+ * frequencies.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 1 on success with frequency changed.\n+ *  - 0 on success without frequency changed.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_freq_down(unsigned int lcore_id);\n+\n+/**\n+ * Scale up the frequency of a specific lcore to the highest according to the\n+ * available frequencies.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 1 on success with frequency changed.\n+ *  - 0 on success without frequency changed.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_freq_max(unsigned int lcore_id);\n+\n+/**\n+ * Scale down the frequency of a specific lcore to the lowest according to the\n+ * available frequencies.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 1 on success with frequency changed.\n+ *  - 0 on success without frequency changed.\n+ *  - Negative on error.\n+ */\n+int power_pstate_cpufreq_freq_min(unsigned int lcore_id);\n+\n+/**\n+ * Get the turbo status of a specific lcore.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 1 Turbo Boost is enabled on this lcore.\n+ *  - 0 Turbo Boost is disabled on this lcore.\n+ *  - Negative on error.\n+ */\n+int power_pstate_turbo_status(unsigned int lcore_id);\n+\n+/**\n+ * Enable Turbo Boost on a specific lcore.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 0 Turbo Boost is enabled successfully on this lcore.\n+ *  - Negative on error.\n+ */\n+int power_pstate_enable_turbo(unsigned int lcore_id);\n+\n+/**\n+ * Disable Turbo Boost on a specific lcore.\n+ * It should be protected outside of this function for threadsafe.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ *\n+ * @return\n+ *  - 0 Turbo Boost disabled successfully on this lcore.\n+ *  - Negative on error.\n+ */\n+int power_pstate_disable_turbo(unsigned int lcore_id);\n+\n+/**\n+ * Returns power capabilities for a specific lcore.\n+ *\n+ * @param lcore_id\n+ *  lcore id.\n+ * @param caps\n+ *  pointer to rte_power_core_capabilities object.\n+ *\n+ * @return\n+ *  - 0 on success.\n+ *  - Negative on error.\n+ */\n+int power_pstate_get_capabilities(unsigned int lcore_id,\n+\t\tstruct rte_power_core_capabilities *caps);\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif\ndiff --git a/lib/librte_power/rte_power.c b/lib/librte_power/rte_power.c\nindex 208b791..a05fbef 100644\n--- a/lib/librte_power/rte_power.c\n+++ b/lib/librte_power/rte_power.c\n@@ -7,6 +7,7 @@\n #include \"rte_power.h\"\n #include \"power_acpi_cpufreq.h\"\n #include \"power_kvm_vm.h\"\n+#include \"power_pstate_cpufreq.h\"\n #include \"power_common.h\"\n \n enum power_management_env global_default_env = PM_ENV_NOT_SET;\n@@ -56,6 +57,19 @@ rte_power_set_env(enum power_management_env env)\n \t\trte_power_freq_enable_turbo = power_kvm_vm_enable_turbo;\n \t\trte_power_freq_disable_turbo = power_kvm_vm_disable_turbo;\n \t\trte_power_get_capabilities = power_kvm_vm_get_capabilities;\n+\t} else if (env == PM_ENV_PSTATE_CPUFREQ) {\n+\t\trte_power_freqs = power_pstate_cpufreq_freqs;\n+\t\trte_power_get_freq = power_pstate_cpufreq_get_freq;\n+\t\trte_power_set_freq = power_pstate_cpufreq_set_freq;\n+\t\trte_power_freq_up = power_pstate_cpufreq_freq_up;\n+\t\trte_power_freq_down = power_pstate_cpufreq_freq_down;\n+\t\trte_power_freq_min = power_pstate_cpufreq_freq_min;\n+\t\trte_power_freq_max = power_pstate_cpufreq_freq_max;\n+\t\trte_power_turbo_status = power_pstate_turbo_status;\n+\t\trte_power_freq_enable_turbo = power_pstate_enable_turbo;\n+\t\trte_power_freq_disable_turbo = power_pstate_disable_turbo;\n+\t\trte_power_get_capabilities = power_pstate_get_capabilities;\n+\n \t} else {\n \t\tRTE_LOG(ERR, POWER, \"Invalid Power Management Environment(%d) set\\n\",\n \t\t\t\tenv);\n@@ -64,7 +78,6 @@ rte_power_set_env(enum power_management_env env)\n \t}\n \tglobal_default_env = env;\n \treturn 0;\n-\n }\n \n void\n@@ -84,21 +97,32 @@ rte_power_init(unsigned int lcore_id)\n {\n \tint ret = -1;\n \n-\tif (global_default_env == PM_ENV_ACPI_CPUFREQ) {\n+\tswitch (global_default_env) {\n+\tcase PM_ENV_ACPI_CPUFREQ:\n \t\treturn power_acpi_cpufreq_init(lcore_id);\n-\t}\n-\tif (global_default_env == PM_ENV_KVM_VM) {\n+\tcase PM_ENV_KVM_VM:\n \t\treturn power_kvm_vm_init(lcore_id);\n+\tcase PM_ENV_PSTATE_CPUFREQ:\n+\t\treturn power_pstate_cpufreq_init(lcore_id);\n+\tdefault:\n+\t\tRTE_LOG(INFO, POWER, \"Env isn't set yet!\\n\");\n \t}\n+\n \t/* Auto detect Environment */\n-\tRTE_LOG(INFO, POWER, \"Attempting to initialise ACPI cpufreq power \"\n-\t\t\t\"management...\\n\");\n+\tRTE_LOG(INFO, POWER, \"Attempting to initialise ACPI cpufreq power management...\\n\");\n \tret = power_acpi_cpufreq_init(lcore_id);\n \tif (ret == 0) {\n \t\trte_power_set_env(PM_ENV_ACPI_CPUFREQ);\n \t\tgoto out;\n \t}\n \n+\tRTE_LOG(INFO, POWER, \"Attempting to initialise PSTAT power management...\\n\");\n+\tret = power_pstate_cpufreq_init(lcore_id);\n+\tif (ret == 0) {\n+\t\trte_power_set_env(PM_ENV_PSTATE_CPUFREQ);\n+\t\tgoto out;\n+\t}\n+\n \tRTE_LOG(INFO, POWER, \"Attempting to initialise VM power management...\\n\");\n \tret = power_kvm_vm_init(lcore_id);\n \tif (ret == 0) {\n@@ -114,13 +138,17 @@ rte_power_init(unsigned int lcore_id)\n int\n rte_power_exit(unsigned int lcore_id)\n {\n-\tif (global_default_env == PM_ENV_ACPI_CPUFREQ)\n+\tswitch (global_default_env) {\n+\tcase PM_ENV_ACPI_CPUFREQ:\n \t\treturn power_acpi_cpufreq_exit(lcore_id);\n-\tif (global_default_env == PM_ENV_KVM_VM)\n+\tcase PM_ENV_KVM_VM:\n \t\treturn power_kvm_vm_exit(lcore_id);\n+\tcase PM_ENV_PSTATE_CPUFREQ:\n+\t\treturn power_pstate_cpufreq_exit(lcore_id);\n+\tdefault:\n+\t\tRTE_LOG(ERR, POWER, \"Environment has not been set, unable to exit gracefully\\n\");\n \n-\tRTE_LOG(ERR, POWER, \"Environment has not been set, unable to exit \"\n-\t\t\t\t\"gracefully\\n\");\n+\t}\n \treturn -1;\n \n }\ndiff --git a/lib/librte_power/rte_power.h b/lib/librte_power/rte_power.h\nindex d70bc0b..c5e8f6b 100644\n--- a/lib/librte_power/rte_power.h\n+++ b/lib/librte_power/rte_power.h\n@@ -20,7 +20,8 @@ extern \"C\" {\n #endif\n \n /* Power Management Environment State */\n-enum power_management_env {PM_ENV_NOT_SET, PM_ENV_ACPI_CPUFREQ, PM_ENV_KVM_VM};\n+enum power_management_env {PM_ENV_NOT_SET, PM_ENV_ACPI_CPUFREQ, PM_ENV_KVM_VM,\n+\t\tPM_ENV_PSTATE_CPUFREQ};\n \n /**\n  * Set the default power management implementation. If this is not called prior\n",
    "prefixes": [
        "v2"
    ]
}