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GET /api/patches/47166/?format=api
{ "id": 47166, "url": "https://patches.dpdk.org/api/patches/47166/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20181022141657.4727-10-g.singh@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20181022141657.4727-10-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20181022141657.4727-10-g.singh@nxp.com", "date": "2018-10-22T14:17:52", "name": "[v4,09/15] crypto/caam_jr: add device cababilities", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b2cec9193359c7b0b46553f7e8561617a637ae5e", "submitter": { "id": 1068, "url": "https://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20181022141657.4727-10-g.singh@nxp.com/mbox/", "series": [ { "id": 2012, "url": "https://patches.dpdk.org/api/series/2012/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2012", "date": "2018-10-22T14:17:33", "name": "Introducing the NXP CAAM job ring driver", "version": 4, "mbox": "https://patches.dpdk.org/series/2012/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/47166/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/47166/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 68F471B1F0;\n\tMon, 22 Oct 2018 16:18:04 +0200 (CEST)", "from EUR03-DB5-obe.outbound.protection.outlook.com\n\t(mail-eopbgr40047.outbound.protection.outlook.com [40.107.4.47])\n\tby dpdk.org (Postfix) with ESMTP id 8B4667CBC\n\tfor <dev@dpdk.org>; Mon, 22 Oct 2018 16:17:53 +0200 (CEST)", "from HE1PR04MB1530.eurprd04.prod.outlook.com (10.164.48.20) by\n\tHE1PR04MB3242.eurprd04.prod.outlook.com (10.170.251.154) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1250.30; Mon, 22 Oct 2018 14:17:52 +0000", "from HE1PR04MB1530.eurprd04.prod.outlook.com\n\t([fe80::95cd:198:d5c5:59a4]) by\n\tHE1PR04MB1530.eurprd04.prod.outlook.com\n\t([fe80::95cd:198:d5c5:59a4%5]) with mapi id 15.20.1250.028;\n\tMon, 22 Oct 2018 14:17:52 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=GCNMZY8v4aXXRRLBM+keLSFsZEfmMZm5Yr0qy0Srxgk=;\n\tb=cVFgslGt2OLtaubkSbjpY94GpjEZiHOdR1pHAlYv3THYmK07I39Q+Sieqc/L8JmLdEV4VE7NXwy69cjuIo2HctFjNRYnFbg43n07wOiW1V9YcqJQciK713EYj9N/pUaoYgRCEKJaIRMbHazSzerNiAmyYq/c6ZLeRfs85TywkAs=", "From": "Gagandeep Singh <G.Singh@nxp.com>", "To": "\"dev@dpdk.org\" <dev@dpdk.org>, Akhil Goyal <akhil.goyal@nxp.com>", "CC": "Gagandeep Singh <G.Singh@nxp.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>", "Thread-Topic": "[PATCH v4 09/15] crypto/caam_jr: add device cababilities", "Thread-Index": "AQHUahIE3bAEHWFTtUmZ5N9PquurcQ==", "Date": "Mon, 22 Oct 2018 14:17:52 +0000", "Message-ID": "<20181022141657.4727-10-g.singh@nxp.com>", "References": "<20181022133021.11264-1-g.singh@nxp.com>\n\t<20181022141657.4727-1-g.singh@nxp.com>", "In-Reply-To": "<20181022141657.4727-1-g.singh@nxp.com>", "Accept-Language": "en-US", "Content-Language": "en-US", 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"Subject": "[dpdk-dev] [PATCH v4 09/15] crypto/caam_jr: add device cababilities", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "add device capabilities for supported algorithms,\nkey length etc.\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\nAcked-by: Akhil Goyal <akhil.goyal@nxp.com>\n---\n drivers/crypto/caam_jr/Makefile | 1 +\n drivers/crypto/caam_jr/caam_jr.c | 2 +\n drivers/crypto/caam_jr/caam_jr_capabilities.c | 232 ++++++++++++++++++\n drivers/crypto/caam_jr/caam_jr_capabilities.h | 13 +\n drivers/crypto/caam_jr/meson.build | 5 +-\n 5 files changed, 252 insertions(+), 1 deletion(-)\n create mode 100644 drivers/crypto/caam_jr/caam_jr_capabilities.c\n create mode 100644 drivers/crypto/caam_jr/caam_jr_capabilities.h", "diff": "diff --git a/drivers/crypto/caam_jr/Makefile b/drivers/crypto/caam_jr/Makefile\nindex cfd093a5f..88cdf7410 100644\n--- a/drivers/crypto/caam_jr/Makefile\n+++ b/drivers/crypto/caam_jr/Makefile\n@@ -31,6 +31,7 @@ LIBABIVER := 1\n \n # library source files\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr_capabilities.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr_hw.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr_uio.c\n # library dependencies\ndiff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c\nindex aec033649..96b18be12 100644\n--- a/drivers/crypto/caam_jr/caam_jr.c\n+++ b/drivers/crypto/caam_jr/caam_jr.c\n@@ -16,6 +16,7 @@\n #include <rte_malloc.h>\n #include <rte_hexdump.h>\n \n+#include <caam_jr_capabilities.h>\n #include <caam_jr_config.h>\n #include <caam_jr_hw_specific.h>\n #include <caam_jr_pvt.h>\n@@ -438,6 +439,7 @@ caam_jr_dev_infos_get(struct rte_cryptodev *dev,\n \tif (info != NULL) {\n \t\tinfo->max_nb_queue_pairs = internals->max_nb_queue_pairs;\n \t\tinfo->feature_flags = dev->feature_flags;\n+\t\tinfo->capabilities = caam_jr_get_cryptodev_capabilities();\n \t\tinfo->sym.max_nb_sessions = internals->max_nb_sessions;\n \t\tinfo->driver_id = cryptodev_driver_id;\n \t}\ndiff --git a/drivers/crypto/caam_jr/caam_jr_capabilities.c b/drivers/crypto/caam_jr/caam_jr_capabilities.c\nnew file mode 100644\nindex 000000000..92aa429cc\n--- /dev/null\n+++ b/drivers/crypto/caam_jr/caam_jr_capabilities.c\n@@ -0,0 +1,232 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2017-2018 NXP\n+ */\n+\n+#include <caam_jr_capabilities.h>\n+\n+static const struct rte_cryptodev_capabilities caam_jr_capabilities[] = {\n+\t{\t/* MD5 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA1 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 20,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA224 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 28,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA256 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA384 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 128,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 48,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA512 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 128,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES GCM */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n+\t\t\t{.aead = {\n+\t\t\t\t.algo = RTE_CRYPTO_AEAD_AES_GCM,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 240,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CBC,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CTR */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CTR,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* 3DES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_3DES_CBC,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 24,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+const struct rte_cryptodev_capabilities *\n+caam_jr_get_cryptodev_capabilities(void)\n+{\n+\treturn caam_jr_capabilities;\n+}\ndiff --git a/drivers/crypto/caam_jr/caam_jr_capabilities.h b/drivers/crypto/caam_jr/caam_jr_capabilities.h\nnew file mode 100644\nindex 000000000..7a94013e5\n--- /dev/null\n+++ b/drivers/crypto/caam_jr/caam_jr_capabilities.h\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2017-2018 NXP\n+ */\n+\n+#ifndef CAAM_JR_CAPABILITIES_H\n+#define CAAM_JR_CAPABILITIES_H\n+\n+#include <rte_cryptodev.h>\n+\n+/* Get cryptodev capabilities */\n+const struct rte_cryptodev_capabilities *\n+caam_jr_get_cryptodev_capabilities(void);\n+#endif\ndiff --git a/drivers/crypto/caam_jr/meson.build b/drivers/crypto/caam_jr/meson.build\nindex 7b024e886..99b71aef1 100644\n--- a/drivers/crypto/caam_jr/meson.build\n+++ b/drivers/crypto/caam_jr/meson.build\n@@ -6,7 +6,10 @@ if host_machine.system() != 'linux'\n endif\n \n deps += ['bus_vdev', 'bus_dpaa', 'security']\n-sources = files('caam_jr_hw.c', 'caam_jr_uio.c', 'caam_jr.c')\n+sources = files('caam_jr_capabilities.c',\n+\t\t'caam_jr_hw.c',\n+\t\t'caam_jr_uio.c',\n+\t\t'caam_jr.c')\n \n allow_experimental_apis = true\n \n", "prefixes": [ "v4", "09/15" ] }