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GET /api/patches/45565/?format=api
{ "id": 45565, "url": "https://patches.dpdk.org/api/patches/45565/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180928074601.4287-2-g.singh@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180928074601.4287-2-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180928074601.4287-2-g.singh@nxp.com", "date": "2018-09-28T07:45:58", "name": "[v4,1/4] net/enetc: add ENETC PMD with basic operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d89ef661f7c5d098186d2f61fc8e008b727f4955", "submitter": { "id": 1068, "url": "https://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180928074601.4287-2-g.singh@nxp.com/mbox/", "series": [ { "id": 1566, "url": "https://patches.dpdk.org/api/series/1566/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1566", "date": "2018-09-28T07:45:57", "name": "introduces the enetc PMD driver", "version": 4, "mbox": "https://patches.dpdk.org/series/1566/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/45565/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/45565/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E74EB1B13B;\n\tFri, 28 Sep 2018 09:46:43 +0200 (CEST)", "from EUR01-HE1-obe.outbound.protection.outlook.com\n\t(mail-he1eur01on0085.outbound.protection.outlook.com [104.47.0.85])\n\tby dpdk.org (Postfix) with ESMTP id 171191B156\n\tfor <dev@dpdk.org>; Fri, 28 Sep 2018 09:46:37 +0200 (CEST)", "from Tophie.ap.freescale.net (14.142.187.166) by\n\tDB5PR04MB1528.eurprd04.prod.outlook.com (2a01:111:e400:5993::22) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1185.20;\n\tFri, 28 Sep 2018 07:46:33 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=WYveykStk5Gr/cUwsfc+/yVODVpRXFwsUe6+iU5eYj0=;\n\tb=pueoaPcvKV9nVrHU2zUO3/cd6dHKw9CGIxTkgf/9CPD+Swzh0Ay2rVeXgzmGTRA1N4I3UC87AW2Ohs0ihftlDkyZFaeFobT2tHuEVKxDLBQcm3zqLZdYYcJBfLDu+srTlqtl1hlpmMA3CeoN4VHHe9W1wn+0xYl+gsW2JbiW10w=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=G.Singh@nxp.com; ", "From": "Gagandeep Singh <g.singh@nxp.com>", "To": "dev@dpdk.org,\n\tferruh.yigit@intel.com", "Cc": "pankaj.chauhan@nxp.com,\n\tGagandeep Singh <g.singh@nxp.com>", "Date": "Fri, 28 Sep 2018 13:15:58 +0530", "Message-Id": "<20180928074601.4287-2-g.singh@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20180928074601.4287-1-g.singh@nxp.com>", "References": "<20180928051647.32341-1-g.singh@nxp.com>\n\t<20180928074601.4287-1-g.singh@nxp.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[14.142.187.166]", "X-ClientProxiedBy": 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"Bl01YYuQa7EiyvDRQkfaHYBksJz5kAcbLtK67Y6xa5iMVGsDM27+6YiQBhtkJsUW+yj1syKu2sF9QUdOmC/llTnnjjY1yHUmkM1VbF0yU6Owh8o3+8GmjxIpe9nKstO6qBT6R30ukE4jigzmHLqdwHVAuDyBuELwk+keHbhWTH5QMWVhpuGsRwazFSrDYo2NOPOl6C8pRsbez82pCjwFyCW17Ef+Gfn1KAMab+e751tPnTrSe7kk67vf5g6acKFmDFacmc1fj3Bj7B/wnlC7d9ya2j5F1u+JYJ1HOaBEPA785RHuMBgw/tdnzP+wreuX5unndwTOy3U+vlROx7Xd9e7Q36tW9uYXESHior7AcdQ=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "28 Sep 2018 07:46:33.8118\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "ab652fe6-3c8a-4021-728d-08d6251683bc", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DB5PR04MB1528", "Subject": "[dpdk-dev] [PATCH v4 1/4] net/enetc: add ENETC PMD with basic\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch introduces the enetc PMD with basic\ninitialisation functions includes probe, teardown,\nhardware initialisation\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\n---\n config/common_base | 5 +\n config/common_linuxapp | 5 +\n drivers/net/Makefile | 1 +\n drivers/net/enetc/Makefile | 22 ++\n drivers/net/enetc/base/enetc_hw.h | 217 +++++++++++++++++\n drivers/net/enetc/enetc.h | 90 +++++++\n drivers/net/enetc/enetc_ethdev.c | 251 ++++++++++++++++++++\n drivers/net/enetc/enetc_logs.h | 40 ++++\n drivers/net/enetc/meson.build | 10 +\n drivers/net/enetc/rte_pmd_enetc_version.map | 4 +\n drivers/net/meson.build | 1 +\n mk/rte.app.mk | 1 +\n 12 files changed, 647 insertions(+)\n create mode 100644 drivers/net/enetc/Makefile\n create mode 100644 drivers/net/enetc/base/enetc_hw.h\n create mode 100644 drivers/net/enetc/enetc.h\n create mode 100644 drivers/net/enetc/enetc_ethdev.c\n create mode 100644 drivers/net/enetc/enetc_logs.h\n create mode 100644 drivers/net/enetc/meson.build\n create mode 100644 drivers/net/enetc/rte_pmd_enetc_version.map", "diff": "diff --git a/config/common_base b/config/common_base\nindex 4bcbaf923..a7fc48667 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -217,6 +217,11 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y\n CONFIG_RTE_LIBRTE_DPAA2_PMD=n\n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n\n \n+#\n+# Compile NXP ENETC PMD Driver\n+#\n+CONFIG_RTE_LIBRTE_ENETC_PMD=n\n+\n #\n # Compile burst-oriented Amazon ENA PMD driver\n #\ndiff --git a/config/common_linuxapp b/config/common_linuxapp\nindex 9c5ea9d89..485e1467d 100644\n--- a/config/common_linuxapp\n+++ b/config/common_linuxapp\n@@ -44,3 +44,8 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y\n CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y\n CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=y\n CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=y\n+\n+#\n+# NXP ENETC PMD Driver\n+#\n+CONFIG_RTE_LIBRTE_ENETC_PMD=y\ndiff --git a/drivers/net/Makefile b/drivers/net/Makefile\nindex 664398de9..3ad436045 100644\n--- a/drivers/net/Makefile\n+++ b/drivers/net/Makefile\n@@ -24,6 +24,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2\n endif\n DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000\n DIRS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += ena\n+DIRS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc\n DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe\n DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k\ndiff --git a/drivers/net/enetc/Makefile b/drivers/net/enetc/Makefile\nnew file mode 100644\nindex 000000000..519153868\n--- /dev/null\n+++ b/drivers/net/enetc/Makefile\n@@ -0,0 +1,22 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright 2018 NXP\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_enetc.a\n+\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS)\n+EXPORT_MAP := rte_pmd_enetc_version.map\n+LIBABIVER := 1\n+\n+SRCS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += enetc_ethdev.c\n+\n+LDLIBS += -lrte_eal\n+LDLIBS += -lrte_ethdev\n+LDLIBS += -lrte_bus_pci\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/enetc/base/enetc_hw.h b/drivers/net/enetc/base/enetc_hw.h\nnew file mode 100644\nindex 000000000..c962b9ca1\n--- /dev/null\n+++ b/drivers/net/enetc/base/enetc_hw.h\n@@ -0,0 +1,217 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 NXP\n+ */\n+\n+#ifndef _ENETC_HW_H_\n+#define _ENETC_HW_H_\n+#include <rte_io.h>\n+\n+#define BIT(x)\t\t((uint64_t)1 << ((x)))\n+\n+/* ENETC device IDs */\n+#define ENETC_DEV_ID_VF\t\t0xef00\n+#define ENETC_DEV_ID\t\t0xe100\n+\n+/* ENETC register block BAR */\n+#define ENETC_BAR_REGS\t\t\t0x0\n+\n+/* SI regs, offset: 0h */\n+#define ENETC_SIMR\t\t\t0x0\n+#define ENETC_SIMR_EN\t\t\tBIT(31)\n+\n+#define ENETC_SIPMAR0\t\t\t0x80\n+#define ENETC_SIPMAR1\t\t\t0x84\n+\n+#define ENETC_SICAPR0\t\t\t0x900\n+#define ENETC_SICAPR1\t\t\t0x904\n+\n+#define ENETC_SIMSITRV(n)\t\t(0xB00 + (n) * 0x4)\n+#define ENETC_SIMSIRRV(n)\t\t(0xB80 + (n) * 0x4)\n+\n+#define ENETC_SICCAPR\t\t\t0x1200\n+\n+/* enum for BD type */\n+enum enetc_bdr_type {TX, RX};\n+\n+#define ENETC_BDR(type, n, off)\t\t(0x8000 + (type) * 0x100 + (n) * 0x200 \\\n+\t\t\t\t\t\t\t+ (off))\n+/* RX BDR reg offsets */\n+#define ENETC_RBMR\t\t0x0 /* RX BDR mode register*/\n+#define ENETC_RBMR_EN\t\tBIT(31)\n+\n+#define ENETC_RBSR\t\t0x4 /* Rx BDR status register*/\n+#define ENETC_RBBSR\t\t0x8 /* Rx BDR buffer size register*/\n+#define ENETC_RBCIR\t\t0xc /* Rx BDR consumer index register*/\n+#define ENETC_RBBAR0\t\t0x10 /* Rx BDR base address register 0 */\n+#define ENETC_RBBAR1\t\t0x14 /* Rx BDR base address register 1*/\n+#define ENETC_RBPIR\t\t0x18 /* Rx BDR producer index register*/\n+#define ENETC_RBLENR\t\t0x20 /* Rx BDR length register*/\n+#define ENETC_RBIER\t\t0xa0 /* Rx BDR interrupt enable register*/\n+#define ENETC_RBIER_RXTIE\tBIT(0)\n+#define ENETC_RBIDR\t\t0xa4 /* Rx BDR interrupt detect register*/\n+#define ENETC_RBICIR0\t\t0xa8 /* Rx BDR inetrrupt coalescing register 0*/\n+#define ENETC_RBICIR0_ICEN\tBIT(31)\n+\n+\n+#define ENETC_TBMR\t0x0 /* Tx BDR mode register (TBMR) 32 RW */\n+#define ENETC_TBSR\t0x4 /* x BDR status register (TBSR) 32 RO */\n+#define ENETC_TBBAR0\t0x10 /* Tx BDR base address register 0 (TBBAR0) 32 RW */\n+#define ENETC_TBBAR1\t0x14 /* Tx BDR base address register 1 (TBBAR1) 32 RW */\n+#define ENETC_TBCIR\t0x18 /* Tx BDR consumer index register (TBCIR) 32 RW */\n+#define ENETC_TBCISR\t0x1C /* Tx BDR consumer index shadow register 32 RW */\n+#define ENETC_TBIER\t0xA0 /* Tx BDR interrupt enable register 32 RW */\n+#define ENETC_TBIDR\t0xA4 /* Tx BDR interrupt detect register 32 RO */\n+#define ENETC_TBICR0\t0xA8 /* Tx BDR interrupt coalescing register 0 32 RW */\n+#define ENETC_TBICR1\t0xAC /* Tx BDR interrupt coalescing register 1 32 RW */\n+#define ENETC_TBLENR\t0x20\n+\n+#define ENETC_TBCISR_IDX_MASK\t\t0xffff\n+#define ENETC_TBIER_TXFIE\t\tBIT(1)\n+\n+#define ENETC_RTBLENR_LEN(n)\t\t((n) & ~0x7)\n+#define ENETC_TBMR_EN\t\t\tBIT(31)\n+\n+/* Port regs, offset: 1_0000h */\n+#define ENETC_PORT_BASE\t\t\t0x10000\n+#define ENETC_PMR\t\t\t0x00000\n+#define ENETC_PMR_EN\t\t\t(BIT(16) | BIT(17) | BIT(18))\n+#define ENETC_PSR\t\t\t0x00004 /* RO */\n+#define ENETC_PSIPMR\t\t\t0x00018\n+#define ENETC_PSIPMR_SET_UP(n)\t\t(0x1 << (n)) /* n = SI index */\n+#define ENETC_PSIPMR_SET_MP(n)\t\t(0x1 << ((n) + 8))\n+#define ENETC_PSIPMR_SET_VLAN_MP(n)\t(0x1 << ((n) + 16))\n+#define ENETC_PSIPMAR0(n)\t\t(0x00100 + (n) * 0x20)\n+#define ENETC_PSIPMAR1(n)\t\t(0x00104 + (n) * 0x20)\n+#define ENETC_PCAPR0\t\t\t0x00900\n+#define ENETC_PCAPR1\t\t\t0x00904\n+\n+#define ENETC_PV0CFGR(n)\t\t(0x00920 + (n) * 0x10)\n+#define ENETC_PVCFGR_SET_TXBDR(val)\t((val) & 0xff)\n+#define ENETC_PVCFGR_SET_RXBDR(val)\t(((val) & 0xff) << 16)\n+\n+#define ENETC_PM0_CMD_CFG\t\t0x08008\n+#define ENETC_PM0_TX_EN\t\t\tBIT(0)\n+#define ENETC_PM0_RX_EN\t\t\tBIT(1)\n+\n+#define ENETC_PM0_MAXFRM\t\t0x08014\n+#define ENETC_SET_MAXFRM(val)\t\t((val) << 16)\n+\n+/* Global regs, offset: 2_0000h */\n+#define ENETC_GLOBAL_BASE\t\t0x20000\n+#define ENETC_G_EIPBRR0\t\t\t0x00bf8\n+#define ENETC_G_EIPBRR1\t\t\t0x00bfc\n+\n+#define ETH_ADDR_LEN\t\t\t6\n+\n+/* general register accessors */\n+#define enetc_rd_reg(reg)\trte_read32((reg))\n+#define enetc_wr_reg(reg, val)\trte_write32((val), (reg))\n+#define enetc_rd(hw, off)\tenetc_rd_reg((hw)->reg + (off))\n+#define enetc_wr(hw, off, val)\tenetc_wr_reg((hw)->reg + (off), val)\n+/* port register accessors - PF only */\n+#define enetc_port_rd(hw, off)\t\tenetc_rd_reg((hw)->port + (off))\n+#define enetc_port_wr(hw, off, val)\tenetc_wr_reg((hw)->port + (off), val)\n+/* global register accessors - PF only */\n+#define enetc_global_rd(hw, off)\tenetc_rd_reg((hw)->global + (off))\n+#define enetc_global_wr(hw, off, val)\tenetc_wr_reg((hw)->global + (off), val)\n+/* BDR register accessors, see ENETC_BDR() */\n+#define enetc_bdr_rd(hw, t, n, off) \\\n+\t\t\t\tenetc_rd(hw, ENETC_BDR(t, n, off))\n+#define enetc_bdr_wr(hw, t, n, off, val) \\\n+\t\t\t\tenetc_wr(hw, ENETC_BDR(t, n, off), val)\n+\n+#define enetc_txbdr_rd(hw, n, off) enetc_bdr_rd(hw, TX, n, off)\n+#define enetc_rxbdr_rd(hw, n, off) enetc_bdr_rd(hw, RX, n, off)\n+#define enetc_txbdr_wr(hw, n, off, val) \\\n+\t\t\t\tenetc_bdr_wr(hw, TX, n, off, val)\n+#define enetc_rxbdr_wr(hw, n, off, val) \\\n+\t\t\t\tenetc_bdr_wr(hw, RX, n, off, val)\n+\n+#define ENETC_TX_ADDR(txq, addr) ((void *)((txq)->enetc_txbdr + (addr)))\n+\n+#define ENETC_TXBD_FLAGS_IE\t\tBIT(13)\n+#define ENETC_TXBD_FLAGS_F\t\tBIT(15)\n+\n+/* ENETC Parsed values (Little Endian) */\n+#define ENETC_PKT_TYPE_ETHER 0x0060\n+#define ENETC_PKT_TYPE_IPV4 0x0000\n+#define ENETC_PKT_TYPE_IPV6 0x0020\n+#define ENETC_PKT_TYPE_IPV4_TCP \\\n+\t\t\t(0x0010 | ENETC_PKT_TYPE_IPV4)\n+#define ENETC_PKT_TYPE_IPV6_TCP \\\n+\t\t\t(0x0010 | ENETC_PKT_TYPE_IPV6)\n+#define ENETC_PKT_TYPE_IPV4_UDP \\\n+\t\t\t(0x0011 | ENETC_PKT_TYPE_IPV4)\n+#define ENETC_PKT_TYPE_IPV6_UDP \\\n+\t\t\t(0x0011 | ENETC_PKT_TYPE_IPV6)\n+#define ENETC_PKT_TYPE_IPV4_SCTP \\\n+\t\t\t(0x0013 | ENETC_PKT_TYPE_IPV4)\n+#define ENETC_PKT_TYPE_IPV6_SCTP \\\n+\t\t\t(0x0013 | ENETC_PKT_TYPE_IPV6)\n+#define ENETC_PKT_TYPE_IPV4_ICMP \\\n+\t\t\t(0x0003 | ENETC_PKT_TYPE_IPV4)\n+#define ENETC_PKT_TYPE_IPV6_ICMP \\\n+\t\t\t(0x0003 | ENETC_PKT_TYPE_IPV6)\n+\n+/* PCI device info */\n+struct enetc_hw {\n+\tvoid *reg;\t/* SI registers, used by all PCI functions */\n+\tvoid *port;\t/* Port registers, PF only */\n+\tvoid *global;\t/* IP global registers, PF only */\n+};\n+\n+struct enetc_eth_mac_info {\n+\tuint8_t addr[ETH_ADDR_LEN];\n+\tuint8_t perm_addr[ETH_ADDR_LEN];\n+\tuint8_t get_link_status;\n+};\n+\n+struct enetc_eth_hw {\n+\tstruct rte_eth_dev *ndev;\n+\tstruct enetc_hw hw;\n+\tuint16_t device_id;\n+\tuint16_t vendor_id;\n+\tuint8_t revision_id;\n+\tstruct enetc_eth_mac_info mac;\n+};\n+\n+/* Transmit Descriptor */\n+struct enetc_tx_desc {\n+\tuint64_t addr;\n+\tuint16_t frm_len;\n+\tuint16_t buf_len;\n+\tuint32_t flags_errors;\n+};\n+\n+/* TX Buffer Descriptors (BD) */\n+struct enetc_tx_bd {\n+\tuint64_t addr;\n+\tuint16_t buf_len;\n+\tuint16_t frm_len;\n+\tuint16_t err_csum;\n+\tuint16_t flags;\n+};\n+\n+/* RX buffer descriptor */\n+union enetc_rx_bd {\n+\tstruct {\n+\t\tuint64_t addr;\n+\t\tuint8_t reserved[8];\n+\t} w;\n+\tstruct {\n+\t\tuint16_t inet_csum;\n+\t\tuint16_t parse_summary;\n+\t\tuint32_t rss_hash;\n+\t\tuint16_t buf_len;\n+\t\tuint16_t vlan_opt;\n+\t\tunion {\n+\t\t\tstruct {\n+\t\t\t\tuint16_t flags;\n+\t\t\t\tuint16_t error;\n+\t\t\t};\n+\t\t\tuint32_t lstatus;\n+\t\t};\n+\t} r;\n+};\n+\n+#endif\ndiff --git a/drivers/net/enetc/enetc.h b/drivers/net/enetc/enetc.h\nnew file mode 100644\nindex 000000000..9fa7c726c\n--- /dev/null\n+++ b/drivers/net/enetc/enetc.h\n@@ -0,0 +1,90 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 NXP\n+ */\n+\n+#ifndef _ENETC_H_\n+#define _ENETC_H_\n+\n+#include <rte_time.h>\n+\n+#include \"base/enetc_hw.h\"\n+\n+#define PCI_VENDOR_ID_FREESCALE 0x1957\n+\n+/* Max TX rings per ENETC. */\n+#define MAX_TX_RINGS\t2\n+\n+/* Max RX rings per ENTEC. */\n+#define MAX_RX_RINGS\t1\n+\n+/* Max BD counts per Ring. */\n+#define MAX_BD_COUNT\t256\n+\n+/*\n+ * upper_32_bits - return bits 32-63 of a number\n+ * @n: the number we're accessing\n+ *\n+ * A basic shift-right of a 64- or 32-bit quantity. Use this to suppress\n+ * the \"right shift count >= width of type\" warning when that quantity is\n+ * 32-bits.\n+ */\n+#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))\n+\n+/*\n+ * lower_32_bits - return bits 0-31 of a number\n+ * @n: the number we're accessing\n+ */\n+#define lower_32_bits(n) ((uint32_t)(n))\n+\n+#define ENETC_TXBD(BDR, i) (&(((struct enetc_tx_bd *)((BDR).bd_base))[i]))\n+#define ENETC_RXBD(BDR, i) (&(((union enetc_rx_bd *)((BDR).bd_base))[i]))\n+\n+struct enetc_swbd {\n+\tstruct rte_mbuf *buffer_addr;\n+};\n+\n+struct enetc_bdr {\n+\tstruct rte_eth_dev *ndev;\n+\tstruct rte_mempool *mb_pool; /* mbuf pool to populate RX ring. */\n+\tvoid *bd_base;\t\t\t/* points to Rx or Tx BD ring */\n+\tunion {\n+\t\tvoid *tcir;\n+\t\tvoid *rcir;\n+\t};\n+\tuint16_t index;\n+\tint bd_count; /* # of BDs */\n+\tint next_to_use;\n+\tint next_to_clean;\n+\tstruct enetc_swbd *q_swbd;\n+\tunion {\n+\t\tvoid *tcisr; /* Tx */\n+\t\tint next_to_alloc; /* Rx */\n+\t};\n+};\n+\n+/*\n+ * Structure to store private data for each driver instance (for each port).\n+ */\n+struct enetc_eth_adapter {\n+\tstruct rte_eth_dev *ndev;\n+\tstruct enetc_eth_hw hw;\n+};\n+\n+#define ENETC_DEV_PRIVATE(adapter) \\\n+\t((struct enetc_eth_adapter *)adapter)\n+\n+#define ENETC_DEV_PRIVATE_TO_HW(adapter) \\\n+\t(&((struct enetc_eth_adapter *)adapter)->hw)\n+\n+#define ENETC_DEV_PRIVATE_TO_STATS(adapter) \\\n+\t(&((struct enetc_eth_adapter *)adapter)->stats)\n+\n+#define ENETC_DEV_PRIVATE_TO_INTR(adapter) \\\n+\t(&((struct enetc_eth_adapter *)adapter)->intr)\n+\n+#define ENETC_GET_HW_ADDR(reg, addr) ((void *)(((size_t)reg) + (addr)))\n+#define ENETC_REG_READ(addr) (*(uint32_t *)addr)\n+#define ENETC_REG_WRITE(addr, val) (*(uint32_t *)addr = val)\n+#define ENETC_REG_WRITE_RELAXED(addr, val) (*(uint32_t *)addr = val)\n+\n+#endif /* _ENETC_H_ */\ndiff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c\nnew file mode 100644\nindex 000000000..47e2a8ebf\n--- /dev/null\n+++ b/drivers/net/enetc/enetc_ethdev.c\n@@ -0,0 +1,251 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 NXP\n+ */\n+\n+#include <stdbool.h>\n+#include <rte_ethdev_pci.h>\n+\n+#include \"enetc_logs.h\"\n+#include \"enetc.h\"\n+\n+int enetc_logtype_pmd;\n+\n+/* Functions Prototypes */\n+static int enetc_dev_configure(struct rte_eth_dev *dev);\n+static int enetc_dev_start(struct rte_eth_dev *dev);\n+static void enetc_dev_stop(struct rte_eth_dev *dev);\n+static void enetc_dev_close(struct rte_eth_dev *dev);\n+static void enetc_dev_infos_get(struct rte_eth_dev *dev,\n+\t\t\t\tstruct rte_eth_dev_info *dev_info);\n+static int enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete);\n+static int enetc_hardware_init(struct enetc_eth_hw *hw);\n+\n+/*\n+ * The set of PCI devices this driver supports\n+ */\n+static const struct rte_pci_id pci_id_enetc_map[] = {\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },\n+\t{ RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n+};\n+\n+/* Features supported by this driver */\n+static const struct eth_dev_ops enetc_ops = {\n+\t.dev_configure = enetc_dev_configure,\n+\t.dev_start = enetc_dev_start,\n+\t.dev_stop = enetc_dev_stop,\n+\t.dev_close = enetc_dev_close,\n+\t.link_update = enetc_link_update,\n+\t.dev_infos_get = enetc_dev_infos_get,\n+};\n+\n+/**\n+ * Initialisation of the enetc device\n+ *\n+ * @param eth_dev\n+ * - Pointer to the structure rte_eth_dev\n+ *\n+ * @return\n+ * - On success, zero.\n+ * - On failure, negative value.\n+ */\n+static int\n+enetc_dev_init(struct rte_eth_dev *eth_dev)\n+{\n+\tint error = 0;\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n+\tstruct enetc_eth_hw *hw =\n+\t\tENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\teth_dev->dev_ops = &enetc_ops;\n+\teth_dev->rx_pkt_burst = NULL;\n+\teth_dev->tx_pkt_burst = NULL;\n+\n+\t/* Retrieving and storing the HW base address of device */\n+\thw->hw.reg = (void *)pci_dev->mem_resource[0].addr;\n+\thw->device_id = pci_dev->id.device_id;\n+\n+\terror = enetc_hardware_init(hw);\n+\tif (error != 0) {\n+\t\tENETC_PMD_ERR(\"Hardware initialization failed\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Allocate memory for storing MAC addresses */\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"enetc_eth\", ETHER_ADDR_LEN, 0);\n+\tif (!eth_dev->data->mac_addrs) {\n+\t\tENETC_PMD_ERR(\"Failed to allocate %d bytes needed to \"\n+\t\t\t \"store MAC addresses\",\n+\t\t\t ETHER_ADDR_LEN * 1);\n+\t\terror = -ENOMEM;\n+\t\treturn -1;\n+\t}\n+\n+\t/* Copy the permanent MAC address */\n+\tether_addr_copy((struct ether_addr *)hw->mac.addr,\n+\t\t\tð_dev->data->mac_addrs[0]);\n+\n+\tENETC_PMD_DEBUG(\"port_id %d vendorID=0x%x deviceID=0x%x\",\n+\t\t\teth_dev->data->port_id, pci_dev->id.vendor_id,\n+\t\t\tpci_dev->id.device_id);\n+\treturn 0;\n+}\n+\n+static int\n+enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn 0;\n+}\n+\n+static int\n+enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn 0;\n+}\n+\n+static int\n+enetc_dev_start(struct rte_eth_dev *dev)\n+{\n+\tstruct enetc_eth_hw *hw =\n+\t\tENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t val;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\tval = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,\n+\t\t\t ENETC_PM0_CMD_CFG));\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),\n+\t\t\tval | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);\n+\n+\t/* Enable port */\n+\tval = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),\n+\t\t\tval | ENETC_PMR_EN);\n+\n+\treturn 0;\n+}\n+\n+static void\n+enetc_dev_stop(struct rte_eth_dev *dev)\n+{\n+\tstruct enetc_eth_hw *hw =\n+\t\tENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t val;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\t/* Disable port */\n+\tval = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),\n+\t\t\tval & (~ENETC_PMR_EN));\n+\n+\tval = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,\n+\t\t\t ENETC_PM0_CMD_CFG));\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),\n+\t\t\tval & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));\n+}\n+\n+static void\n+enetc_dev_close(struct rte_eth_dev *dev __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+}\n+\n+/* return 0 means link status changed, -1 means not changed */\n+static int\n+enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)\n+{\n+\tstruct enetc_eth_hw *hw =\n+\t\tENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_eth_link link;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\thw->mac.get_link_status = 1;\n+\n+\tmemset(&link, 0, sizeof(link));\n+\trte_eth_linkstatus_get(dev, &link);\n+\n+\tlink.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tlink.link_status = ETH_LINK_UP;\n+\trte_eth_linkstatus_set(dev, &link);\n+\n+\treturn 0;\n+}\n+\n+static int\n+enetc_hardware_init(struct enetc_eth_hw *hw)\n+{\n+\tuint32_t psipmr = 0;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\t/* Calculating and storing the base HW addresses */\n+\thw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);\n+\thw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);\n+\n+\t/* Enabling Station Interface */\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.reg, ENETC_SIMR),\n+\t\t\t\t\t ENETC_SIMR_EN);\n+\n+\t/* Setting to accept broadcast packets for each inetrface */\n+\tpsipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) |\n+\t\t ENETC_PSIPMR_SET_VLAN_MP(0);\n+\tpsipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) |\n+\t\t ENETC_PSIPMR_SET_VLAN_MP(1);\n+\tpsipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) |\n+\t\t ENETC_PSIPMR_SET_VLAN_MP(2);\n+\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMR),\n+\t\t\tpsipmr);\n+\n+\t/* Enabling broadcast address */\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR0(0)),\n+\t\t\t0xFFFFFFFF);\n+\tENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR1(0)),\n+\t\t\t0xFFFF << 16);\n+\n+\treturn 0;\n+}\n+\n+static void\n+enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,\n+\t\t struct rte_eth_dev_info *dev_info)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tdev_info->max_rx_queues = MAX_RX_RINGS;\n+\tdev_info->max_tx_queues = MAX_TX_RINGS;\n+\tdev_info->max_rx_pktlen = 1500;\n+}\n+\n+static int\n+enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\t\t struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_eth_dev_pci_generic_probe(pci_dev,\n+\t\t\t\t\t sizeof(struct enetc_eth_adapter),\n+\t\t\t\t\t enetc_dev_init);\n+}\n+\n+static int\n+enetc_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);\n+}\n+\n+static struct rte_pci_driver rte_enetc_pmd = {\n+\t.id_table = pci_id_enetc_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,\n+\t.probe = enetc_pci_probe,\n+\t.remove = enetc_pci_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);\n+RTE_PMD_REGISTER_KMOD_DEP(net_enetc, \"* vfio-pci\");\n+\n+RTE_INIT(enetc_pmd_init_log)\n+{\n+\tenetc_logtype_pmd = rte_log_register(\"pmd.net.enetc\");\n+\tif (enetc_logtype_pmd >= 0)\n+\t\trte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);\n+}\ndiff --git a/drivers/net/enetc/enetc_logs.h b/drivers/net/enetc/enetc_logs.h\nnew file mode 100644\nindex 000000000..c8a6c0cf3\n--- /dev/null\n+++ b/drivers/net/enetc/enetc_logs.h\n@@ -0,0 +1,40 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 NXP\n+ */\n+\n+#ifndef _ENETC_LOGS_H_\n+#define _ENETC_LOGS_H_\n+\n+extern int enetc_logtype_pmd;\n+\n+#define ENETC_PMD_LOG(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, enetc_logtype_pmd, \"enetc_net: \" \\\n+\t\tfmt \"\\n\", ##args)\n+\n+#define ENETC_PMD_DEBUG(fmt, args...) \\\n+\trte_log(RTE_LOG_DEBUG, enetc_logtype_pmd, \"enetc_net: %s(): \"\\\n+\t\tfmt \"\\n\", __func__, ##args)\n+\n+#define PMD_INIT_FUNC_TRACE() ENETC_PMD_DEBUG(\">>\")\n+\n+#define ENETC_PMD_CRIT(fmt, args...) \\\n+\tENETC_PMD_LOG(CRIT, fmt, ## args)\n+#define ENETC_PMD_INFO(fmt, args...) \\\n+\tENETC_PMD_LOG(INFO, fmt, ## args)\n+#define ENETC_PMD_ERR(fmt, args...) \\\n+\tENETC_PMD_LOG(ERR, fmt, ## args)\n+#define ENETC_PMD_WARN(fmt, args...) \\\n+\tENETC_PMD_LOG(WARNING, fmt, ## args)\n+\n+/* DP Logs, toggled out at compile time if level lower than current level */\n+#define ENETC_PMD_DP_LOG(level, fmt, args...) \\\n+\tRTE_LOG_DP(level, PMD, fmt, ## args)\n+\n+#define ENETC_PMD_DP_DEBUG(fmt, args...) \\\n+\tENETC_PMD_DP_LOG(DEBUG, fmt, ## args)\n+#define ENETC_PMD_DP_INFO(fmt, args...) \\\n+\tENETC_PMD_DP_LOG(INFO, fmt, ## args)\n+#define ENETC_PMD_DP_WARN(fmt, args...) \\\n+\tENETC_PMD_DP_LOG(WARNING, fmt, ## args)\n+\n+#endif /* _ENETC_LOGS_H_*/\ndiff --git a/drivers/net/enetc/meson.build b/drivers/net/enetc/meson.build\nnew file mode 100644\nindex 000000000..506b174ed\n--- /dev/null\n+++ b/drivers/net/enetc/meson.build\n@@ -0,0 +1,10 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright 2018 NXP\n+\n+if host_machine.system() != 'linux'\n+\tbuild = false\n+endif\n+\n+sources = files('enetc_ethdev.c')\n+\n+includes += include_directories('base')\ndiff --git a/drivers/net/enetc/rte_pmd_enetc_version.map b/drivers/net/enetc/rte_pmd_enetc_version.map\nnew file mode 100644\nindex 000000000..521e51f41\n--- /dev/null\n+++ b/drivers/net/enetc/rte_pmd_enetc_version.map\n@@ -0,0 +1,4 @@\n+DPDK_18.11 {\n+\n+\tlocal: *;\n+};\ndiff --git a/drivers/net/meson.build b/drivers/net/meson.build\nindex 9c28ed4da..65aa6f60c 100644\n--- a/drivers/net/meson.build\n+++ b/drivers/net/meson.build\n@@ -11,6 +11,7 @@ drivers = ['af_packet',\n \t'dpaa', 'dpaa2',\n \t'e1000',\n \t'ena',\n+\t'enetc',\n \t'enic',\n \t'failsafe',\n \t'fm10k', 'i40e',\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex de33883be..154ae3b2c 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -135,6 +135,7 @@ endif\n _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000\n _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD) += -lrte_pmd_ena\n _LDLIBS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += -lrte_pmd_enic\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_ENETC_PMD) += -lrte_pmd_enetc\n _LDLIBS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += -lrte_pmd_fm10k\n _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += -lrte_pmd_failsafe\n _LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e\n", "prefixes": [ "v4", "1/4" ] }