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GET /api/patches/45301/?format=api
{ "id": 45301, "url": "https://patches.dpdk.org/api/patches/45301/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1537859109-25659-14-git-send-email-amo@semihalf.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1537859109-25659-14-git-send-email-amo@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1537859109-25659-14-git-send-email-amo@semihalf.com", "date": "2018-09-25T07:05:09", "name": "[v3,13/13] net/mvpp2: add Tx scatter/gather support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7b578fbbd29fc9e4985c11ef3c9f8fe3a3f9224a", "submitter": { "id": 1112, "url": "https://patches.dpdk.org/api/people/1112/?format=api", "name": "Andrzej Ostruszka", "email": "amo@semihalf.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1537859109-25659-14-git-send-email-amo@semihalf.com/mbox/", "series": [ { "id": 1482, "url": "https://patches.dpdk.org/api/series/1482/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1482", "date": "2018-09-25T07:04:56", "name": "net/mvpp2: add new features", "version": 3, "mbox": "https://patches.dpdk.org/series/1482/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/45301/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/45301/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 62C065B3C;\n\tTue, 25 Sep 2018 09:06:04 +0200 (CEST)", "from mail-lf1-f66.google.com (mail-lf1-f66.google.com\n\t[209.85.167.66]) by dpdk.org (Postfix) with ESMTP id 934605681\n\tfor <dev@dpdk.org>; Tue, 25 Sep 2018 09:05:27 +0200 (CEST)", "by mail-lf1-f66.google.com with SMTP id o21-v6so5153317lfe.0\n\tfor <dev@dpdk.org>; Tue, 25 Sep 2018 00:05:27 -0700 (PDT)", "from amok.semihalf.local (31-172-191-173.noc.fibertech.net.pl.\n\t[31.172.191.173]) by smtp.googlemail.com with ESMTPSA id\n\t24-v6sm238306ljb.76.2018.09.25.00.05.25\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 25 Sep 2018 00:05:25 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=semihalf-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=0jhQHLLX/u4qeMtnonKQ/8ZYROwaeYgQruG9U3IRIV0=;\n\tb=RVMt/iIqj1exZa8MC+R+0chredVo5HwDWCzK7JxU/F1EYXcb9iAA+jDR/rvCCbFzGD\n\t//Y0yfqhgXOd3AklNSK6i+354yCTkDWpNdJk3iiEQM84A09w/ocIrNdigpt0WErQCGtu\n\t9EynPs6iQKW/Hs0V0pVYzn9Uj2JkvRwImkc37chk18Ad5KjZeYO0duibwN3zkUhmToKl\n\tGkMM530nJui3xOnLJCG+u2KqV24VgoG0Ots2BQwFXDAMr51RgnV3QYDft+kxoMSeZ4H+\n\tZ2qSaPL8x9CU8wAI/+Kx1EsBEfYzqsVKyrHsJN79/bnArllJFtDE3CLGDInJtXxk14Mo\n\tt2TA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=0jhQHLLX/u4qeMtnonKQ/8ZYROwaeYgQruG9U3IRIV0=;\n\tb=C/rzgN+DgnyZOVp7lAdlArwBPmL3szKyk5ZA4nRUR/13hhCvW9ixDWUgmYoGlb/WrT\n\t2vjiThphpbKzyL988b1wB6LEQlk05aYo665+8s1IXl8Hqqd9BZ7eiEfzlToxkpmDmmf0\n\tEJsGjTmwocSSGCmE2HwsNw0H3JnpaqCy6WcI6Y1yXnmHU0xetTnfHuazht8VR76aUP20\n\tsLrhdVJgSkBT+2I9JOTLb8al07mMJrzVQwG9YXc/+o2nWq8C8dmXHu+qcxWnhNv7hbKV\n\turYCYHL3H1TC1Hnp/wWyqLBOl9UsXk2ml75JikyMAhNRQ5L6myENvKcGkAma4DKI8ujT\n\tEobQ==", "X-Gm-Message-State": "ABuFfoh8OgByxiAiqDNPj9asajfLcK1fUEJR7doarukrW8dpEVLyVbUP\n\tmtU0+X1+5z7eE6C/5F82nC8XWoq9OY9DDQ==", "X-Google-Smtp-Source": "ACcGV63zOwKv9Mj51K+z1z0YLFv+NNTRzL3dmFeDNyrAKmrugL4sM/yV3FPTiiadyGhU5nVkv6YDQA==", "X-Received": "by 2002:a19:1f83:: with SMTP id\n\tf125-v6mr1606658lff.40.1537859126792; \n\tTue, 25 Sep 2018 00:05:26 -0700 (PDT)", "From": "Andrzej Ostruszka <amo@semihalf.com>", "To": "dev@dpdk.org", "Cc": "mw@semihalf.com, nadavh@marvell.com, Zyta Szpak <zr@semihalf.com>,\n\tNatalie Samsonov <nsamsono@marvell.com>", "Date": "Tue, 25 Sep 2018 09:05:09 +0200", "Message-Id": "<1537859109-25659-14-git-send-email-amo@semihalf.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1537859109-25659-1-git-send-email-amo@semihalf.com>", "References": "<1536068953-9352-1-git-send-email-tdu@semihalf.com>\n\t<1537859109-25659-1-git-send-email-amo@semihalf.com>", "Subject": "[dpdk-dev] [PATCH v3 13/13] net/mvpp2: add Tx scatter/gather support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Zyta Szpak <zr@semihalf.com>\n\nThe patch introduces scatter/gather support on transmit path.\nA separate Tx callback is added and set if the application\nrequests multisegment Tx offload. Multiple descriptors are\nsent per one packet.\n\nSigned-off-by: Zyta Szpak <zr@semihalf.com>\nSigned-off-by: Natalie Samsonov <nsamsono@marvell.com>\nReviewed-by: Yelena Krivosheev <yelena@marvell.com>\n---\n drivers/net/mvpp2/mrvl_ethdev.c | 231 ++++++++++++++++++++++++++++++++++++----\n drivers/net/mvpp2/mrvl_ethdev.h | 1 +\n 2 files changed, 212 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex 26497ef..0682c63 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -64,7 +64,8 @@\n /** Port Tx offloads capabilities */\n #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \\\n \t\t\t DEV_TX_OFFLOAD_UDP_CKSUM | \\\n-\t\t\t DEV_TX_OFFLOAD_TCP_CKSUM)\n+\t\t\t DEV_TX_OFFLOAD_TCP_CKSUM | \\\n+\t\t\t DEV_TX_OFFLOAD_MULTI_SEGS)\n \n static const char * const valid_args[] = {\n \tMRVL_IFACE_NAME_ARG,\n@@ -104,7 +105,9 @@ struct mrvl_shadow_txq {\n \tint head; /* write index - used when sending buffers */\n \tint tail; /* read index - used when releasing buffers */\n \tu16 size; /* queue occupied size */\n-\tu16 num_to_release; /* number of buffers sent, that can be released */\n+\tu16 num_to_release; /* number of descriptors sent, that can be\n+\t\t\t * released\n+\t\t\t */\n \tstruct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */\n };\n \n@@ -136,6 +139,12 @@ static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,\n \t\t\tstruct pp2_hif *hif, unsigned int core_id,\n \t\t\tstruct mrvl_shadow_txq *sq, int qid, int force);\n \n+static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,\n+\t\t\t\t uint16_t nb_pkts);\n+static uint16_t mrvl_tx_sg_pkt_burst(void *txq,\tstruct rte_mbuf **tx_pkts,\n+\t\t\t\t uint16_t nb_pkts);\n+\n+\n #define MRVL_XSTATS_TBL_ENTRY(name) { \\\n \t#name, offsetof(struct pp2_ppio_statistics, name),\t\\\n \tsizeof(((struct pp2_ppio_statistics *)0)->name)\t\t\\\n@@ -162,6 +171,31 @@ static struct {\n \tMRVL_XSTATS_TBL_ENTRY(tx_errors)\n };\n \n+static inline void\n+mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)\n+{\n+\tsq->ent[sq->head].buff.cookie = (uint64_t)buf;\n+\tsq->ent[sq->head].buff.addr = buf ?\n+\t\trte_mbuf_data_iova_default(buf) : 0;\n+\n+\tsq->ent[sq->head].bpool =\n+\t\t(unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||\n+\t\t buf->refcnt > 1)) ? NULL :\n+\t\t mrvl_port_to_bpool_lookup[buf->port];\n+\n+\tsq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;\n+\tsq->size++;\n+}\n+\n+static inline void\n+mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)\n+{\n+\tpp2_ppio_outq_desc_reset(desc);\n+\tpp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));\n+\tpp2_ppio_outq_desc_set_pkt_offset(desc, 0);\n+\tpp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));\n+}\n+\n static inline int\n mrvl_get_bpool_size(int pp2_id, int pool_id)\n {\n@@ -241,6 +275,27 @@ mrvl_get_hif(struct mrvl_priv *priv, int core_id)\n }\n \n /**\n+ * Set tx burst function according to offload flag\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ */\n+static void\n+mrvl_set_tx_function(struct rte_eth_dev *dev)\n+{\n+\tstruct mrvl_priv *priv = dev->data->dev_private;\n+\n+\t/* Use a simple Tx queue (no offloads, no multi segs) if possible */\n+\tif (priv->multiseg) {\n+\t\tRTE_LOG(INFO, PMD, \"Using multi-segment tx callback\\n\");\n+\t\tdev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;\n+\t} else {\n+\t\tRTE_LOG(INFO, PMD, \"Using single-segment tx callback\\n\");\n+\t\tdev->tx_pkt_burst = mrvl_tx_pkt_burst;\n+\t}\n+}\n+\n+/**\n * Configure rss based on dpdk rss configuration.\n *\n * @param priv\n@@ -316,6 +371,9 @@ mrvl_dev_configure(struct rte_eth_dev *dev)\n \t\tdev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -\n \t\t\t\t MRVL_PP2_ETH_HDRS_LEN;\n \n+\tif (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)\n+\t\tpriv->multiseg = 1;\n+\n \tret = mrvl_configure_rxqs(priv, dev->data->port_id,\n \t\t\t\t dev->data->nb_rx_queues);\n \tif (ret < 0)\n@@ -663,6 +721,7 @@ mrvl_dev_start(struct rte_eth_dev *dev)\n \n \tmrvl_flow_init(dev);\n \tmrvl_mtr_init(dev);\n+\tmrvl_set_tx_function(dev);\n \n \treturn 0;\n out:\n@@ -2429,22 +2488,8 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\t\trte_mbuf_prefetch_part2(pref_pkt_hdr);\n \t\t}\n \n-\t\tsq->ent[sq->head].buff.cookie = (uint64_t)mbuf;\n-\t\tsq->ent[sq->head].buff.addr =\n-\t\t\trte_mbuf_data_iova_default(mbuf);\n-\t\tsq->ent[sq->head].bpool =\n-\t\t\t(unlikely(mbuf->port >= RTE_MAX_ETHPORTS ||\n-\t\t\t mbuf->refcnt > 1)) ? NULL :\n-\t\t\t mrvl_port_to_bpool_lookup[mbuf->port];\n-\t\tsq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;\n-\t\tsq->size++;\n-\n-\t\tpp2_ppio_outq_desc_reset(&descs[i]);\n-\t\tpp2_ppio_outq_desc_set_phys_addr(&descs[i],\n-\t\t\t\t\t\t rte_pktmbuf_iova(mbuf));\n-\t\tpp2_ppio_outq_desc_set_pkt_offset(&descs[i], 0);\n-\t\tpp2_ppio_outq_desc_set_pkt_len(&descs[i],\n-\t\t\t\t\t rte_pktmbuf_pkt_len(mbuf));\n+\t\tmrvl_fill_shadowq(sq, mbuf);\n+\t\tmrvl_fill_desc(&descs[i], mbuf);\n \n \t\tbytes_sent += rte_pktmbuf_pkt_len(mbuf);\n \t\t/*\n@@ -2482,6 +2527,152 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \treturn nb_pkts;\n }\n \n+/** DPDK callback for S/G transmit.\n+ *\n+ * @param txq\n+ * Generic pointer transmit queue.\n+ * @param tx_pkts\n+ * Packets to transmit.\n+ * @param nb_pkts\n+ * Number of packets in array.\n+ *\n+ * @return\n+ * Number of packets successfully transmitted.\n+ */\n+static uint16_t\n+mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,\n+\t\t uint16_t nb_pkts)\n+{\n+\tstruct mrvl_txq *q = txq;\n+\tstruct mrvl_shadow_txq *sq;\n+\tstruct pp2_hif *hif;\n+\tstruct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];\n+\tstruct pp2_ppio_sg_pkts pkts;\n+\tuint8_t frags[nb_pkts];\n+\tunsigned int core_id = rte_lcore_id();\n+\tint i, j, ret, bytes_sent = 0;\n+\tint tail, tail_first;\n+\tuint16_t num, sq_free_size;\n+\tuint16_t nb_segs, total_descs = 0;\n+\tuint64_t addr;\n+\n+\thif = mrvl_get_hif(q->priv, core_id);\n+\tsq = &q->shadow_txqs[core_id];\n+\tpkts.frags = frags;\n+\tpkts.num = 0;\n+\n+\tif (unlikely(!q->priv->ppio || !hif))\n+\t\treturn 0;\n+\n+\tif (sq->size)\n+\t\tmrvl_free_sent_buffers(q->priv->ppio, hif, core_id,\n+\t\t\t\t sq, q->queue_id, 0);\n+\n+\t/* Save shadow queue free size */\n+\tsq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;\n+\n+\ttail = 0;\n+\tfor (i = 0; i < nb_pkts; i++) {\n+\t\tstruct rte_mbuf *mbuf = tx_pkts[i];\n+\t\tstruct rte_mbuf *seg = NULL;\n+\t\tint gen_l3_cksum, gen_l4_cksum;\n+\t\tenum pp2_outq_l3_type l3_type;\n+\t\tenum pp2_outq_l4_type l4_type;\n+\n+\t\tnb_segs = mbuf->nb_segs;\n+\t\ttail_first = tail;\n+\t\ttotal_descs += nb_segs;\n+\n+\t\t/*\n+\t\t * Check if total_descs does not exceed\n+\t\t * shadow queue free size\n+\t\t */\n+\t\tif (unlikely(total_descs > sq_free_size)) {\n+\t\t\ttotal_descs -= nb_segs;\n+\t\t\tRTE_LOG(DEBUG, PMD,\n+\t\t\t\t\"No room in shadow queue for %d packets! \"\n+\t\t\t\t\"%d packets will be sent.\\n\",\n+\t\t\t\tnb_pkts, i);\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* Check if nb_segs does not exceed the max nb of desc per\n+\t\t * fragmented packet\n+\t\t */\n+\t\tif (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {\n+\t\t\ttotal_descs -= nb_segs;\n+\t\t\tRTE_LOG(ERR, PMD,\n+\t\t\t\t\"Too many segments. Packet won't be sent.\\n\");\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tif (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {\n+\t\t\tstruct rte_mbuf *pref_pkt_hdr;\n+\n+\t\t\tpref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];\n+\t\t\trte_mbuf_prefetch_part1(pref_pkt_hdr);\n+\t\t\trte_mbuf_prefetch_part2(pref_pkt_hdr);\n+\t\t}\n+\n+\t\tpkts.frags[pkts.num] = nb_segs;\n+\t\tpkts.num++;\n+\n+\t\tseg = mbuf;\n+\t\tfor (j = 0; j < nb_segs - 1; j++) {\n+\t\t\t/* For the subsequent segments, set shadow queue\n+\t\t\t * buffer to NULL\n+\t\t\t */\n+\t\t\tmrvl_fill_shadowq(sq, NULL);\n+\t\t\tmrvl_fill_desc(&descs[tail], seg);\n+\n+\t\t\ttail++;\n+\t\t\tseg = seg->next;\n+\t\t}\n+\t\t/* Put first mbuf info in last shadow queue entry */\n+\t\tmrvl_fill_shadowq(sq, mbuf);\n+\t\t/* Update descriptor with last segment */\n+\t\tmrvl_fill_desc(&descs[tail++], seg);\n+\n+\t\tbytes_sent += rte_pktmbuf_pkt_len(mbuf);\n+\t\t/* In case unsupported ol_flags were passed\n+\t\t * do not update descriptor offload information\n+\t\t */\n+\t\tret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,\n+\t\t\t\t\t &l3_type, &l4_type, &gen_l3_cksum,\n+\t\t\t\t\t &gen_l4_cksum);\n+\t\tif (unlikely(ret))\n+\t\t\tcontinue;\n+\n+\t\tpp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,\n+\t\t\t\t\t\t l4_type, mbuf->l2_len,\n+\t\t\t\t\t\t mbuf->l2_len + mbuf->l3_len,\n+\t\t\t\t\t\t gen_l3_cksum, gen_l4_cksum);\n+\t}\n+\n+\tnum = total_descs;\n+\tpp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,\n+\t\t\t &total_descs, &pkts);\n+\t/* number of packets that were not sent */\n+\tif (unlikely(num > total_descs)) {\n+\t\tfor (i = total_descs; i < num; i++) {\n+\t\t\tsq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &\n+\t\t\t\tMRVL_PP2_TX_SHADOWQ_MASK;\n+\n+\t\t\taddr = sq->ent[sq->head].buff.cookie;\n+\t\t\tif (addr)\n+\t\t\t\tbytes_sent -=\n+\t\t\t\t\trte_pktmbuf_pkt_len((struct rte_mbuf *)\n+\t\t\t\t\t\t(cookie_addr_high | addr));\n+\t\t}\n+\t\tsq->size -= num - total_descs;\n+\t\tnb_pkts = pkts.num;\n+\t}\n+\n+\tq->bytes_sent += bytes_sent;\n+\n+\treturn nb_pkts;\n+}\n+\n /**\n * Initialize packet processor.\n *\n@@ -2610,11 +2801,11 @@ mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)\n \tmemcpy(eth_dev->data->mac_addrs[0].addr_bytes,\n \t req.ifr_addr.sa_data, ETHER_ADDR_LEN);\n \n-\teth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;\n-\teth_dev->tx_pkt_burst = mrvl_tx_pkt_burst;\n \teth_dev->data->kdrv = RTE_KDRV_NONE;\n \teth_dev->data->dev_private = priv;\n \teth_dev->device = &vdev->device;\n+\teth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;\n+\tmrvl_set_tx_function(eth_dev);\n \teth_dev->dev_ops = &mrvl_ops;\n \n \trte_eth_dev_probing_finish(eth_dev);\ndiff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h\nindex f0ae983..0120b9e 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.h\n+++ b/drivers/net/mvpp2/mrvl_ethdev.h\n@@ -188,6 +188,7 @@ struct mrvl_priv {\n \tuint8_t uc_mc_flushed;\n \tuint8_t vlan_flushed;\n \tuint8_t isolated;\n+\tuint8_t multiseg;\n \n \tstruct pp2_ppio_params ppio_params;\n \tstruct pp2_cls_qos_tbl_params qos_tbl_params;\n", "prefixes": [ "v3", "13/13" ] }