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GET /api/patches/45211/?format=api
{ "id": 45211, "url": "https://patches.dpdk.org/api/patches/45211/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1537797030-26548-9-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1537797030-26548-9-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1537797030-26548-9-git-send-email-arybchenko@solarflare.com", "date": "2018-09-24T13:50:27", "name": "[08/11] net/sfc/base: guard Rx scale code with corresponding option", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "876a153a49fddf53caaa38902fc984a8c1bc4e14", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1537797030-26548-9-git-send-email-arybchenko@solarflare.com/mbox/", "series": [ { "id": 1467, "url": "https://patches.dpdk.org/api/series/1467/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1467", "date": "2018-09-24T13:50:22", "name": "net/sfc: update base driver to support 50G and 100G", "version": 1, "mbox": "https://patches.dpdk.org/series/1467/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/45211/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/45211/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 768B158F6;\n\tMon, 24 Sep 2018 15:51:12 +0200 (CEST)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 12D262BF4\n\tfor <dev@dpdk.org>; Mon, 24 Sep 2018 15:50:52 +0200 (CEST)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\tCA897B40087 for <dev@dpdk.org>; Mon, 24 Sep 2018 13:50:50 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1395.4; Mon, 24 Sep 2018 06:50:47 -0700", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1395.4 via Frontend Transport; Mon, 24 Sep 2018 06:50:47 -0700", "from ukv-loginhost.uk.solarflarecom.com\n\t(ukv-loginhost.uk.solarflarecom.com [10.17.10.39])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw8ODojsh014556; Mon, 24 Sep 2018 14:50:45 +0100", "from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1])\n\tby ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id\n\tD7E921626D1; Mon, 24 Sep 2018 14:50:45 +0100 (BST)" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Tom Millington <tmillington@solarflare.com>", "Date": "Mon, 24 Sep 2018 14:50:27 +0100", "Message-ID": "<1537797030-26548-9-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1537797030-26548-1-git-send-email-arybchenko@solarflare.com>", "References": "<1537797030-26548-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-Product-Ver": "SMEX-12.5.0.1300-8.5.1010-24114.005", "X-TM-AS-Result": "No-0.699600-4.000000-10", "X-TMASE-MatchedRID": "8hqU3tU3q+B8tzbYIxQT62ivjLE8DPtZ1JGHfxYWjYfMSJVVqDHzVhlm\n\t50zOyWbd0fzQGQC+A5215EbLBWcBdyY0eULsNBXlA9lly13c/gH6e9LB8NtoJdQzSBS2jTC48FS\n\trkmy6/FIWnw4IW0ouLrK0FbOnC9Zrab7iwIkpl7AtMfCdg6KRDXG54hbZ8q7I2dPiOwoLDVVqBb\n\tWChvoV/FgQa+1D8MG6JbqK7bFjWTtg5AA4n45LbZ4CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyHEqm\n\t8QYBtMOpzxnU4e0Wn2y9skB5eZI6RQmptPsEVNZlPiw1QvHnqhdu7XD0KGkCRk9KzKpFsnTFH2T\n\tgzlvD0tVAidBv2T7mDU89hPgULqYk3UkV5Qp4wSI45Rd9ORJwFlJvEhEss3fzQahrdQz77w=", "X-TM-AS-User-Approved-Sender": "No", "X-TM-AS-User-Blocked-Sender": "No", "X-TMASE-Result": "10--0.699600-4.000000", "X-TMASE-Version": "SMEX-12.5.0.1300-8.5.1010-24114.005", "X-MDID": "1537797051-1EIoG1AvJ-EB", "Subject": "[dpdk-dev] [PATCH 08/11] net/sfc/base: guard Rx scale code with\n\tcorresponding option", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Tom Millington <tmillington@solarflare.com>\n\nPreviously only some of the code was guarded by this which caused\na build error when EFSYS_OPT_RX_SCALE is 0 (e.g. in manftest).\n\nSigned-off-by: Tom Millington <tmillington@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_nic.c | 7 +++++++\n drivers/net/sfc/base/efx.h | 2 ++\n drivers/net/sfc/base/siena_nic.c | 2 ++\n 3 files changed, 11 insertions(+)", "diff": "diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c\nindex c197ff957..1b3d60682 100644\n--- a/drivers/net/sfc/base/ef10_nic.c\n+++ b/drivers/net/sfc/base/ef10_nic.c\n@@ -1086,11 +1086,13 @@ ef10_get_datapath_caps(\n \t}\n \tencp->enc_rx_prefix_size = 14;\n \n+#if EFSYS_OPT_RX_SCALE\n \t/* Check if the firmware supports additional RSS modes */\n \tif (CAP_FLAGS1(req, ADDITIONAL_RSS_MODES))\n \t\tencp->enc_rx_scale_additional_modes_supported = B_TRUE;\n \telse\n \t\tencp->enc_rx_scale_additional_modes_supported = B_FALSE;\n+#endif /* EFSYS_OPT_RX_SCALE */\n \n \t/* Check if the firmware supports TSO */\n \tif (CAP_FLAGS1(req, TX_TSO))\n@@ -1296,6 +1298,7 @@ ef10_get_datapath_caps(\n \telse\n \t\tencp->enc_hlb_counters = B_FALSE;\n \n+#if EFSYS_OPT_RX_SCALE\n \tif (CAP_FLAGS1(req, RX_RSS_LIMITED)) {\n \t\t/* Only one exclusive RSS context is available per port. */\n \t\tencp->enc_rx_scale_max_exclusive_contexts = 1;\n@@ -1345,6 +1348,8 @@ ef10_get_datapath_caps(\n \t\t */\n \t\tencp->enc_rx_scale_l4_hash_supported = B_TRUE;\n \t}\n+#endif /* EFSYS_OPT_RX_SCALE */\n+\n \t/* Check if the firmware supports \"FLAG\" and \"MARK\" filter actions */\n \tif (CAP_FLAGS2(req, FILTER_ACTION_FLAG))\n \t\tencp->enc_filter_action_flag_supported = B_TRUE;\n@@ -1368,8 +1373,10 @@ ef10_get_datapath_caps(\n \n \treturn (0);\n \n+#if EFSYS_OPT_RX_SCALE\n fail5:\n \tEFSYS_PROBE(fail5);\n+#endif /* EFSYS_OPT_RX_SCALE */\n fail4:\n \tEFSYS_PROBE(fail4);\n fail3:\ndiff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex a8c3ae301..246708f9c 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -1281,6 +1281,7 @@ typedef struct efx_nic_cfg_s {\n \tuint32_t\t\tenc_rx_prefix_size;\n \tuint32_t\t\tenc_rx_buf_align_start;\n \tuint32_t\t\tenc_rx_buf_align_end;\n+#if EFSYS_OPT_RX_SCALE\n \tuint32_t\t\tenc_rx_scale_max_exclusive_contexts;\n \t/*\n \t * Mask of supported hash algorithms.\n@@ -1293,6 +1294,7 @@ typedef struct efx_nic_cfg_s {\n \t */\n \tboolean_t\t\tenc_rx_scale_l4_hash_supported;\n \tboolean_t\t\tenc_rx_scale_additional_modes_supported;\n+#endif /* EFSYS_OPT_RX_SCALE */\n #if EFSYS_OPT_LOOPBACK\n \tefx_qword_t\t\tenc_loopback_types[EFX_LINK_NMODES];\n #endif\t/* EFSYS_OPT_LOOPBACK */\ndiff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c\nindex 8a58986e8..fca17171b 100644\n--- a/drivers/net/sfc/base/siena_nic.c\n+++ b/drivers/net/sfc/base/siena_nic.c\n@@ -114,6 +114,7 @@ siena_board_cfg(\n \t/* Alignment for WPTR updates */\n \tencp->enc_rx_push_align = 1;\n \n+#if EFSYS_OPT_RX_SCALE\n \t/* There is one RSS context per function */\n \tencp->enc_rx_scale_max_exclusive_contexts = 1;\n \n@@ -128,6 +129,7 @@ siena_board_cfg(\n \n \t/* There is no support for additional RSS modes */\n \tencp->enc_rx_scale_additional_modes_supported = B_FALSE;\n+#endif /* EFSYS_OPT_RX_SCALE */\n \n \tencp->enc_tx_dma_desc_size_max = EFX_MASK32(FSF_AZ_TX_KER_BYTE_COUNT);\n \t/* Fragments must not span 4k boundaries. */\n", "prefixes": [ "08/11" ] }