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GET /api/patches/44795/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 44795,
    "url": "https://patches.dpdk.org/api/patches/44795/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180917095807.14421-1-xiaoyun.li@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20180917095807.14421-1-xiaoyun.li@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180917095807.14421-1-xiaoyun.li@intel.com",
    "date": "2018-09-17T09:58:07",
    "name": "[v6] net/i40e: add interface to use latest vec path",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "78fec469b3307fafedc390fd117a6820cfbfe313",
    "submitter": {
        "id": 798,
        "url": "https://patches.dpdk.org/api/people/798/?format=api",
        "name": "Li, Xiaoyun",
        "email": "xiaoyun.li@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180917095807.14421-1-xiaoyun.li@intel.com/mbox/",
    "series": [
        {
            "id": 1351,
            "url": "https://patches.dpdk.org/api/series/1351/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1351",
            "date": "2018-09-17T09:58:07",
            "name": "[v6] net/i40e: add interface to use latest vec path",
            "version": 6,
            "mbox": "https://patches.dpdk.org/series/1351/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/44795/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/44795/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C3C5E2BEB;\n\tMon, 17 Sep 2018 12:08:05 +0200 (CEST)",
            "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n\tby dpdk.org (Postfix) with ESMTP id D2CCD2B9A\n\tfor <dev@dpdk.org>; Mon, 17 Sep 2018 12:08:03 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t17 Sep 2018 03:08:02 -0700",
            "from dpdk-xiaoyun3.sh.intel.com ([10.67.119.41])\n\tby fmsmga008.fm.intel.com with ESMTP; 17 Sep 2018 03:06:35 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.53,385,1531810800\"; d=\"scan'208\";a=\"71430359\"",
        "From": "Xiaoyun Li <xiaoyun.li@intel.com>",
        "To": "beilei.xing@intel.com,\n\tqi.z.zhang@intel.com,\n\tferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org, zhiyong.yang@intel.com, Xiaoyun Li <xiaoyun.li@intel.com>",
        "Date": "Mon, 17 Sep 2018 17:58:07 +0800",
        "Message-Id": "<20180917095807.14421-1-xiaoyun.li@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<1535595399-430873-1-git-send-email-xiaoyun.li@intel.com>",
        "References": "<1535595399-430873-1-git-send-email-xiaoyun.li@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v6] net/i40e: add interface to use latest vec path",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "For IA, the AVX2 vector path is only recommended to be used on later\nplatforms (identified by AVX512 support, like SKL etc.) This is because\nperformance benchmark shows downgrade when running AVX2 vector path on\nearly platform (BDW/HSW) in some cases. But we still observe perf gain\nwith some real work loading.\n\nSo this patch introduced the new devarg use-latest-supported-vec to\nforce the driver always selecting the latest supported vec path. Then\napps are able to take AVX2 path on early platforms. And this logic can\nbe re-used if we will have AVX512 vec path in future.\n\nThis patch only affects IA platforms. The selected vec path would be\nlike the following:\n  Without devarg/devarg = 0:\n  Machine\tvPMD\n  AVX512F\tAVX2\n  AVX2\tSSE4.2\n  SSE4.2\tSSE4.2\n  <SSE4.2\tNot Supported\n\n  With devarg = 1\n  Machine\tvPMD\n  AVX512F\tAVX2\n  AVX2\tAVX2\n  SSE4.2\tSSE4.2\n  <SSE4.2\tNot Supported\n\nOther platforms can also apply the same logic if necessary in future.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\n---\nv6:\n * Polish the doc and commit log.\n * Use rte_kvargs_process instead of directly kvlist internals.\nv5:\n * Simpify the rx set function.\nv4:\n * Polish the codes.\nv3:\n * Polish the doc and commit log.\nv2:\n * Correct the calling of the wrong function last time.\n * Fix seg fault bug.\n---\n doc/guides/nics/i40e.rst               |   8 ++\n doc/guides/rel_notes/release_18_11.rst |   4 +\n drivers/net/i40e/i40e_ethdev.c         |  65 ++++++++++-\n drivers/net/i40e/i40e_ethdev.h         |   3 +\n drivers/net/i40e/i40e_rxtx.c           | 143 +++++++++++++------------\n 5 files changed, 155 insertions(+), 68 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst\nindex 5d8500cef..6393baf0b 100644\n--- a/doc/guides/nics/i40e.rst\n+++ b/doc/guides/nics/i40e.rst\n@@ -163,6 +163,14 @@ Runtime Config Options\n   Currently hot-plugging of representor ports is not supported so all required\n   representors must be specified on the creation of the PF.\n \n+- ``Use latest supported vector`` (default ``disable``)\n+\n+  Latest supported vector path may not always get the best perf so vector path was\n+  recommended to use only on later platform. But users may want the latest vector path\n+  since it can get better perf in some real work loading cases. So ``devargs`` param\n+  ``use-latest-supported-vec`` is introduced, for example::\n+    -w 84:00.0,use-latest-supported-vec=1\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/doc/guides/rel_notes/release_18_11.rst b/doc/guides/rel_notes/release_18_11.rst\nindex 8c4bb5447..49fdcdfc8 100644\n--- a/doc/guides/rel_notes/release_18_11.rst\n+++ b/doc/guides/rel_notes/release_18_11.rst\n@@ -67,6 +67,10 @@ New Features\n   SR-IOV option in Hyper-V and Azure. This is an alternative to the previous\n   vdev_netvsc, tap, and failsafe drivers combination.\n \n+* **Added a devarg to use the latest supported vector path.**\n+  A new devarg ``use-latest-supported-vec`` was introduced to allow users to\n+  choose the latest vector path that the platform supported. For example, users\n+  can use AVX2 vector path on BDW/HSW to get better performance.\n \n API Changes\n -----------\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 24d73f2ff..e53ed5315 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -44,6 +44,7 @@\n #define ETH_I40E_FLOATING_VEB_LIST_ARG\t\"floating_veb_list\"\n #define ETH_I40E_SUPPORT_MULTI_DRIVER\t\"support-multi-driver\"\n #define ETH_I40E_QUEUE_NUM_PER_VF_ARG\t\"queue-num-per-vf\"\n+#define ETH_I40E_USE_LATEST_VEC\t\"use-latest-supported-vec\"\n \n #define I40E_CLEAR_PXE_WAIT_MS     200\n \n@@ -409,6 +410,7 @@ static const char *const valid_keys[] = {\n \tETH_I40E_FLOATING_VEB_LIST_ARG,\n \tETH_I40E_SUPPORT_MULTI_DRIVER,\n \tETH_I40E_QUEUE_NUM_PER_VF_ARG,\n+\tETH_I40E_USE_LATEST_VEC,\n \tNULL};\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n@@ -1202,6 +1204,64 @@ i40e_aq_debug_write_global_register(struct i40e_hw *hw,\n \treturn i40e_aq_debug_write_register(hw, reg_addr, reg_val, cmd_details);\n }\n \n+static int\n+i40e_parse_latest_vec_handler(__rte_unused const char *key,\n+\t\t\t\tconst char *value,\n+\t\t\t\tvoid *opaque)\n+{\n+\tstruct i40e_adapter *ad;\n+\tint use_latest_vec;\n+\n+\tad = (struct i40e_adapter *)opaque;\n+\n+\tuse_latest_vec = atoi(value);\n+\n+\tif (use_latest_vec != 0 && use_latest_vec != 1)\n+\t\tPMD_DRV_LOG(WARNING, \"Value should be 0 or 1, set it as 1!\");\n+\n+\tad->use_latest_vec = (bool)use_latest_vec;\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_use_latest_vec(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tstruct rte_kvargs *kvlist;\n+\tint kvargs_count;\n+\n+\tad->use_latest_vec = false;\n+\n+\tif (!dev->device->devargs)\n+\t\treturn 0;\n+\n+\tkvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);\n+\tif (!kvlist)\n+\t\treturn -EINVAL;\n+\n+\tkvargs_count = rte_kvargs_count(kvlist, ETH_I40E_USE_LATEST_VEC);\n+\tif (!kvargs_count) {\n+\t\trte_kvargs_free(kvlist);\n+\t\treturn 0;\n+\t}\n+\n+\tif (kvargs_count > 1)\n+\t\tPMD_DRV_LOG(WARNING, \"More than one argument \\\"%s\\\" and only \"\n+\t\t\t    \"the first invalid or last valid one is used !\",\n+\t\t\t    ETH_I40E_USE_LATEST_VEC);\n+\n+\tif (rte_kvargs_process(kvlist, ETH_I40E_USE_LATEST_VEC,\n+\t\t\t\ti40e_parse_latest_vec_handler, ad) < 0) {\n+\t\trte_kvargs_free(kvlist);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\trte_kvargs_free(kvlist);\n+\treturn 0;\n+}\n+\n #define I40E_ALARM_INTERVAL 50000 /* us */\n \n static int\n@@ -1266,6 +1326,8 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)\n \n \t/* Check if need to support multi-driver */\n \ti40e_support_multi_driver(dev);\n+\t/* Check if users want the latest supported vec path */\n+\ti40e_use_latest_vec(dev);\n \n \t/* Make sure all is clean before doing PF reset */\n \ti40e_clear_hw(hw);\n@@ -12599,4 +12661,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_i40e,\n \t\t\t      ETH_I40E_FLOATING_VEB_ARG \"=1\"\n \t\t\t      ETH_I40E_FLOATING_VEB_LIST_ARG \"=<string>\"\n \t\t\t      ETH_I40E_QUEUE_NUM_PER_VF_ARG \"=1|2|4|8|16\"\n-\t\t\t      ETH_I40E_SUPPORT_MULTI_DRIVER \"=1\");\n+\t\t\t      ETH_I40E_SUPPORT_MULTI_DRIVER \"=1\"\n+\t\t\t      ETH_I40E_USE_LATEST_VEC \"=0|1\");\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 3fffe5a55..140c92b84 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -1078,6 +1078,9 @@ struct i40e_adapter {\n \tuint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX] __rte_cache_min_aligned;\n \tuint64_t flow_types_mask;\n \tuint64_t pctypes_mask;\n+\n+\t/* For devargs */\n+\tbool use_latest_vec;\n };\n \n /**\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 5e78d489e..7c986d535 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -2909,6 +2909,35 @@ i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tqinfo->conf.offloads = txq->offloads;\n }\n \n+static eth_rx_burst_t\n+i40e_get_latest_rx_vec(bool scatter)\n+{\n+#ifdef RTE_ARCH_X86\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n+\t\treturn scatter ? i40e_recv_scattered_pkts_vec_avx2 :\n+\t\t\t\t i40e_recv_pkts_vec_avx2;\n+#endif\n+\treturn scatter ? i40e_recv_scattered_pkts_vec :\n+\t\t\t i40e_recv_pkts_vec;\n+}\n+\n+static eth_rx_burst_t\n+i40e_get_recommend_rx_vec(bool scatter)\n+{\n+#ifdef RTE_ARCH_X86\n+\t/*\n+\t * since AVX frequency can be different to base frequency, limit\n+\t * use of AVX2 version to later plaforms, not all those that could\n+\t * theoretically run it.\n+\t */\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\treturn scatter ? i40e_recv_scattered_pkts_vec_avx2 :\n+\t\t\t\t i40e_recv_pkts_vec_avx2;\n+#endif\n+\treturn scatter ? i40e_recv_scattered_pkts_vec :\n+\t\t\t i40e_recv_pkts_vec;\n+}\n+\n void __attribute__((cold))\n i40e_set_rx_function(struct rte_eth_dev *dev)\n {\n@@ -2940,57 +2969,17 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \t\t}\n \t}\n \n-\tif (dev->data->scattered_rx) {\n-\t\t/* Set the non-LRO scattered callback: there are Vector and\n-\t\t * single allocation versions.\n-\t\t */\n-\t\tif (ad->rx_vec_allowed) {\n-\t\t\tPMD_INIT_LOG(DEBUG, \"Using Vector Scattered Rx \"\n-\t\t\t\t\t    \"callback (port=%d).\",\n-\t\t\t\t     dev->data->port_id);\n-\n-\t\t\tdev->rx_pkt_burst = i40e_recv_scattered_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t\t/*\n-\t\t\t * since AVX frequency can be different to base\n-\t\t\t * frequency, limit use of AVX2 version to later\n-\t\t\t * plaforms, not all those that could theoretically\n-\t\t\t * run it.\n-\t\t\t */\n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\t\t\tdev->rx_pkt_burst =\n-\t\t\t\t\ti40e_recv_scattered_pkts_vec_avx2;\n-#endif\n-\t\t} else {\n-\t\t\tPMD_INIT_LOG(DEBUG, \"Using a Scattered with bulk \"\n-\t\t\t\t\t   \"allocation callback (port=%d).\",\n-\t\t\t\t     dev->data->port_id);\n-\t\t\tdev->rx_pkt_burst = i40e_recv_scattered_pkts;\n-\t\t}\n-\t/* If parameters allow we are going to choose between the following\n-\t * callbacks:\n-\t *    - Vector\n-\t *    - Bulk Allocation\n-\t *    - Single buffer allocation (the simplest one)\n-\t */\n-\t} else if (ad->rx_vec_allowed) {\n-\t\tPMD_INIT_LOG(DEBUG, \"Vector rx enabled, please make sure RX \"\n-\t\t\t\t    \"burst size no less than %d (port=%d).\",\n-\t\t\t     RTE_I40E_DESCS_PER_LOOP,\n-\t\t\t     dev->data->port_id);\n-\n-\t\tdev->rx_pkt_burst = i40e_recv_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t/*\n-\t\t * since AVX frequency can be different to base\n-\t\t * frequency, limit use of AVX2 version to later\n-\t\t * plaforms, not all those that could theoretically\n-\t\t * run it.\n-\t\t */\n-\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\t\tdev->rx_pkt_burst = i40e_recv_pkts_vec_avx2;\n-#endif\n-\t} else if (ad->rx_bulk_alloc_allowed) {\n+\tif (ad->rx_vec_allowed) {\n+\t\t/* Vec Rx path */\n+\t\tPMD_INIT_LOG(DEBUG, \"Vector Rx path will be used on port=%d.\",\n+\t\t\t\tdev->data->port_id);\n+\t\tif (ad->use_latest_vec)\n+\t\t\tdev->rx_pkt_burst =\n+\t\t\ti40e_get_latest_rx_vec(dev->data->scattered_rx);\n+\t\telse\n+\t\t\tdev->rx_pkt_burst =\n+\t\t\ti40e_get_recommend_rx_vec(dev->data->scattered_rx);\n+\t} else if (!dev->data->scattered_rx && ad->rx_bulk_alloc_allowed) {\n \t\tPMD_INIT_LOG(DEBUG, \"Rx Burst Bulk Alloc Preconditions are \"\n \t\t\t\t    \"satisfied. Rx Burst Bulk Alloc function \"\n \t\t\t\t    \"will be used on port=%d.\",\n@@ -2998,12 +2987,12 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \n \t\tdev->rx_pkt_burst = i40e_recv_pkts_bulk_alloc;\n \t} else {\n-\t\tPMD_INIT_LOG(DEBUG, \"Rx Burst Bulk Alloc Preconditions are not \"\n-\t\t\t\t    \"satisfied, or Scattered Rx is requested \"\n-\t\t\t\t    \"(port=%d).\",\n+\t\t/* Simple Rx Path. */\n+\t\tPMD_INIT_LOG(DEBUG, \"Simple Rx path will be used on port=%d.\",\n \t\t\t     dev->data->port_id);\n-\n-\t\tdev->rx_pkt_burst = i40e_recv_pkts;\n+\t\tdev->rx_pkt_burst = dev->data->scattered_rx ?\n+\t\t\t\t\ti40e_recv_scattered_pkts :\n+\t\t\t\t\ti40e_recv_pkts;\n \t}\n \n \t/* Propagate information about RX function choice through all queues. */\n@@ -3049,6 +3038,31 @@ i40e_set_tx_function_flag(struct rte_eth_dev *dev, struct i40e_tx_queue *txq)\n \t\t\t\ttxq->queue_id);\n }\n \n+static eth_tx_burst_t\n+i40e_get_latest_tx_vec(void)\n+{\n+#ifdef RTE_ARCH_X86\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n+\t\treturn i40e_xmit_pkts_vec_avx2;\n+#endif\n+\treturn i40e_xmit_pkts_vec;\n+}\n+\n+static eth_tx_burst_t\n+i40e_get_recommend_tx_vec(void)\n+{\n+#ifdef RTE_ARCH_X86\n+\t/*\n+\t * since AVX frequency can be different to base frequency, limit\n+\t * use of AVX2 version to later plaforms, not all those that could\n+\t * theoretically run it.\n+\t */\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\treturn i40e_xmit_pkts_vec_avx2;\n+#endif\n+\treturn i40e_xmit_pkts_vec;\n+}\n+\n void __attribute__((cold))\n i40e_set_tx_function(struct rte_eth_dev *dev)\n {\n@@ -3073,17 +3087,12 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n \tif (ad->tx_simple_allowed) {\n \t\tif (ad->tx_vec_allowed) {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Vector tx finally be used.\");\n-\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t\t/*\n-\t\t\t * since AVX frequency can be different to base\n-\t\t\t * frequency, limit use of AVX2 version to later\n-\t\t\t * plaforms, not all those that could theoretically\n-\t\t\t * run it.\n-\t\t\t */\n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec_avx2;\n-#endif\n+\t\t\tif (ad->use_latest_vec)\n+\t\t\t\tdev->tx_pkt_burst =\n+\t\t\t\t\ti40e_get_latest_tx_vec();\n+\t\t\telse\n+\t\t\t\tdev->tx_pkt_burst =\n+\t\t\t\t\ti40e_get_recommend_tx_vec();\n \t\t} else {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Simple tx finally be used.\");\n \t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_simple;\n",
    "prefixes": [
        "v6"
    ]
}