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GET /api/patches/44769/?format=api
{ "id": 44769, "url": "https://patches.dpdk.org/api/patches/44769/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1537156482-46428-1-git-send-email-jiayu.hu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1537156482-46428-1-git-send-email-jiayu.hu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1537156482-46428-1-git-send-email-jiayu.hu@intel.com", "date": "2018-09-17T03:54:42", "name": "[v2] vhost: fix corner case for enqueue operation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "166790f365a5705ecf9bad4a668474882887c00c", "submitter": { "id": 539, "url": "https://patches.dpdk.org/api/people/539/?format=api", "name": "Hu, Jiayu", "email": "jiayu.hu@intel.com" }, "delegate": { "id": 2642, "url": "https://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1537156482-46428-1-git-send-email-jiayu.hu@intel.com/mbox/", "series": [ { "id": 1342, "url": "https://patches.dpdk.org/api/series/1342/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1342", "date": "2018-09-17T03:54:42", "name": "[v2] vhost: fix corner case for enqueue operation", "version": 2, "mbox": "https://patches.dpdk.org/series/1342/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/44769/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/44769/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0BFE22BA8;\n\tMon, 17 Sep 2018 05:47:25 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id AB75A2B9A\n\tfor <dev@dpdk.org>; Mon, 17 Sep 2018 05:47:22 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Sep 2018 20:47:21 -0700", "from dpdk15.sh.intel.com ([10.67.111.146])\n\tby fmsmga007.fm.intel.com with ESMTP; 16 Sep 2018 20:46:29 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.53,383,1531810800\"; d=\"scan'208\";a=\"70529833\"", "From": "Jiayu Hu <jiayu.hu@intel.com>", "To": "dev@dpdk.org", "Cc": "tiwei.bie@intel.com, zhihong.wang@intel.com, maxime.coquelin@redhat.com, \n\tGavin.Hu@arm.com, Jiayu Hu <jiayu.hu@intel.com>", "Date": "Mon, 17 Sep 2018 11:54:42 +0800", "Message-Id": "<1537156482-46428-1-git-send-email-jiayu.hu@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1536305094-126439-1-git-send-email-jiayu.hu@intel.com>", "References": "<1536305094-126439-1-git-send-email-jiayu.hu@intel.com>", "Subject": "[dpdk-dev] [PATCH v2] vhost: fix corner case for enqueue operation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When perform enqueue operations on the split and packed ring,\nif the reserved buffer length from the descriptor table execeeds\n65535, the returned length by fill_vec_buf_split/_packed() is\noverflowed. This patch is to avoid this corner case.\n\nFixes: f689586b (\"vhost: shadow used ring update\")\nFixes: fd68b473 (\"vhost: use buffer vectors in dequeue path\")\nFixes: 2f3225a7 (\"vhost: add vector filling support for packed ring\")\nFixes: 37f5e79a (\"vhost: add shadow used ring support for packed rings\")\nFixes: a922401f (\"vhost: add Rx support for packed ring\")\nFixes: ae999ce4 (\"vhost: add Tx support for packed ring\")\n\nSigned-off-by: Jiayu Hu <jiayu.hu@intel.com>\n---\n lib/librte_vhost/virtio_net.c | 20 +++++++++++---------\n 1 file changed, 11 insertions(+), 9 deletions(-)", "diff": "diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c\nindex 4bfae76..f8794ee 100644\n--- a/lib/librte_vhost/virtio_net.c\n+++ b/lib/librte_vhost/virtio_net.c\n@@ -122,7 +122,7 @@ flush_shadow_used_ring_split(struct virtio_net *dev, struct vhost_virtqueue *vq)\n \n static __rte_always_inline void\n update_shadow_used_ring_split(struct vhost_virtqueue *vq,\n-\t\t\t uint16_t desc_idx, uint16_t len)\n+\t\t\t uint16_t desc_idx, uint32_t len)\n {\n \tuint16_t i = vq->shadow_used_idx++;\n \n@@ -186,7 +186,7 @@ flush_shadow_used_ring_packed(struct virtio_net *dev,\n \n static __rte_always_inline void\n update_shadow_used_ring_packed(struct vhost_virtqueue *vq,\n-\t\t\t uint16_t desc_idx, uint16_t len, uint16_t count)\n+\t\t\t uint16_t desc_idx, uint32_t len, uint16_t count)\n {\n \tuint16_t i = vq->shadow_used_idx++;\n \n@@ -329,7 +329,7 @@ static __rte_always_inline int\n fill_vec_buf_split(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \t\t\t uint32_t avail_idx, uint16_t *vec_idx,\n \t\t\t struct buf_vector *buf_vec, uint16_t *desc_chain_head,\n-\t\t\t uint16_t *desc_chain_len, uint8_t perm)\n+\t\t\t uint32_t *desc_chain_len, uint8_t perm)\n {\n \tuint16_t idx = vq->avail->ring[avail_idx & (vq->size - 1)];\n \tuint16_t vec_id = *vec_idx;\n@@ -409,7 +409,7 @@ reserve_avail_buf_split(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \tuint16_t max_tries, tries = 0;\n \n \tuint16_t head_idx = 0;\n-\tuint16_t len = 0;\n+\tuint32_t len = 0;\n \n \t*num_buffers = 0;\n \tcur_idx = vq->last_avail_idx;\n@@ -452,7 +452,7 @@ static __rte_always_inline int\n fill_vec_buf_packed_indirect(struct virtio_net *dev,\n \t\t\tstruct vhost_virtqueue *vq,\n \t\t\tstruct vring_packed_desc *desc, uint16_t *vec_idx,\n-\t\t\tstruct buf_vector *buf_vec, uint16_t *len, uint8_t perm)\n+\t\t\tstruct buf_vector *buf_vec, uint32_t *len, uint8_t perm)\n {\n \tuint16_t i;\n \tuint32_t nr_descs;\n@@ -508,7 +508,7 @@ static __rte_always_inline int\n fill_vec_buf_packed(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \t\t\t\tuint16_t avail_idx, uint16_t *desc_count,\n \t\t\t\tstruct buf_vector *buf_vec, uint16_t *vec_idx,\n-\t\t\t\tuint16_t *buf_id, uint16_t *len, uint8_t perm)\n+\t\t\t\tuint16_t *buf_id, uint32_t *len, uint8_t perm)\n {\n \tbool wrap_counter = vq->avail_wrap_counter;\n \tstruct vring_packed_desc *descs = vq->desc_packed;\n@@ -573,7 +573,7 @@ reserve_avail_buf_packed(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \tuint16_t max_tries, tries = 0;\n \n \tuint16_t buf_id = 0;\n-\tuint16_t len = 0;\n+\tuint32_t len = 0;\n \tuint16_t desc_count;\n \n \t*num_buffers = 0;\n@@ -1379,7 +1379,8 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \n \tfor (i = 0; i < count; i++) {\n \t\tstruct buf_vector buf_vec[BUF_VECTOR_MAX];\n-\t\tuint16_t head_idx, dummy_len;\n+\t\tuint16_t head_idx;\n+\t\tuint32_t dummy_len;\n \t\tuint16_t nr_vec = 0;\n \t\tint err;\n \n@@ -1486,7 +1487,8 @@ virtio_dev_tx_packed(struct virtio_net *dev, struct vhost_virtqueue *vq,\n \n \tfor (i = 0; i < count; i++) {\n \t\tstruct buf_vector buf_vec[BUF_VECTOR_MAX];\n-\t\tuint16_t buf_id, dummy_len;\n+\t\tuint16_t buf_id;\n+\t\tuint32_t dummy_len;\n \t\tuint16_t desc_count, nr_vec = 0;\n \t\tint err;\n \n", "prefixes": [ "v2" ] }