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GET /api/patches/44637/?format=api
{ "id": 44637, "url": "https://patches.dpdk.org/api/patches/44637/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180913060846.29930-2-g.singh@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180913060846.29930-2-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180913060846.29930-2-g.singh@nxp.com", "date": "2018-09-13T06:08:37", "name": "[01/10] doc: add caam jr cryptodev details", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bb20bd87a7d78fb32722e335e9ffb20f25adffcd", "submitter": { "id": 1068, "url": "https://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180913060846.29930-2-g.singh@nxp.com/mbox/", "series": [ { "id": 1300, "url": "https://patches.dpdk.org/api/series/1300/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1300", "date": "2018-09-13T06:08:36", "name": "Introducing the NXP CAAM job ring driver", "version": 1, "mbox": "https://patches.dpdk.org/series/1300/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/44637/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/44637/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4A9F84F9B;\n\tThu, 13 Sep 2018 08:09:29 +0200 (CEST)", "from EUR02-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr20044.outbound.protection.outlook.com [40.107.2.44])\n\tby dpdk.org (Postfix) with ESMTP id 20F8A4CA1\n\tfor <dev@dpdk.org>; Thu, 13 Sep 2018 08:09:26 +0200 (CEST)", "from Tophie.ap.freescale.net (14.142.187.166) by\n\tHE1PR04MB1529.eurprd04.prod.outlook.com (2a01:111:e400:59a8::19) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1143.15;\n\tThu, 13 Sep 2018 06:09:23 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=XyrAPlMFq5VcsOBGaS0p4ZVj6Ka1TxZ5YD3hTEtjDOw=;\n\tb=xJ021AJPQh4I6wgMpKkQuqGkDFV9sGUHwpVTngp2aUuZ8YaWSLPlTvmwUvb+L8gN5/YVzz+3UJLBM5JStX0gMzgY3Ghu8sxtqMXKwN+AiH0Z/3CFTtXZkty1AA+d6CZKXJj9L/AkD5+Tlvy6s4HWt0zRbkWfuXlD2KljkMK3UdE=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=G.Singh@nxp.com; ", "From": "Gagandeep Singh <g.singh@nxp.com>", "To": "dev@dpdk.org,\n\takhil.goyal@nxp.com", "Cc": "Hemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Thu, 13 Sep 2018 11:38:37 +0530", "Message-Id": "<20180913060846.29930-2-g.singh@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20180913060846.29930-1-g.singh@nxp.com>", "References": "<20180913060846.29930-1-g.singh@nxp.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; 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SFP:1101; SCL:1; SRVR:HE1PR04MB1529;\n\tH:Tophie.ap.freescale.net; FPR:; \n\tSPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; ", "Received-SPF": "None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)", "X-Microsoft-Antispam-Message-Info": "SrtTfdnbLI604orCjX44xTdmCcZTzN+6RQ7MPW7MIiyhxlISYEJQlH+uurzz66NoUhMcu+FxQHymA0LayqnclBikmMHojwHpt2WXlvlxg4IukeZfe6STz4APi5vtzKWnYuK/gIFW4vU2vllfUK1mJBXngqWdZyKF/edB94ZhYnvyU1cG1QlEn8mSX41r2z2SN72XpTP63cAF66duVbmlPmXRa83Gmz3f8bnAcejLYU3WLBoP7gfu8YpTJL9sqlH1saK7t/pkU79J++E1xPoMK4UrQlsxCxePeEmzN70YZqvXHROfkBszMQs9DyP2m4GQetotKdpdg5vcUhFruJ22JxFhT2UJq6QyxmrKskaG7HA=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Sep 2018 06:09:23.0694\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "72c4968a-9a66-45b2-5c78-08d6193f7415", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "HE1PR04MB1529", "Subject": "[dpdk-dev] [PATCH 01/10] doc: add caam jr cryptodev details", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Hemant Agrawal <hemant.agrawal@nxp.com>\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n doc/guides/cryptodevs/caam_jr.rst | 159 ++++++++++++++++++++++++++++++\n doc/guides/cryptodevs/index.rst | 1 +\n 2 files changed, 160 insertions(+)\n create mode 100644 doc/guides/cryptodevs/caam_jr.rst", "diff": "diff --git a/doc/guides/cryptodevs/caam_jr.rst b/doc/guides/cryptodevs/caam_jr.rst\nnew file mode 100644\nindex 000000000..0ee501506\n--- /dev/null\n+++ b/doc/guides/cryptodevs/caam_jr.rst\n@@ -0,0 +1,159 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright 2017 NXP\n+\n+\n+NXP CAAM JOB RING (caam_jr)\n+===========================\n+\n+The caam_jr PMD provides poll mode crypto driver support for NXP SEC 4.x+ (CAAM)\n+hardware accelerator. More information is available at:\n+\n+`NXP Cryptographic Acceleration Technology <https://www.nxp.com/applications/solutions/internet-of-things/secure-things/network-security-technology/cryptographic-acceleration-technology:NETWORK_SECURITY_CRYPTOG>`_.\n+\n+Architecture\n+------------\n+\n+SEC is the SOC's security engine, which serves as NXP's latest cryptographic\n+acceleration and offloading hardware. It combines functions previously\n+implemented in separate modules to create a modular and scalable acceleration\n+and assurance engine. It also implements block encryption algorithms, stream\n+cipher algorithms, hashing algorithms, public key algorithms, run-time\n+integrity checking, and a hardware random number generator. SEC performs\n+higher-level cryptographic operations than previous NXP cryptographic\n+accelerators. This provides significant improvement to system level performance.\n+\n+SEC HW accelerator above 4.x+ version are also known as CAAM.\n+\n+caam_jr PMD is one of DPAA drivers which uses uio interface to interact with\n+Linux kernel for configure and destroy the device instance (ring).\n+\n+\n+Implementation\n+--------------\n+\n+SEC provides platform assurance by working with SecMon, which is a companion\n+logic block that tracks the security state of the SOC. SEC is programmed by\n+means of descriptors (not to be confused with frame descriptors (FDs)) that\n+indicate the operations to be performed and link to the message and\n+associated data. SEC incorporates two DMA engines to fetch the descriptors,\n+read the message data, and write the results of the operations. The DMA\n+engine provides a scatter/gather capability so that SEC can read and write\n+data scattered in memory. SEC may be configured by means of software for\n+dynamic changes in byte ordering. The default configuration for this version\n+of SEC is little-endian mode.\n+\n+Note that one physical Job Ring represent one caam_jr device.\n+\n+Features\n+--------\n+\n+The CAAM_JR PMD has support for:\n+\n+Cipher algorithms:\n+\n+* ``RTE_CRYPTO_CIPHER_3DES_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES128_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES192_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES256_CBC``\n+* ``RTE_CRYPTO_CIPHER_AES128_CTR``\n+* ``RTE_CRYPTO_CIPHER_AES192_CTR``\n+* ``RTE_CRYPTO_CIPHER_AES256_CTR``\n+\n+Hash algorithms:\n+\n+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA256_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA384_HMAC``\n+* ``RTE_CRYPTO_AUTH_SHA512_HMAC``\n+* ``RTE_CRYPTO_AUTH_MD5_HMAC``\n+\n+AEAD algorithms:\n+\n+* ``RTE_CRYPTO_AEAD_AES_GCM``\n+\n+Supported DPAA SoCs\n+--------------------\n+\n+* LS1046A/LS1026A\n+* LS1043A/LS1023A\n+* LS1028A\n+* LS1012A\n+\n+Limitations\n+-----------\n+\n+* Hash followed by Cipher mode is not supported\n+* Only supports the session-oriented API implementation (session-less APIs are not supported).\n+\n+Prerequisites\n+-------------\n+\n+caam_jr driver has following dependencies are not part of DPDK and must be installed separately:\n+\n+* **NXP Linux SDK**\n+\n+ NXP Linux software development kit (SDK) includes support for the family\n+ of QorIQ® ARM-Architecture-based system on chip (SoC) processors\n+ and corresponding boards.\n+\n+ It includes the Linux board support packages (BSPs) for NXP SoCs,\n+ a fully operational tool chain, kernel and board specific modules.\n+\n+ SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.\n+\n+Currently supported by DPDK:\n+\n+* NXP SDK **18.09+**.\n+* Supported architectures: **arm64 LE**.\n+\n+* Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.\n+\n+Pre-Installation Configuration\n+------------------------------\n+\n+Config File Options\n+~~~~~~~~~~~~~~~~~~~\n+\n+The following options can be modified in the ``config`` file\n+to enable caam_jr PMD.\n+\n+Please note that enabling debugging options may affect system performance.\n+\n+* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR`` (default ``n``)\n+ By default it is only enabled in common_armv8a_linuxapp config.\n+ Toggle compilation of the ``librte_pmd_caam_jr`` driver.\n+\n+* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE`` (default ``n``)\n+ By default it is disabled.\n+ It can be used when the underlying hardware supports the CAAM in BE mode.\n+ e.g. LS1043A, LS1046A supports CAAM in BE mode.\n+\n+* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR_DEBUG`` (default ``n``)\n+ By default it is disabled.\n+ It can be used enabled debug mode.\n+\n+* ``CONFIG_RTE_CAAM_JR_PMD_MAX_NB_SESSIONS``\n+ By default it is set as 2048 in common_base config.\n+ It indicates Number of sessions to create in the session memory pool\n+ on a single caam_jr device.\n+\n+\n+Installations\n+-------------\n+To compile the caam_jr PMD for Linux arm64 gcc target, run the\n+following ``make`` command:\n+\n+.. code-block:: console\n+\n+ cd <DPDK-source-directory>\n+ make config T=arm64-armv8a-linuxapp-gcc install\n+\n+Enabling logs\n+-------------\n+\n+For enabling logs, use the following EAL parameter:\n+\n+.. code-block:: console\n+\n+ ./your_crypto_application <EAL args> --log-level=pmd.crypto.caam,<level>\ndiff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst\nindex e9928a4e2..7dddeec8a 100644\n--- a/doc/guides/cryptodevs/index.rst\n+++ b/doc/guides/cryptodevs/index.rst\n@@ -13,6 +13,7 @@ Crypto Device Drivers\n aesni_mb\n aesni_gcm\n armv8\n+ caam_jr\n ccp\n dpaa2_sec\n dpaa_sec\n", "prefixes": [ "01/10" ] }