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GET /api/patches/44506/?format=api
{ "id": 44506, "url": "https://patches.dpdk.org/api/patches/44506/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180910101746.68835-1-xiaoyun.li@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180910101746.68835-1-xiaoyun.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180910101746.68835-1-xiaoyun.li@intel.com", "date": "2018-09-10T10:17:46", "name": "[v4] net/i40e: add interface to choose latest vector path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f029970738175bdec9938735a9602463f8420510", "submitter": { "id": 798, "url": "https://patches.dpdk.org/api/people/798/?format=api", "name": "Li, Xiaoyun", "email": "xiaoyun.li@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180910101746.68835-1-xiaoyun.li@intel.com/mbox/", "series": [ { "id": 1245, "url": "https://patches.dpdk.org/api/series/1245/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1245", "date": "2018-09-10T10:17:46", "name": "[v4] net/i40e: add interface to choose latest vector path", "version": 4, "mbox": "https://patches.dpdk.org/series/1245/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/44506/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/44506/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4EEBF378B;\n\tMon, 10 Sep 2018 12:26:09 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id 74D781041\n\tfor <dev@dpdk.org>; Mon, 10 Sep 2018 12:26:07 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t10 Sep 2018 03:26:06 -0700", "from dpdk-xiaoyun3.sh.intel.com ([10.67.119.41])\n\tby orsmga003.jf.intel.com with ESMTP; 10 Sep 2018 03:25:50 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.53,355,1531810800\"; d=\"scan'208\";a=\"82260688\"", "From": "Xiaoyun Li <xiaoyun.li@intel.com>", "To": "beilei.xing@intel.com,\n\tqi.z.zhang@intel.com", "Cc": "dev@dpdk.org, zhiyong.yang@intel.com, bruce.richardson@intel.com,\n\tdavid.hunt@intel.com, Xiaoyun Li <xiaoyun.li@intel.com>", "Date": "Mon, 10 Sep 2018 18:17:46 +0800", "Message-Id": "<20180910101746.68835-1-xiaoyun.li@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<1535595399-430873-1-git-send-email-xiaoyun.li@intel.com>", "References": "<1535595399-430873-1-git-send-email-xiaoyun.li@intel.com>", "Subject": "[dpdk-dev] [PATCH v4] net/i40e: add interface to choose latest\n\tvector path", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Right now, vector path is limited to only use on later platform.\nThis patch adds a devarg use-latest-vec to allow the users to\nuse the latest vector path that the platform supported. Namely,\nusing AVX2 vector path on broadwell is possible.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\n---\nv4:\n * Polish the codes.\nv3:\n * Polish the doc and commit log.\nv2:\n * Correct the calling of the wrong function last time.\n * Fix seg fault bug.\n---\n doc/guides/nics/i40e.rst | 8 ++\n doc/guides/rel_notes/release_18_11.rst | 4 +\n drivers/net/i40e/i40e_ethdev.c | 46 ++++++++++-\n drivers/net/i40e/i40e_ethdev.h | 3 +\n drivers/net/i40e/i40e_rxtx.c | 103 ++++++++++++++++---------\n 5 files changed, 128 insertions(+), 36 deletions(-)", "diff": "diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst\nindex 65d87f869..643e6a062 100644\n--- a/doc/guides/nics/i40e.rst\n+++ b/doc/guides/nics/i40e.rst\n@@ -163,6 +163,14 @@ Runtime Config Options\n Currently hot-plugging of representor ports is not supported so all required\n representors must be specified on the creation of the PF.\n \n+- ``Use latest vector`` (default ``disable``)\n+\n+ Vector path was limited to use only on later platform. But users may want the\n+ latest vector path. For example, VPP users may want to use AVX2 vector path on HSW/BDW\n+ because it can get better perf. So ``devargs`` parameter ``use-latest-vec`` is\n+ introduced, for example::\n+ -w 84:00.0,use-latest-vec=1\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/doc/guides/rel_notes/release_18_11.rst b/doc/guides/rel_notes/release_18_11.rst\nindex 3ae6b3f58..34af591a2 100644\n--- a/doc/guides/rel_notes/release_18_11.rst\n+++ b/doc/guides/rel_notes/release_18_11.rst\n@@ -54,6 +54,10 @@ New Features\n Also, make sure to start the actual text at the margin.\n =========================================================\n \n+* **Added a devarg to use the latest vector path.**\n+ A new devarg ``use-latest-vec`` was introduced to allow users to choose\n+ the latest vector path that the platform supported. For example, VPP users\n+ can use AVX2 vector path on BDW/HSW to get better performance.\n \n API Changes\n -----------\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 85a6a867f..72377d0b6 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -44,6 +44,7 @@\n #define ETH_I40E_FLOATING_VEB_LIST_ARG\t\"floating_veb_list\"\n #define ETH_I40E_SUPPORT_MULTI_DRIVER\t\"support-multi-driver\"\n #define ETH_I40E_QUEUE_NUM_PER_VF_ARG\t\"queue-num-per-vf\"\n+#define ETH_I40E_USE_LATEST_VEC\t\"use-latest-vec\"\n \n #define I40E_CLEAR_PXE_WAIT_MS 200\n \n@@ -408,6 +409,7 @@ static const char *const valid_keys[] = {\n \tETH_I40E_FLOATING_VEB_LIST_ARG,\n \tETH_I40E_SUPPORT_MULTI_DRIVER,\n \tETH_I40E_QUEUE_NUM_PER_VF_ARG,\n+\tETH_I40E_USE_LATEST_VEC,\n \tNULL};\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n@@ -1201,6 +1203,46 @@ i40e_aq_debug_write_global_register(struct i40e_hw *hw,\n \treturn i40e_aq_debug_write_register(hw, reg_addr, reg_val, cmd_details);\n }\n \n+static int\n+i40e_parse_latest_vec(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tint kvargs_count, use_latest_vec;\n+\tstruct rte_kvargs *kvlist;\n+\n+\tad->use_latest_vec = false;\n+\n+\tif (!dev->device->devargs)\n+\t\treturn 0;\n+\n+\tkvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);\n+\tif (!kvlist)\n+\t\treturn -EINVAL;\n+\n+\tkvargs_count = rte_kvargs_count(kvlist, ETH_I40E_USE_LATEST_VEC);\n+\tif (!kvargs_count) {\n+\t\trte_kvargs_free(kvlist);\n+\t\treturn 0;\n+\t}\n+\n+\tif (kvargs_count > 1)\n+\t\tPMD_DRV_LOG(WARNING, \"More than one argument \\\"%s\\\" and only \"\n+\t\t\t \"the first one is used !\",\n+\t\t\t ETH_I40E_USE_LATEST_VEC);\n+\n+\tuse_latest_vec = atoi((&kvlist->pairs[0])->value);\n+\n+\trte_kvargs_free(kvlist);\n+\n+\tif (use_latest_vec != 0 && use_latest_vec != 1)\n+\t\tPMD_DRV_LOG(WARNING, \"Value should be 0 or 1, set it as 1!\");\n+\n+\tad->use_latest_vec = (bool)use_latest_vec;\n+\n+\treturn 0;\n+}\n+\n static int\n eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)\n {\n@@ -1263,6 +1305,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)\n \n \t/* Check if need to support multi-driver */\n \ti40e_support_multi_driver(dev);\n+\ti40e_parse_latest_vec(dev);\n \n \t/* Make sure all is clean before doing PF reset */\n \ti40e_clear_hw(hw);\n@@ -12527,4 +12570,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_i40e,\n \t\t\t ETH_I40E_FLOATING_VEB_ARG \"=1\"\n \t\t\t ETH_I40E_FLOATING_VEB_LIST_ARG \"=<string>\"\n \t\t\t ETH_I40E_QUEUE_NUM_PER_VF_ARG \"=1|2|4|8|16\"\n-\t\t\t ETH_I40E_SUPPORT_MULTI_DRIVER \"=1\");\n+\t\t\t ETH_I40E_SUPPORT_MULTI_DRIVER \"=1\"\n+\t\t\t ETH_I40E_USE_LATEST_VEC \"=1\");\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 3fffe5a55..140c92b84 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -1078,6 +1078,9 @@ struct i40e_adapter {\n \tuint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX] __rte_cache_min_aligned;\n \tuint64_t flow_types_mask;\n \tuint64_t pctypes_mask;\n+\n+\t/* For devargs */\n+\tbool use_latest_vec;\n };\n \n /**\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 2a28ee348..e9fa7ed90 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -2909,6 +2909,34 @@ i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tqinfo->conf.offloads = txq->offloads;\n }\n \n+static eth_rx_burst_t\n+i40e_get_latest_rx_vec(bool scatter)\n+{\n+#ifdef RTE_ARCH_X86\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n+\t\treturn scatter ? i40e_recv_scattered_pkts_vec_avx2 :\n+\t\t\t\t i40e_recv_pkts_vec_avx2;\n+#endif\n+\treturn scatter ? i40e_recv_scattered_pkts_vec :\n+\t\t\t i40e_recv_pkts_vec;\n+}\n+\n+static eth_rx_burst_t\n+i40e_get_recommend_rx_vec(bool scatter)\n+{\n+#ifdef RTE_ARCH_X86\n+\t/*\n+\t * since AVX frequency can be different to base frequency, limit\n+\t * use of AVX2 version to later plaforms, not all those that could\n+\t * theoretically run it.\n+\t */\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\treturn scatter ? i40e_recv_scattered_pkts_vec_avx2 :\n+\t\t\t\t i40e_recv_pkts_vec_avx2;\n+#endif\n+\treturn scatter ? i40e_recv_scattered_pkts_vec :\n+\t\t\t i40e_recv_pkts_vec;\n+}\n void __attribute__((cold))\n i40e_set_rx_function(struct rte_eth_dev *dev)\n {\n@@ -2948,19 +2976,12 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \t\t\tPMD_INIT_LOG(DEBUG, \"Using Vector Scattered Rx \"\n \t\t\t\t\t \"callback (port=%d).\",\n \t\t\t\t dev->data->port_id);\n-\n-\t\t\tdev->rx_pkt_burst = i40e_recv_scattered_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t\t/*\n-\t\t\t * since AVX frequency can be different to base\n-\t\t\t * frequency, limit use of AVX2 version to later\n-\t\t\t * plaforms, not all those that could theoretically\n-\t\t\t * run it.\n-\t\t\t */\n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\t\tif (ad->use_latest_vec)\n \t\t\t\tdev->rx_pkt_burst =\n-\t\t\t\t\ti40e_recv_scattered_pkts_vec_avx2;\n-#endif\n+\t\t\t\t\ti40e_get_latest_rx_vec(true);\n+\t\t\telse\n+\t\t\t\tdev->rx_pkt_burst =\n+\t\t\t\t\ti40e_get_recommend_rx_vec(true);\n \t\t} else {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Using a Scattered with bulk \"\n \t\t\t\t\t \"allocation callback (port=%d).\",\n@@ -2978,18 +2999,10 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t\t \"burst size no less than %d (port=%d).\",\n \t\t\t RTE_I40E_DESCS_PER_LOOP,\n \t\t\t dev->data->port_id);\n-\n-\t\tdev->rx_pkt_burst = i40e_recv_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t/*\n-\t\t * since AVX frequency can be different to base\n-\t\t * frequency, limit use of AVX2 version to later\n-\t\t * plaforms, not all those that could theoretically\n-\t\t * run it.\n-\t\t */\n-\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\t\tdev->rx_pkt_burst = i40e_recv_pkts_vec_avx2;\n-#endif\n+\t\tif (ad->use_latest_vec)\n+\t\t\tdev->rx_pkt_burst = i40e_get_latest_rx_vec(false);\n+\t\telse\n+\t\t\tdev->rx_pkt_burst = i40e_get_recommend_rx_vec(false);\n \t} else if (ad->rx_bulk_alloc_allowed) {\n \t\tPMD_INIT_LOG(DEBUG, \"Rx Burst Bulk Alloc Preconditions are \"\n \t\t\t\t \"satisfied. Rx Burst Bulk Alloc function \"\n@@ -3049,6 +3062,31 @@ i40e_set_tx_function_flag(struct rte_eth_dev *dev, struct i40e_tx_queue *txq)\n \t\t\t\ttxq->queue_id);\n }\n \n+static eth_tx_burst_t\n+i40e_get_latest_tx_vec(void)\n+{\n+#ifdef RTE_ARCH_X86\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n+\t\treturn i40e_xmit_pkts_vec_avx2;\n+#endif\n+\treturn i40e_xmit_pkts_vec;\n+}\n+\n+static eth_tx_burst_t\n+i40e_get_recommend_tx_vec(void)\n+{\n+#ifdef RTE_ARCH_X86\n+\t/*\n+\t * since AVX frequency can be different to base frequency, limit\n+\t * use of AVX2 version to later plaforms, not all those that could\n+\t * theoretically run it.\n+\t */\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\treturn i40e_xmit_pkts_vec_avx2;\n+#endif\n+\treturn i40e_xmit_pkts_vec;\n+}\n+\n void __attribute__((cold))\n i40e_set_tx_function(struct rte_eth_dev *dev)\n {\n@@ -3073,17 +3111,12 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n \tif (ad->tx_simple_allowed) {\n \t\tif (ad->tx_vec_allowed) {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Vector tx finally be used.\");\n-\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec;\n-#ifdef RTE_ARCH_X86\n-\t\t\t/*\n-\t\t\t * since AVX frequency can be different to base\n-\t\t\t * frequency, limit use of AVX2 version to later\n-\t\t\t * plaforms, not all those that could theoretically\n-\t\t\t * run it.\n-\t\t\t */\n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec_avx2;\n-#endif\n+\t\t\tif (ad->use_latest_vec)\n+\t\t\t\tdev->tx_pkt_burst =\n+\t\t\t\t\ti40e_get_latest_tx_vec();\n+\t\t\telse\n+\t\t\t\tdev->tx_pkt_burst =\n+\t\t\t\t\ti40e_get_recommend_tx_vec();\n \t\t} else {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Simple tx finally be used.\");\n \t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_simple;\n", "prefixes": [ "v4" ] }