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GET /api/patches/44458/?format=api
{ "id": 44458, "url": "https://patches.dpdk.org/api/patches/44458/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1536438666-22184-16-git-send-email-rasesh.mody@cavium.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536438666-22184-16-git-send-email-rasesh.mody@cavium.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536438666-22184-16-git-send-email-rasesh.mody@cavium.com", "date": "2018-09-08T20:31:04", "name": "[15/17] net/qede: add support for Rx descriptor status", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4dcda45827ce38b4933bbc74ad5969165a797490", "submitter": { "id": 569, "url": "https://patches.dpdk.org/api/people/569/?format=api", "name": "Mody, Rasesh", "email": "rasesh.mody@cavium.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1536438666-22184-16-git-send-email-rasesh.mody@cavium.com/mbox/", "series": [ { "id": 1239, "url": "https://patches.dpdk.org/api/series/1239/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1239", "date": "2018-09-08T20:30:49", "name": "net/qede: add enhancements and fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/1239/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/44458/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/44458/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 373677CDE;\n\tSat, 8 Sep 2018 22:32:13 +0200 (CEST)", "from NAM04-BN3-obe.outbound.protection.outlook.com\n\t(mail-eopbgr680053.outbound.protection.outlook.com [40.107.68.53])\n\tby dpdk.org (Postfix) with ESMTP id ADFC34CE4\n\tfor <dev@dpdk.org>; Sat, 8 Sep 2018 22:31:57 +0200 (CEST)", "from cavium.com (198.186.1.5) by\n\tDM6PR07MB5372.namprd07.prod.outlook.com (2603:10b6:5:44::17) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1101.18; Sat, 8 Sep 2018 20:31:56 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=1rUtDqO1TYqAOAOegNkNBxAUuPdOm6+gLIaJnIwC+L8=;\n\tb=gFJ88Zcc/6Lxa2Y5tKSpPOF8ms2LpI5+geAygT55E1ndzjU/TJZthbhBOL1noXUL6tBS4g0iIJfnl/EH1aBcBZARhLB4eKF4mjpZnYMctHFDuQofRZX/piW26CAusfiXIJkC1ywftsiwrDmYWiBRRm8wdJ+VLOm0M6+ut50qVOw=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Rasesh.Mody@cavium.com; ", "From": "Rasesh Mody <rasesh.mody@cavium.com>", "To": "dev@dpdk.org", "Cc": "Shahed Shaikh <shahed.shaikh@cavium.com>, ferruh.yigit@intel.com,\n\tDept-EngDPDKDev@cavium.com", "Date": "Sat, 8 Sep 2018 13:31:04 -0700", "Message-Id": "<1536438666-22184-16-git-send-email-rasesh.mody@cavium.com>", "X-Mailer": "git-send-email 1.7.10.3", "In-Reply-To": "<1536438666-22184-1-git-send-email-rasesh.mody@cavium.com>", "References": "<1536438666-22184-1-git-send-email-rasesh.mody@cavium.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": 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"D/nqK8pubs+DXvQhkqHAUEL6rgkGf/gT7c6XRh7gcs8+Eji4osGOFqmV4UGPw9d16QAg8iqO1Rck40/aIm0p7OOCqZecNN1ff06PfbVXr06AB1UeWenFsNtFK6GjfSBQ4EiwO/jQzOfGSNeK8cMcz0gUwA4so4RgcyFWY2aXO1BZNqJ4QzSsGGUamB7wpy5Qmz9Yw1dx9A/p+f1dLzuVawh+K9y7OQTRsLco57XdJUbhnzRiu9EswWJm5CMTjEhhqBc1bpHWec7IWBhAfSSUi5fIMn+UK50Lz+p5LlfW/liDaUpxcHLuMVokC8zwG5WHH56gbJCc+N98TMHDt1wteQyhH7pZvL0iR0wuU5w/YzA=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "cavium.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Sep 2018 20:31:56.2389\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "9bee7515-80c6-40db-ab60-08d615ca1ee6", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR07MB5372", "Subject": "[dpdk-dev] [PATCH 15/17] net/qede: add support for Rx descriptor\n\tstatus", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shahed Shaikh <shahed.shaikh@cavium.com>\n\nThis patch implement eth_dev_ops->rx_descriptor_status\ncallback.\nWalk through receive completion ring to calculate receive\ndescriptors used by firmware and then provide the status of\noffset accordingly.\n\nSigned-off-by: Shahed Shaikh <shahed.shaikh@cavium.com>\n---\n drivers/net/qede/qede_ethdev.c | 2 +\n drivers/net/qede/qede_rxtx.c | 81 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/qede/qede_rxtx.h | 2 +\n 3 files changed, 85 insertions(+)", "diff": "diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex 259eb45..322400c 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -2300,6 +2300,7 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)\n \t.dev_infos_get = qede_dev_info_get,\n \t.rx_queue_setup = qede_rx_queue_setup,\n \t.rx_queue_release = qede_rx_queue_release,\n+\t.rx_descriptor_status = qede_rx_descriptor_status,\n \t.tx_queue_setup = qede_tx_queue_setup,\n \t.tx_queue_release = qede_tx_queue_release,\n \t.dev_start = qede_dev_start,\n@@ -2341,6 +2342,7 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)\n \t.dev_infos_get = qede_dev_info_get,\n \t.rx_queue_setup = qede_rx_queue_setup,\n \t.rx_queue_release = qede_rx_queue_release,\n+\t.rx_descriptor_status = qede_rx_descriptor_status,\n \t.tx_queue_setup = qede_tx_queue_setup,\n \t.tx_queue_release = qede_tx_queue_release,\n \t.dev_start = qede_dev_start,\ndiff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c\nindex 675c0a0..8a4772f 100644\n--- a/drivers/net/qede/qede_rxtx.c\n+++ b/drivers/net/qede/qede_rxtx.c\n@@ -2151,3 +2151,84 @@ static inline uint32_t qede_rx_cqe_to_tunn_pkt_type(uint16_t flags)\n {\n \treturn 0;\n }\n+\n+\n+/* this function does a fake walk through over completion queue\n+ * to calculate number of BDs used by HW.\n+ * At the end, it restores the state of completion queue.\n+ */\n+static uint16_t\n+qede_parse_fp_cqe(struct qede_rx_queue *rxq)\n+{\n+\tuint16_t hw_comp_cons, sw_comp_cons, bd_count = 0;\n+\tunion eth_rx_cqe *cqe, *orig_cqe = NULL;\n+\n+\thw_comp_cons = rte_le_to_cpu_16(*rxq->hw_cons_ptr);\n+\tsw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);\n+\n+\tif (hw_comp_cons == sw_comp_cons)\n+\t\treturn 0;\n+\n+\t/* Get the CQE from the completion ring */\n+\tcqe = (union eth_rx_cqe *)ecore_chain_consume(&rxq->rx_comp_ring);\n+\torig_cqe = cqe;\n+\n+\twhile (sw_comp_cons != hw_comp_cons) {\n+\t\tswitch (cqe->fast_path_regular.type) {\n+\t\tcase ETH_RX_CQE_TYPE_REGULAR:\n+\t\t\tbd_count += cqe->fast_path_regular.bd_num;\n+\t\t\tbreak;\n+\t\tcase ETH_RX_CQE_TYPE_TPA_END:\n+\t\t\tbd_count += cqe->fast_path_tpa_end.num_of_bds;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tcqe =\n+\t\t(union eth_rx_cqe *)ecore_chain_consume(&rxq->rx_comp_ring);\n+\t\tsw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);\n+\t}\n+\n+\t/* revert comp_ring to original state */\n+\tecore_chain_set_cons(&rxq->rx_comp_ring, sw_comp_cons, orig_cqe);\n+\n+\treturn bd_count;\n+}\n+\n+int\n+qede_rx_descriptor_status(void *p_rxq, uint16_t offset)\n+{\n+\tuint16_t hw_bd_cons, sw_bd_cons, sw_bd_prod;\n+\tuint16_t produced, consumed;\n+\tstruct qede_rx_queue *rxq = p_rxq;\n+\n+\tif (offset > rxq->nb_rx_desc)\n+\t\treturn -EINVAL;\n+\n+\tsw_bd_cons = ecore_chain_get_cons_idx(&rxq->rx_bd_ring);\n+\tsw_bd_prod = ecore_chain_get_prod_idx(&rxq->rx_bd_ring);\n+\n+\t/* find BDs used by HW from completion queue elements */\n+\thw_bd_cons = sw_bd_cons + qede_parse_fp_cqe(rxq);\n+\n+\tif (hw_bd_cons < sw_bd_cons)\n+\t\t/* wraparound case */\n+\t\tconsumed = (0xffff - sw_bd_cons) + hw_bd_cons;\n+\telse\n+\t\tconsumed = hw_bd_cons - sw_bd_cons;\n+\n+\tif (offset <= consumed)\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\tif (sw_bd_prod < sw_bd_cons)\n+\t\t/* wraparound case */\n+\t\tproduced = (0xffff - sw_bd_cons) + sw_bd_prod;\n+\telse\n+\t\tproduced = sw_bd_prod - sw_bd_cons;\n+\n+\tif (offset <= produced)\n+\t\treturn RTE_ETH_RX_DESC_AVAIL;\n+\n+\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+}\ndiff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h\nindex 8bd8d1c..d3a41e9 100644\n--- a/drivers/net/qede/qede_rxtx.h\n+++ b/drivers/net/qede/qede_rxtx.h\n@@ -276,6 +276,8 @@ uint16_t qede_rxtx_pkts_dummy(void *p_rxq,\n void qede_stop_queues(struct rte_eth_dev *eth_dev);\n int qede_calc_rx_buf_size(struct rte_eth_dev *dev, uint16_t mbufsz,\n \t\t\t uint16_t max_frame_size);\n+int\n+qede_rx_descriptor_status(void *rxq, uint16_t offset);\n \n /* Fastpath resource alloc/dealloc helpers */\n int qede_alloc_fp_resc(struct qede_dev *qdev);\n", "prefixes": [ "15/17" ] }