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GET /api/patches/441/?format=api
{ "id": 441, "url": "https://patches.dpdk.org/api/patches/441/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1411410879-28872-4-git-send-email-alan.carew@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411410879-28872-4-git-send-email-alan.carew@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411410879-28872-4-git-send-email-alan.carew@intel.com", "date": "2014-09-22T18:34:32", "name": "[dpdk-dev,03/10] CPU Frequency Power Management(Host).", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "20020237051b3e8eaf8ce858076f80202ac370a9", "submitter": { "id": 72, "url": "https://patches.dpdk.org/api/people/72/?format=api", "name": "Alan Carew", "email": "alan.carew@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1411410879-28872-4-git-send-email-alan.carew@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/441/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/441/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 95807B3AA;\n\tMon, 22 Sep 2014 20:29:43 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 68B23333\n\tfor <dev@dpdk.org>; Mon, 22 Sep 2014 20:29:37 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga101.jf.intel.com with ESMTP; 22 Sep 2014 11:35:20 -0700", "from sie-lab-212-143.ir.intel.com (HELO\n\tsilpixa00385294.ir.intel.com) ([10.237.212.143])\n\tby orsmga002.jf.intel.com with ESMTP; 22 Sep 2014 11:35:18 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,573,1406617200\"; d=\"scan'208\";a=\"606714392\"", "From": "Alan Carew <alan.carew@intel.com>", "To": "dev@dpdk.org", "Date": "Mon, 22 Sep 2014 19:34:32 +0100", "Message-Id": "<1411410879-28872-4-git-send-email-alan.carew@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1411410879-28872-1-git-send-email-alan.carew@intel.com>", "References": "<1411410879-28872-1-git-send-email-alan.carew@intel.com>", "Subject": "[dpdk-dev] [PATCH 03/10] CPU Frequency Power Management(Host).", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "A wrapper around librte_power, providing locking around the non-threadsafe\nlibrary, allowing for frequency changes based on core masks and core numbers\nfrom both the CLI thread and epoll monitor thread.\n\nSigned-off-by: Alan Carew <alan.carew@intel.com>\n---\n examples/vm_power_manager/power_manager.c | 234 ++++++++++++++++++++++++++++++\n examples/vm_power_manager/power_manager.h | 191 ++++++++++++++++++++++++\n 2 files changed, 425 insertions(+)\n create mode 100644 examples/vm_power_manager/power_manager.c\n create mode 100644 examples/vm_power_manager/power_manager.h", "diff": "diff --git a/examples/vm_power_manager/power_manager.c b/examples/vm_power_manager/power_manager.c\nnew file mode 100644\nindex 0000000..ceca532\n--- /dev/null\n+++ b/examples/vm_power_manager/power_manager.c\n@@ -0,0 +1,234 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Intel Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <stdint.h>\n+#include <inttypes.h>\n+#include <sys/un.h>\n+#include <fcntl.h>\n+#include <unistd.h>\n+#include <dirent.h>\n+#include <errno.h>\n+\n+#include <sys/types.h>\n+\n+#include <rte_config.h>\n+#include <rte_log.h>\n+#include <rte_power.h>\n+#include <rte_spinlock.h>\n+\n+#include \"power_manager.h\"\n+\n+#define RTE_LOGTYPE_POWER_MANAGER RTE_LOGTYPE_USER1\n+\n+#define POWER_SCALE_CORE(DIRECTION, core_num, ret) do { \\\n+\tif (!(global_enabled_cpus & (1ULL << core_num))) \\\n+\t\treturn -1; \\\n+\trte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \\\n+\tret = rte_power_freq_##DIRECTION(core_num); \\\n+\trte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \\\n+} while (0)\n+\n+#define POWER_SCALE_MASK(DIRECTION, core_mask, ret) do { \\\n+\tint i; \\\n+\tfor (i = 0; core_mask; core_mask &= ~(1 << i++)) { \\\n+\t\tif (!(global_enabled_cpus & (1ULL << i))) \\\n+\t\t\treturn -1; \\\n+\t\trte_spinlock_lock(&global_core_freq_info[i].power_sl); \\\n+\t\tret = rte_power_freq_##DIRECTION(i); \\\n+\t\trte_spinlock_unlock(&global_core_freq_info[i].power_sl); \\\n+\t} \\\n+} while (0)\n+\n+struct freq_info {\n+\trte_spinlock_t power_sl;\n+\tuint32_t freqs[RTE_MAX_LCORE_FREQS];\n+\tunsigned num_freqs;\n+} __rte_cache_aligned;\n+\n+static struct freq_info global_core_freq_info[RTE_MAX_LCORE];\n+\n+static uint64_t global_enabled_cpus;\n+\n+#define SYSFS_CPU_PATH \"/sys/devices/system/cpu/cpu%u/topology/core_id\"\n+\n+static unsigned\n+set_host_cpus_mask(void)\n+{\n+\tchar path[PATH_MAX];\n+\tunsigned i;\n+\tunsigned num_cpus = 0;\n+\tfor (i = 0; i < RTE_MAX_LCORE; i++) {\n+\t\tsnprintf(path, sizeof(path), SYSFS_CPU_PATH, i);\n+\t\tif (access(path, F_OK) == 0) {\n+\t\t\tglobal_enabled_cpus |= 1 << i;\n+\t\t\tnum_cpus++;\n+\t\t} else\n+\t\t\treturn num_cpus;\n+\t}\n+\treturn num_cpus;\n+}\n+\n+int\n+power_manager_init(void)\n+{\n+\tunsigned i, num_cpus;\n+\tuint64_t cpu_mask;\n+\tint ret = 0;\n+\n+\tnum_cpus = set_host_cpus_mask();\n+\tif (num_cpus == 0) {\n+\t\tRTE_LOG(ERR, POWER_MANAGER, \"Unable to detected host CPUs, please \"\n+\t\t\t\t\"ensure that sufficient privileges exist to inspect sysfs\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tcpu_mask = global_enabled_cpus;\n+\tfor (i = 0; cpu_mask; cpu_mask &= ~(1 << i++)) {\n+\t\tif (rte_power_init(i) < 0 || rte_power_freqs(i,\n+\t\t\t\tglobal_core_freq_info[i].freqs,\n+\t\t\t\tRTE_MAX_LCORE_FREQS) == 0) {\n+\t\t\tRTE_LOG(ERR, POWER_MANAGER, \"Unable to initialize power manager \"\n+\t\t\t\t\t\"for core %u\\n\", i);\n+\t\t\tglobal_enabled_cpus &= ~(1 << i);\n+\t\t\tnum_cpus--;\n+\t\t\tret = -1;\n+\t\t}\n+\t\trte_spinlock_init(&global_core_freq_info[i].power_sl);\n+\t}\n+\tRTE_LOG(INFO, POWER_MANAGER, \"Detected %u host CPUs , enabled core mask:\"\n+\t\t\t\t\t\" 0x%\"PRIx64\"\\n\", num_cpus, global_enabled_cpus);\n+\treturn ret;\n+\n+}\n+\n+uint32_t\n+power_manager_get_current_frequency(unsigned core_num)\n+{\n+\tuint32_t freq, index;\n+\n+\tif (!(global_enabled_cpus & (1ULL << core_num)))\n+\t\treturn 0;\n+\n+\trte_spinlock_lock(&global_core_freq_info[core_num].power_sl);\n+\tindex = rte_power_get_freq(core_num);\n+\trte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);\n+\tif (index >= RTE_MAX_LCORE)\n+\t\tfreq = 0;\n+\telse\n+\t\tfreq = global_core_freq_info[core_num].freqs[index];\n+\n+\treturn freq;\n+}\n+\n+int\n+power_manager_exit(void)\n+{\n+\tunsigned int i;\n+\tint ret = 0;\n+\n+\tfor (i = 0; global_enabled_cpus; global_enabled_cpus &= ~(1 << i++)) {\n+\t\tif (rte_power_exit(i) < 0) {\n+\t\t\tRTE_LOG(ERR, POWER_MANAGER, \"Unable to shutdown power manager \"\n+\t\t\t\t\t\"for core %u\\n\", i);\n+\t\t\tret = -1;\n+\t\t}\n+\t}\n+\tglobal_enabled_cpus = 0;\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_mask_up(uint64_t core_mask)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_MASK(up, core_mask, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_mask_down(uint64_t core_mask)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_MASK(down, core_mask, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_mask_min(uint64_t core_mask)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_MASK(min, core_mask, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_mask_max(uint64_t core_mask)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_MASK(max, core_mask, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_core_up(unsigned core_num)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_CORE(up, core_num, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_core_down(unsigned core_num)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_CORE(down, core_num, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_core_min(unsigned core_num)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_CORE(min, core_num, ret);\n+\treturn ret;\n+}\n+\n+int\n+power_manager_scale_core_max(unsigned core_num)\n+{\n+\tint ret = 0;\n+\tPOWER_SCALE_CORE(max, core_num, ret);\n+\treturn ret;\n+}\ndiff --git a/examples/vm_power_manager/power_manager.h b/examples/vm_power_manager/power_manager.h\nnew file mode 100644\nindex 0000000..0b2f2a0\n--- /dev/null\n+++ b/examples/vm_power_manager/power_manager.h\n@@ -0,0 +1,191 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Intel Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef POWER_MANAGER_H_\n+#define POWER_MANAGER_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+/**\n+ * Initialize power management.\n+ * Initializes resources and verifies the number of CPUs on the system.\n+ * Wraps librte_power int rte_power_init(unsigned lcore_id);\n+ *\n+ * @return\n+ * - 0 on success.\n+ * - Negative on error.\n+ */\n+int power_manager_init(void);\n+\n+/**\n+ * Exit power management. Must be called prior to exiting the application.\n+ *\n+ * @return\n+ * - 0 on success.\n+ * - Negative on error.\n+ */\n+int power_manager_exit(void);\n+\n+/**\n+ * Scale up the frequency of the cores specified in core_mask.\n+ * It is thread-safe.\n+ *\n+ * @param core_mask\n+ * The uint64_t bit-mask of cores to change frequency.\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_mask_up(uint64_t core_mask);\n+\n+/**\n+ * Scale down the frequency of the cores specified in core_mask.\n+ * It is thread-safe.\n+ *\n+ * @param core_mask\n+ * The uint64_t bit-mask of cores to change frequency.\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_mask_down(uint64_t core_mask);\n+\n+/**\n+ * Scale to the minimum frequency of the cores specified in core_mask.\n+ * It is thread-safe.\n+ *\n+ * @param core_mask\n+ * The uint64_t bit-mask of cores to change frequency.\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_mask_min(uint64_t core_mask);\n+\n+/**\n+ * Scale to the maximum frequency of the cores specified in core_mask.\n+ * It is thread-safe.\n+ *\n+ * @param core_mask\n+ * The uint64_t bit-mask of cores to change frequency.\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_mask_max(uint64_t core_mask);\n+\n+/**\n+ * Scale up frequency for the core specified by core_num.\n+ * It is thread-safe.\n+ *\n+ * @param core_num\n+ * The core number to change frequency\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_core_up(unsigned core_num);\n+\n+/**\n+ * Scale down frequency for the core specified by core_num.\n+ * It is thread-safe.\n+ *\n+ * @param core_num\n+ * The core number to change frequency\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_core_down(unsigned core_num);\n+\n+/**\n+ * Scale to minimum frequency for the core specified by core_num.\n+ * It is thread-safe.\n+ *\n+ * @param core_num\n+ * The core number to change frequency\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_core_min(unsigned core_num);\n+\n+/**\n+ * Scale to maximum frequency for the core specified by core_num.\n+ * It is thread-safe.\n+ *\n+ * @param core_num\n+ * The core number to change frequency\n+ *\n+ * @return\n+ * - 1 on success.\n+ * - 0 if frequency not changed.\n+ * - Negative on error.\n+ */\n+int power_manager_scale_core_max(unsigned core_num);\n+\n+/**\n+ * Get the current freuency of the core specified by core_num\n+ *\n+ * @param core_num\n+ * The core number to get the current frequency\n+ *\n+ * @return\n+ * - 0 on error\n+ * - >0 for current frequency.\n+ */\n+uint32_t power_manager_get_current_frequency(unsigned core_num);\n+\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+\n+#endif /* POWER_MANAGER_H_ */\n", "prefixes": [ "dpdk-dev", "03/10" ] }