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GET /api/patches/43923/?format=api
{ "id": 43923, "url": "https://patches.dpdk.org/api/patches/43923/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180828101240.12597-2-bluca@debian.org/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180828101240.12597-2-bluca@debian.org>", "list_archive_url": "https://inbox.dpdk.org/dev/20180828101240.12597-2-bluca@debian.org", "date": "2018-08-28T10:12:40", "name": "[v6,2/2] net/virtio: fix PCI config err handling", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3a034af88134b5c155c3fa301ecbf61208c04539", "submitter": { "id": 823, "url": "https://patches.dpdk.org/api/people/823/?format=api", "name": "Luca Boccassi", "email": "bluca@debian.org" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180828101240.12597-2-bluca@debian.org/mbox/", "series": [ { "id": 1077, "url": "https://patches.dpdk.org/api/series/1077/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1077", "date": "2018-08-28T10:12:39", "name": "[v6,1/2] bus/pci: harmonize and document rte_pci_read_config return value", "version": 6, "mbox": "https://patches.dpdk.org/series/1077/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/43923/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/43923/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 881BF4C9C;\n\tTue, 28 Aug 2018 12:13:08 +0200 (CEST)", "from mail-wr1-f68.google.com (mail-wr1-f68.google.com\n\t[209.85.221.68]) by dpdk.org (Postfix) with ESMTP id D15274C99\n\tfor <dev@dpdk.org>; Tue, 28 Aug 2018 12:13:07 +0200 (CEST)", "by mail-wr1-f68.google.com with SMTP id o37-v6so1017496wrf.6\n\tfor <dev@dpdk.org>; Tue, 28 Aug 2018 03:13:07 -0700 (PDT)", "from localhost ([2001:1be0:110d:fcfe:41aa:5bfa:6cf3:7531])\n\tby smtp.gmail.com with ESMTPSA id\n\tg126-v6sm2338103wmg.5.2018.08.28.03.13.06\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tTue, 28 Aug 2018 03:13:06 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=cSGVISiRIG2hk5dy+M5/DHquw92f06nMjW6X7nH3pkg=;\n\tb=JqXoe8Te9tSrkGLb5tS/V2G3JZxWrKXg9pOC3kBAx9mjWGSvdlJ46eNRwXeOwyJaVn\n\tvZnv1YqNj+7Tu0Xl6y1n1NGSp5LtclKGKwgWCAzvqaJSB+ahSFwBjf0Nxi1NB+dpa9Or\n\t2U5TVJvPjUxECgbHkK1bQofQKz7AAVuDtJF6R7xGuq6STj5wNOVU7gh6/xmtDWCd2Iq/\n\t61tWpiBlhpvPn3rytVrcZ+DtNKQHTl6lkWFyjwzO6LgrVVmRbL2M7uOhUocDHEn2AwTS\n\tmxD+TgkT9cSjpUZ0XZ/mSThhUpREr+DVCnFAUDdybEVMKcNsACK1iHyD8VJphpzZ6ruy\n\tlxzw==", "X-Gm-Message-State": "APzg51Bk0khI5sLl2X4Q+/VtduyUgwJKfCYyU2su3iU4lwF8mAZJa/3A\n\t9otymMSYcx8SvJDj0MZxlsawO2KH7EY=", "X-Google-Smtp-Source": "ANB0VdZFNr88R9v+i0qgYqwUdR0UTrZQk2GJLxIZkHKa6TNMH0nkeszTrUqwPQAkQLeeOuQXw9QWPg==", "X-Received": "by 2002:adf:f906:: with SMTP id\n\tb6-v6mr658531wrr.28.1535451187273; \n\tTue, 28 Aug 2018 03:13:07 -0700 (PDT)", "From": "Luca Boccassi <bluca@debian.org>", "To": "dev@dpdk.org", "Cc": "maxime.coquelin@redhat.com, zhihong.wang@intel.com, tiwei.bie@intel.com, \n\tbruce.richardson@intel.com, brian.russell@intl.att.com", "Date": "Tue, 28 Aug 2018 11:12:40 +0100", "Message-Id": "<20180828101240.12597-2-bluca@debian.org>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20180828101240.12597-1-bluca@debian.org>", "References": "<20180827165240.28322-1-bluca@debian.org>\n\t<20180828101240.12597-1-bluca@debian.org>", "Subject": "[dpdk-dev] [PATCH v6 2/2] net/virtio: fix PCI config err handling", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Brian Russell <brussell@brocade.com>\n\nIn virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns\nthe number of bytes read from PCI config or < 0 on error.\nIf less than the expected number of bytes are read then log the\nfailure and return rather than carrying on with garbage.\n\nFixes: 6ba1f63b5ab0 (\"virtio: support specification 1.0\")\n\nSigned-off-by: Brian Russell <brussell@brocade.com>\nSigned-off-by: Luca Boccassi <bluca@debian.org>\n---\nv2: handle additional rte_pci_read_config incomplete reads\nv3: do not handle rte_pci_read_config of virtio cap, added in v2,\n as it's less clear what the right thing to do there is\nv4: do a more robust check - first check what the vendor is, and\n skip the cap entirely if it's not what we are looking for.\nv5: fetch only 2 flags bytes if the vndr is PCI_CAP_ID_MSIX\nv6: fix 32bit build by changing the printf format specifier, fix patch title\n\n drivers/net/virtio/virtio_pci.c | 65 ++++++++++++++++++++++++---------\n 1 file changed, 48 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c\nindex 6bd22e54a6..b6a3c80b4d 100644\n--- a/drivers/net/virtio/virtio_pci.c\n+++ b/drivers/net/virtio/virtio_pci.c\n@@ -567,16 +567,18 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)\n \t}\n \n \tret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);\n-\tif (ret < 0) {\n-\t\tPMD_INIT_LOG(DEBUG, \"failed to read pci capability list\");\n+\tif (ret != 1) {\n+\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t \"failed to read pci capability list, ret %d\", ret);\n \t\treturn -1;\n \t}\n \n \twhile (pos) {\n-\t\tret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);\n-\t\tif (ret < 0) {\n-\t\t\tPMD_INIT_LOG(ERR,\n-\t\t\t\t\"failed to read pci cap at pos: %x\", pos);\n+\t\tret = rte_pci_read_config(dev, &cap, 2, pos);\n+\t\tif (ret != 2) {\n+\t\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t\t \"failed to read pci cap at pos: %x ret %d\",\n+\t\t\t\t pos, ret);\n \t\t\tbreak;\n \t\t}\n \n@@ -586,7 +588,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)\n \t\t\t * 1st byte is cap ID; 2nd byte is the position of next\n \t\t\t * cap; next two bytes are the flags.\n \t\t\t */\n-\t\t\tuint16_t flags = ((uint16_t *)&cap)[1];\n+\t\t\tuint16_t flags;\n+\n+\t\t\tret = rte_pci_read_config(dev, &flags, sizeof(flags),\n+\t\t\t\t\tpos + 2);\n+\t\t\tif (ret != sizeof(flags)) {\n+\t\t\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t\t\t \"failed to read pci cap at pos:\"\n+\t\t\t\t\t \" %x ret %d\", pos + 2, ret);\n+\t\t\t\tbreak;\n+\t\t\t}\n \n \t\t\tif (flags & PCI_MSIX_ENABLE)\n \t\t\t\thw->use_msix = VIRTIO_MSIX_ENABLED;\n@@ -601,6 +612,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)\n \t\t\tgoto next;\n \t\t}\n \n+\t\tret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);\n+\t\tif (ret != sizeof(cap)) {\n+\t\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t\t \"failed to read pci cap at pos: %x ret %d\",\n+\t\t\t\t pos, ret);\n+\t\t\tbreak;\n+\t\t}\n+\n \t\tPMD_INIT_LOG(DEBUG,\n \t\t\t\"[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u\",\n \t\t\tpos, cap.cfg_type, cap.bar, cap.offset, cap.length);\n@@ -689,25 +708,37 @@ enum virtio_msix_status\n vtpci_msix_detect(struct rte_pci_device *dev)\n {\n \tuint8_t pos;\n-\tstruct virtio_pci_cap cap;\n \tint ret;\n \n \tret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);\n-\tif (ret < 0) {\n-\t\tPMD_INIT_LOG(DEBUG, \"failed to read pci capability list\");\n+\tif (ret != 1) {\n+\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t \"failed to read pci capability list, ret %d\", ret);\n \t\treturn VIRTIO_MSIX_NONE;\n \t}\n \n \twhile (pos) {\n-\t\tret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);\n-\t\tif (ret < 0) {\n-\t\t\tPMD_INIT_LOG(ERR,\n-\t\t\t\t\"failed to read pci cap at pos: %x\", pos);\n+\t\tuint8_t cap[2];\n+\n+\t\tret = rte_pci_read_config(dev, cap, sizeof(cap), pos);\n+\t\tif (ret != sizeof(cap)) {\n+\t\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t\t \"failed to read pci cap at pos: %x ret %d\",\n+\t\t\t\t pos, ret);\n \t\t\tbreak;\n \t\t}\n \n-\t\tif (cap.cap_vndr == PCI_CAP_ID_MSIX) {\n-\t\t\tuint16_t flags = ((uint16_t *)&cap)[1];\n+\t\tif (cap[0] == PCI_CAP_ID_MSIX) {\n+\t\t\tuint16_t flags;\n+\n+\t\t\tret = rte_pci_read_config(dev, &flags, sizeof(flags),\n+\t\t\t\t\tpos + sizeof(cap));\n+\t\t\tif (ret != sizeof(flags)) {\n+\t\t\t\tPMD_INIT_LOG(DEBUG,\n+\t\t\t\t\t \"failed to read pci cap at pos:\"\n+\t\t\t\t\t \" %x ret %d\", pos + 2, ret);\n+\t\t\t\tbreak;\n+\t\t\t}\n \n \t\t\tif (flags & PCI_MSIX_ENABLE)\n \t\t\t\treturn VIRTIO_MSIX_ENABLED;\n@@ -715,7 +746,7 @@ vtpci_msix_detect(struct rte_pci_device *dev)\n \t\t\t\treturn VIRTIO_MSIX_DISABLED;\n \t\t}\n \n-\t\tpos = cap.cap_next;\n+\t\tpos = cap[1];\n \t}\n \n \treturn VIRTIO_MSIX_NONE;\n", "prefixes": [ "v6", "2/2" ] }