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GET /api/patches/41223/?format=api
{ "id": 41223, "url": "https://patches.dpdk.org/api/patches/41223/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1529300184-25109-1-git-send-email-rkudurumalla@caviumnetworks.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1529300184-25109-1-git-send-email-rkudurumalla@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1529300184-25109-1-git-send-email-rkudurumalla@caviumnetworks.com", "date": "2018-06-18T05:36:24", "name": "[V3] net/thunderx: add support for hardware first skip feature", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "55d0cfbd383812d7774986b57cc94dcf1d557f7f", "submitter": { "id": 1043, "url": "https://patches.dpdk.org/api/people/1043/?format=api", "name": "rkudurumalla", "email": "rkudurumalla@caviumnetworks.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1529300184-25109-1-git-send-email-rkudurumalla@caviumnetworks.com/mbox/", "series": [ { "id": 150, "url": "https://patches.dpdk.org/api/series/150/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=150", "date": "2018-06-18T05:36:24", "name": "[V3] net/thunderx: add support for hardware first skip feature", "version": 3, "mbox": "https://patches.dpdk.org/series/150/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/41223/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/41223/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4B7F75F24;\n\tMon, 18 Jun 2018 07:36:52 +0200 (CEST)", "from NAM04-SN1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr700058.outbound.protection.outlook.com [40.107.70.58])\n\tby dpdk.org (Postfix) with ESMTP id C30265F24\n\tfor <dev@dpdk.org>; Mon, 18 Jun 2018 07:36:50 +0200 (CEST)", "from rkudurumalla.caveonetworks.com (115.113.156.2) by\n\tDM2PR07MB672.namprd07.prod.outlook.com (2a01:111:e400:244d::24) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.863.19;\n\tMon, 18 Jun 2018 05:36:47 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=fDB1WDhz2+2ux4VjrQsamHyddbWW3vWYch2z7KFGkFs=;\n\tb=Yac87QNOvp3zwn8K+7DpRK3y2U8TU3xXwhzVOx2/xpB9w+H3gUhnTuGcgO1Wx8xGk6qGAWzM2w2s7vGCdWsz0WOJ3cnVhQCXYeZT8bdTRDvVBBu/CST4ClVrTKtFs6BiggnX0j59QoJqlZjnnarm4BTPV0XoUe2JefqFFlFYgsY=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Rakesh.Kudurumalla@cavium.com; ", "From": "Rakesh Kudurumalla <rkudurumalla@caviumnetworks.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com, jerin.jacob@caviumnetworks.com,\n\trkudurumalla <rkudurumalla@caviumnetworks.com>", "Date": "Mon, 18 Jun 2018 11:06:24 +0530", "Message-Id": "<1529300184-25109-1-git-send-email-rkudurumalla@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "PN1PR01CA0105.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:c00::21)\n\tTo DM2PR07MB672.namprd07.prod.outlook.com\n\t(2a01:111:e400:244d::24)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "e922a987-1c5f-4b7f-23b0-08d5d4dd7cb8", "X-Microsoft-Antispam": "UriScan:; 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SFP:1101; SCL:1; SRVR:DM2PR07MB672;\n\tH:rkudurumalla.caveonetworks.com; \n\tFPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "X-Microsoft-Antispam-Message-Info": "4JGeamZdEqyTUn/2votx+CPuVrMyk1OoS//FdY+wwiJxWe7cZU2bMWA+DyzFxlllFFaDPfmx3ilSdfIdfFIVrxZ0I4LJ6pz0h5VONmJ7yUOyC2+sSPz3vlc4G/n3DfGVbEJV8uaMLvkAtsjjiiDRKdfTF2v3qcMKYTO6IW085ub1TolDoVE2x5Yrfcbd8buXguW5O5RWcn8IawyNG57lGVntJtdL/2wGizDISsgcu+uhcL9uNfFwPt95wqEVbffs4t0WeRw6FUEYXEHu6YSKZ7PILx9VRCj8GH/9u6MRINkxYgFYo/x6yopczQX85bYXclhV8/TiWqlwT3WuVlxT9w==", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Jun 2018 05:36:47.3409\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "e922a987-1c5f-4b7f-23b0-08d5d4dd7cb8", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM2PR07MB672", "Subject": "[dpdk-dev] [PATCH V3] net/thunderx: add support for hardware first\n\tskip feature", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: rkudurumalla <rkudurumalla@caviumnetworks.com>\n\nThis feature is used to create a hole between HEADROOM\nand actual data.Size of hole is specified in bytes as\nmodule param to pmd\n\nSigned-off-by: Rakesh Kudurumalla <rkudurumalla@caviumnetworks.com>\n---\nV1: https://dpdk.org/ml/archives/dev/2018-May/103058.html\nV2: https://mails.dpdk.org/archives/dev/2018-June/104240.html\nV3: Updated code-block console with example in thunder.rst file\n\n doc/guides/nics/thunderx.rst | 21 ++++++++++\n drivers/net/thunderx/base/nicvf_hw.c | 12 ++++++\n drivers/net/thunderx/base/nicvf_hw.h | 1 +\n drivers/net/thunderx/nicvf_ethdev.c | 76 +++++++++++++++++++++++++++++++++++-\n drivers/net/thunderx/nicvf_ethdev.h | 1 +\n drivers/net/thunderx/nicvf_struct.h | 1 +\n 6 files changed, 111 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/thunderx.rst b/doc/guides/nics/thunderx.rst\nindex 2642374..e84eaaf 100644\n--- a/doc/guides/nics/thunderx.rst\n+++ b/doc/guides/nics/thunderx.rst\n@@ -30,6 +30,7 @@ Features of the ThunderX PMD are:\n - SR-IOV VF\n - NUMA support\n - Multi queue set support (up to 96 queues (12 queue sets)) per port\n+- Skip data bytes\n \n Supported ThunderX SoCs\n -----------------------\n@@ -312,6 +313,21 @@ We will choose four secondary queue sets from the ending of the list (0002:01:01\n \n The nicvf thunderx driver will make use of attached secondary VFs automatically during the interface configuration stage.\n \n+\n+Module params\n+--------------\n+\n+skip_data_bytes\n+~~~~~~~~~~~~~~~\n+This feature is used to create a hole between HEADROOM and actual data. Size of hole is specified\n+in bytes as module param(\"skip_data_bytes\") to pmd.\n+This scheme is useful when application would like to insert vlan header without disturbing HEADROOM.\n+\n+Example:\n+ .. code-block:: console\n+\n+ -w 0002:01:00.2,skip_data_bytes=8\n+\n Limitations\n -----------\n \n@@ -335,3 +351,8 @@ Maximum packet segments\n The ThunderX SoC family NICs support up to 12 segments per packet when working\n in scatter/gather mode. So, setting MTU will result with ``EINVAL`` when the\n frame size does not fit in the maximum number of segments.\n+\n+skip_data_bytes\n+~~~~~~~~~~~~~~~\n+\n+Maximum limit of skip_data_bytes is 128 bytes and number of bytes should be multiple of 8.\ndiff --git a/drivers/net/thunderx/base/nicvf_hw.c b/drivers/net/thunderx/base/nicvf_hw.c\nindex ea8092c..b07a293 100644\n--- a/drivers/net/thunderx/base/nicvf_hw.c\n+++ b/drivers/net/thunderx/base/nicvf_hw.c\n@@ -703,6 +703,18 @@ nicvf_vlan_hw_strip(struct nicvf *nic, bool enable)\n }\n \n void\n+nicvf_first_skip_config(struct nicvf *nic, uint8_t num_dwords)\n+{\n+\tuint64_t val;\n+\n+\tval = nicvf_reg_read(nic, NIC_VNIC_RQ_GEN_CFG);\n+\tval &= ~(0xfULL);\n+\tval |= (num_dwords & 0xf);\n+\n+\tnicvf_reg_write(nic, NIC_VNIC_RQ_GEN_CFG, val);\n+}\n+\n+void\n nicvf_apad_config(struct nicvf *nic, bool enable)\n {\n \tuint64_t val;\ndiff --git a/drivers/net/thunderx/base/nicvf_hw.h b/drivers/net/thunderx/base/nicvf_hw.h\nindex 284d0bd..fd13ea8 100644\n--- a/drivers/net/thunderx/base/nicvf_hw.h\n+++ b/drivers/net/thunderx/base/nicvf_hw.h\n@@ -193,6 +193,7 @@ uint32_t nicvf_qsize_sq_roundup(uint32_t val);\n void nicvf_vlan_hw_strip(struct nicvf *nic, bool enable);\n \n void nicvf_apad_config(struct nicvf *nic, bool enable);\n+void nicvf_first_skip_config(struct nicvf *nic, uint8_t dwords);\n \n int nicvf_rss_config(struct nicvf *nic, uint32_t qcnt, uint64_t cfg);\n int nicvf_rss_term(struct nicvf *nic);\ndiff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c\nindex 99fcd51..07e6a4d 100644\n--- a/drivers/net/thunderx/nicvf_ethdev.c\n+++ b/drivers/net/thunderx/nicvf_ethdev.c\n@@ -34,6 +34,8 @@\n #include <rte_pci.h>\n #include <rte_bus_pci.h>\n #include <rte_tailq.h>\n+#include <rte_devargs.h>\n+#include <rte_kvargs.h>\n \n #include \"base/nicvf_plat.h\"\n \n@@ -1230,6 +1232,7 @@ nicvf_rxq_mbuf_setup(struct nicvf_rxq *rxq)\n {\n \tuintptr_t p;\n \tstruct rte_mbuf mb_def;\n+\tstruct nicvf *nic = rxq->nic;\n \n \tRTE_BUILD_BUG_ON(sizeof(union mbuf_initializer) != 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) % 8 != 0);\n@@ -1240,7 +1243,7 @@ nicvf_rxq_mbuf_setup(struct nicvf_rxq *rxq)\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, port) -\n \t\t\t\toffsetof(struct rte_mbuf, data_off) != 6);\n \tmb_def.nb_segs = 1;\n-\tmb_def.data_off = RTE_PKTMBUF_HEADROOM;\n+\tmb_def.data_off = RTE_PKTMBUF_HEADROOM + (nic->skip_bytes);\n \tmb_def.port = rxq->port_id;\n \trte_mbuf_refcnt_set(&mb_def, 1);\n \n@@ -1260,9 +1263,19 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,\n \tstruct nicvf_rxq *rxq;\n \tstruct nicvf *nic = nicvf_pmd_priv(dev);\n \tuint64_t offloads;\n+\tuint32_t buffsz;\n+\tstruct rte_pktmbuf_pool_private *mbp_priv;\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\t/* First skip check */\n+\tmbp_priv = rte_mempool_get_priv(mp);\n+\tbuffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;\n+\tif (buffsz < (uint32_t)(nic->skip_bytes)) {\n+\t\tPMD_INIT_LOG(ERR, \"First skip is more than configured buffer size\");\n+\t\treturn -EINVAL;\n+\t}\n+\n \tif (qidx >= MAX_RCV_QUEUES_PER_QS)\n \t\tnic = nic->snicvf[qidx / MAX_RCV_QUEUES_PER_QS - 1];\n \n@@ -1298,6 +1311,7 @@ nicvf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,\n \t\treturn -EINVAL;\n \t}\n \n+\n \t/* Check rx_free_thresh upper bound */\n \trx_free_thresh = (uint16_t)((rx_conf->rx_free_thresh) ?\n \t\t\t\trx_conf->rx_free_thresh :\n@@ -1498,6 +1512,7 @@ nicvf_vf_start(struct rte_eth_dev *dev, struct nicvf *nic, uint32_t rbdrsz)\n \t\t\treturn -EINVAL;\n \t\t}\n \t\trxq->mbuf_phys_off -= data_off;\n+\t\trxq->mbuf_phys_off -= nic->skip_bytes;\n \n \t\tif (mbuf_phys_off == 0)\n \t\t\tmbuf_phys_off = rxq->mbuf_phys_off;\n@@ -1978,6 +1993,59 @@ static const struct eth_dev_ops nicvf_eth_dev_ops = {\n \t.get_reg = nicvf_dev_get_regs,\n };\n \n+static inline int\n+nicvf_set_first_skip(struct rte_eth_dev *dev)\n+{\n+\tint bytes_to_skip = 0;\n+\tint ret = 0;\n+\tunsigned int i;\n+\tstruct rte_kvargs *kvlist;\n+\tstatic const char *const skip[] = {\n+\t\tSKIP_DATA_BYTES,\n+\t\tNULL};\n+\tstruct nicvf *nic = nicvf_pmd_priv(dev);\n+\n+\tif (!dev->device->devargs) {\n+\t\tnicvf_first_skip_config(nic, 0);\n+\t\treturn ret;\n+\t}\n+\n+\tkvlist = rte_kvargs_parse(dev->device->devargs->args, skip);\n+\tif (!kvlist)\n+\t\treturn -EINVAL;\n+\n+\tif (kvlist->count == 0)\n+\t\tgoto exit;\n+\n+\tfor (i = 0; i != kvlist->count; ++i) {\n+\t\tconst struct rte_kvargs_pair *pair = &kvlist->pairs[i];\n+\n+\t\tif (!strcmp(pair->key, SKIP_DATA_BYTES))\n+\t\t\tbytes_to_skip = atoi(pair->value);\n+\t}\n+\n+\t/*128 bytes amounts to one cache line*/\n+\tif (bytes_to_skip >= 0 && bytes_to_skip < 128) {\n+\t\tif (!(bytes_to_skip % 8)) {\n+\t\t\tnicvf_first_skip_config(nic, (bytes_to_skip / 8));\n+\t\t\tnic->skip_bytes = bytes_to_skip;\n+\t\t\tgoto kvlist_free;\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(ERR, \"skip_data_bytes should be multiple of 8\");\n+\t\t\tret = -EINVAL;\n+\t\t\tgoto exit;\n+\t\t}\n+\t} else {\n+\t\tPMD_INIT_LOG(ERR, \"skip_data_bytes should be less than 128\");\n+\t\tret = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+exit:\n+\tnicvf_first_skip_config(nic, 0);\n+kvlist_free:\n+\trte_kvargs_free(kvlist);\n+\treturn ret;\n+}\n static int\n nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)\n {\n@@ -2087,6 +2155,11 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)\n \t\tgoto malloc_fail;\n \t}\n \n+\tret = nicvf_set_first_skip(eth_dev);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to configure first skip\");\n+\t\tgoto malloc_fail;\n+\t}\n \tPMD_INIT_LOG(INFO, \"Port %d (%x:%x) mac=%02x:%02x:%02x:%02x:%02x:%02x\",\n \t\teth_dev->data->port_id, nic->vendor_id, nic->device_id,\n \t\tnic->mac_addr[0], nic->mac_addr[1], nic->mac_addr[2],\n@@ -2159,3 +2232,4 @@ static struct rte_pci_driver rte_nicvf_pmd = {\n RTE_PMD_REGISTER_PCI(net_thunderx, rte_nicvf_pmd);\n RTE_PMD_REGISTER_PCI_TABLE(net_thunderx, pci_id_nicvf_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_thunderx, \"* igb_uio | uio_pci_generic | vfio-pci\");\n+RTE_PMD_REGISTER_PARAM_STRING(net_thunderx, SKIP_DATA_BYTES \"=<int>\");\ndiff --git a/drivers/net/thunderx/nicvf_ethdev.h b/drivers/net/thunderx/nicvf_ethdev.h\nindex ea8dccd..9af5088 100644\n--- a/drivers/net/thunderx/nicvf_ethdev.h\n+++ b/drivers/net/thunderx/nicvf_ethdev.h\n@@ -51,6 +51,7 @@\n \n #define VLAN_TAG_SIZE 4\t/* 802.3ac tag */\n \n+#define SKIP_DATA_BYTES \"skip_data_bytes\"\n static inline struct nicvf *\n nicvf_pmd_priv(struct rte_eth_dev *eth_dev)\n {\ndiff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h\nindex d4a83c3..cf98f7c 100644\n--- a/drivers/net/thunderx/nicvf_struct.h\n+++ b/drivers/net/thunderx/nicvf_struct.h\n@@ -99,6 +99,7 @@ struct nicvf {\n \tstruct rte_intr_handle intr_handle;\n \tuint8_t cpi_alg;\n \tuint16_t mtu;\n+\tint skip_bytes;\n \tbool vlan_filter_en;\n \tuint8_t mac_addr[ETHER_ADDR_LEN];\n \t/* secondary queue set support */\n", "prefixes": [ "V3" ] }