Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/41044/?format=api
{ "id": 41044, "url": "https://patches.dpdk.org/api/patches/41044/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1528892062-4997-12-git-send-email-tomaszx.jozwiak@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1528892062-4997-12-git-send-email-tomaszx.jozwiak@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1528892062-4997-12-git-send-email-tomaszx.jozwiak@intel.com", "date": "2018-06-13T12:13:55", "name": "[v3,11/38] crypto/qat: separate sym-specific from generic qp setup", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8d96f21cde639dcb574043da40c02ddc40b7c05b", "submitter": { "id": 949, "url": "https://patches.dpdk.org/api/people/949/?format=api", "name": "Tomasz Jozwiak", "email": "tomaszx.jozwiak@intel.com" }, "delegate": { "id": 22, "url": "https://patches.dpdk.org/api/users/22/?format=api", "username": "pdelarag", "first_name": "Pablo", "last_name": "de Lara Guarch", "email": "pablo.de.lara.guarch@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1528892062-4997-12-git-send-email-tomaszx.jozwiak@intel.com/mbox/", "series": [ { "id": 111, "url": "https://patches.dpdk.org/api/series/111/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=111", "date": "2018-06-13T12:13:44", "name": "crypto/qat: refactor to support multiple services", "version": 3, "mbox": "https://patches.dpdk.org/series/111/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/41044/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/41044/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 517121EF79;\n\tWed, 13 Jun 2018 14:14:50 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 459D81ED7B\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:14:42 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:42 -0700", "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:40 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727695\"", "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>", "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org", "Date": "Wed, 13 Jun 2018 14:13:55 +0200", "Message-Id": "<1528892062-4997-12-git-send-email-tomaszx.jozwiak@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>", "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 11/38] crypto/qat: separate sym-specific from\n\tgeneric qp setup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nExtracted all sym-specific code from qp setup fns, leaving\ngeneric qat_qp_setup fn and helper fns. Created a new\nmeta-data struct qat_qp_config to hold all the data needed\nto create a qp, filled this out in the sym-specific code\nand passed to the generic qp_setup fn.\nNo need now for rx and tx queue_create fns, one generic\nqueue_create fn replaces these.\nIncluded the service name (e.g. \"sym\") in the qp memzone\nand cookie pool names.\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n .../qat/qat_adf/adf_transport_access_macros.h | 2 +\n drivers/crypto/qat/qat_qp.c | 220 ++++++++++--------\n drivers/crypto/qat/qat_qp.h | 17 ++\n 3 files changed, 137 insertions(+), 102 deletions(-)", "diff": "diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h\nindex bfdbc979f..8b88b69de 100644\n--- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h\n+++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h\n@@ -52,6 +52,8 @@\n \n #define ADF_NUM_BUNDLES_PER_DEV 1\n #define ADF_NUM_SYM_QPS_PER_BUNDLE 2\n+#define ADF_RING_DIR_TX\t\t\t0\n+#define ADF_RING_DIR_RX\t\t\t1\n \n /* Valid internal msg size values */\n #define ADF_MSG_SIZE_32 0x01\ndiff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex 56ea10242..5a543f6cb 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -18,8 +18,8 @@\n \n #include \"adf_transport_access_macros.h\"\n \n-#define ADF_MAX_SYM_DESC\t\t\t4096\n-#define ADF_MIN_SYM_DESC\t\t\t128\n+#define ADF_MAX_DESC\t\t\t\t4096\n+#define ADF_MIN_DESC\t\t\t\t128\n #define ADF_SYM_TX_RING_DESC_SIZE\t\t128\n #define ADF_SYM_RX_RING_DESC_SIZE\t\t32\n #define ADF_SYM_TX_QUEUE_STARTOFF\t\t2\n@@ -34,16 +34,9 @@\n \n static int qat_qp_check_queue_alignment(uint64_t phys_addr,\n \tuint32_t queue_size_bytes);\n-static int qat_tx_queue_create(struct rte_cryptodev *dev,\n-\tstruct qat_queue *queue, uint8_t id, uint32_t nb_desc,\n-\tint socket_id);\n-static int qat_rx_queue_create(struct rte_cryptodev *dev,\n-\tstruct qat_queue *queue, uint8_t id, uint32_t nb_desc,\n-\tint socket_id);\n static void qat_queue_delete(struct qat_queue *queue);\n static int qat_queue_create(struct rte_cryptodev *dev,\n-\tstruct qat_queue *queue, uint32_t nb_desc, uint8_t desc_size,\n-\tint socket_id);\n+\tstruct qat_queue *queue, struct qat_qp_config *, uint8_t dir);\n static int adf_verify_queue_size(uint32_t msg_size, uint32_t msg_num,\n \tuint32_t *queue_size_for_csr);\n static void adf_configure_queues(struct qat_qp *queue);\n@@ -81,29 +74,19 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t queue_size,\n \t\tsocket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);\n }\n \n-int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n-\tconst struct rte_cryptodev_qp_conf *qp_conf,\n-\tint socket_id, struct rte_mempool *session_pool __rte_unused)\n+static int qat_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n+\t\tstruct qat_qp_config *qat_qp_conf)\n {\n \tstruct qat_qp *qp;\n \tstruct rte_pci_device *pci_dev;\n-\tint ret;\n \tchar op_cookie_pool_name[RTE_RING_NAMESIZE];\n \tuint32_t i;\n \n-\tPMD_INIT_FUNC_TRACE();\n \n-\t/* If qp is already in use free ring memory and qp metadata. */\n-\tif (dev->data->queue_pairs[queue_pair_id] != NULL) {\n-\t\tret = qat_sym_qp_release(dev, queue_pair_id);\n-\t\tif (ret < 0)\n-\t\t\treturn ret;\n-\t}\n-\n-\tif ((qp_conf->nb_descriptors > ADF_MAX_SYM_DESC) ||\n-\t\t(qp_conf->nb_descriptors < ADF_MIN_SYM_DESC)) {\n+\tif ((qat_qp_conf->nb_descriptors > ADF_MAX_DESC) ||\n+\t\t(qat_qp_conf->nb_descriptors < ADF_MIN_DESC)) {\n \t\tPMD_DRV_LOG(ERR, \"Can't create qp for %u descriptors\",\n-\t\t\t\tqp_conf->nb_descriptors);\n+\t\t\t\tqat_qp_conf->nb_descriptors);\n \t\treturn -EINVAL;\n \t}\n \n@@ -115,13 +98,6 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\treturn -EINVAL;\n \t}\n \n-\tif (queue_pair_id >=\n-\t\t\t(ADF_NUM_SYM_QPS_PER_BUNDLE *\n-\t\t\t\t\tADF_NUM_BUNDLES_PER_DEV)) {\n-\t\tPMD_DRV_LOG(ERR, \"qp_id %u invalid for this device\",\n-\t\t\t\tqueue_pair_id);\n-\t\treturn -EINVAL;\n-\t}\n \t/* Allocate the queue pair data structure. */\n \tqp = rte_zmalloc(\"qat PMD qp metadata\",\n \t\t\tsizeof(*qp), RTE_CACHE_LINE_SIZE);\n@@ -129,9 +105,9 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\tPMD_DRV_LOG(ERR, \"Failed to alloc mem for qp struct\");\n \t\treturn -ENOMEM;\n \t}\n-\tqp->nb_descriptors = qp_conf->nb_descriptors;\n+\tqp->nb_descriptors = qat_qp_conf->nb_descriptors;\n \tqp->op_cookies = rte_zmalloc(\"qat PMD op cookie pointer\",\n-\t\t\tqp_conf->nb_descriptors * sizeof(*qp->op_cookies),\n+\t\t\tqat_qp_conf->nb_descriptors * sizeof(*qp->op_cookies),\n \t\t\tRTE_CACHE_LINE_SIZE);\n \tif (qp->op_cookies == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to alloc mem for cookie\");\n@@ -142,15 +118,15 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \tqp->mmap_bar_addr = pci_dev->mem_resource[0].addr;\n \tqp->inflights16 = 0;\n \n-\tif (qat_tx_queue_create(dev, &(qp->tx_q),\n-\t\tqueue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) {\n+\tif (qat_queue_create(dev, &(qp->tx_q), qat_qp_conf,\n+\t\t\t\t\tADF_RING_DIR_TX) != 0) {\n \t\tPMD_INIT_LOG(ERR, \"Tx queue create failed \"\n \t\t\t\t\"queue_pair_id=%u\", queue_pair_id);\n \t\tgoto create_err;\n \t}\n \n-\tif (qat_rx_queue_create(dev, &(qp->rx_q),\n-\t\tqueue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) {\n+\tif (qat_queue_create(dev, &(qp->rx_q), qat_qp_conf,\n+\t\t\t\t\tADF_RING_DIR_RX) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Rx queue create failed \"\n \t\t\t\t\"queue_pair_id=%hu\", queue_pair_id);\n \t\tqat_queue_delete(&(qp->tx_q));\n@@ -159,16 +135,17 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \n \tadf_configure_queues(qp);\n \tadf_queue_arb_enable(&qp->tx_q, qp->mmap_bar_addr);\n-\tsnprintf(op_cookie_pool_name, RTE_RING_NAMESIZE, \"%s_qp_op_%d_%hu\",\n-\t\tpci_dev->driver->driver.name, dev->data->dev_id,\n-\t\tqueue_pair_id);\n+\n+\tsnprintf(op_cookie_pool_name, RTE_RING_NAMESIZE, \"%s_%s_qp_op_%d_%hu\",\n+\t\tpci_dev->driver->driver.name, qat_qp_conf->service_str,\n+\t\tdev->data->dev_id, queue_pair_id);\n \n \tqp->op_cookie_pool = rte_mempool_lookup(op_cookie_pool_name);\n \tif (qp->op_cookie_pool == NULL)\n \t\tqp->op_cookie_pool = rte_mempool_create(op_cookie_pool_name,\n \t\t\t\tqp->nb_descriptors,\n-\t\t\t\tsizeof(struct qat_sym_op_cookie), 64, 0,\n-\t\t\t\tNULL, NULL, NULL, NULL, socket_id,\n+\t\t\t\tqat_qp_conf->cookie_size, 64, 0,\n+\t\t\t\tNULL, NULL, NULL, NULL, qat_qp_conf->socket_id,\n \t\t\t\t0);\n \tif (!qp->op_cookie_pool) {\n \t\tPMD_DRV_LOG(ERR, \"QAT PMD Cannot create\"\n@@ -181,6 +158,67 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\t\tPMD_DRV_LOG(ERR, \"QAT PMD Cannot get op_cookie\");\n \t\t\tgoto create_err;\n \t\t}\n+\t}\n+\n+\tstruct qat_pmd_private *internals\n+\t\t= dev->data->dev_private;\n+\tqp->qat_dev_gen = internals->qat_dev_gen;\n+\tqp->build_request = qat_qp_conf->build_request;\n+\tqp->process_response = qat_qp_conf->process_response;\n+\n+\tdev->data->queue_pairs[queue_pair_id] = qp;\n+\treturn 0;\n+\n+create_err:\n+\trte_free(qp);\n+\treturn -EFAULT;\n+}\n+\n+\n+\n+int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n+\tconst struct rte_cryptodev_qp_conf *qp_conf,\n+\tint socket_id, struct rte_mempool *session_pool __rte_unused)\n+{\n+\tstruct qat_qp *qp;\n+\tint ret = 0;\n+\tuint32_t i;\n+\tstruct qat_qp_config qat_qp_conf;\n+\n+\t/* If qp is already in use free ring memory and qp metadata. */\n+\tif (dev->data->queue_pairs[qp_id] != NULL) {\n+\t\tret = qat_sym_qp_release(dev, qp_id);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t}\n+\tif (qp_id >= (ADF_NUM_SYM_QPS_PER_BUNDLE *\n+\t\t\t\t\tADF_NUM_BUNDLES_PER_DEV)) {\n+\t\tPMD_DRV_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\n+\tqat_qp_conf.hw_bundle_num = (qp_id/ADF_NUM_SYM_QPS_PER_BUNDLE);\n+\tqat_qp_conf.tx_ring_num = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +\n+\t\t\tADF_SYM_TX_QUEUE_STARTOFF;\n+\tqat_qp_conf.rx_ring_num = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +\n+\t\t\tADF_SYM_RX_QUEUE_STARTOFF;\n+\tqat_qp_conf.tx_msg_size = ADF_SYM_TX_RING_DESC_SIZE;\n+\tqat_qp_conf.rx_msg_size = ADF_SYM_RX_RING_DESC_SIZE;\n+\tqat_qp_conf.build_request = qat_sym_build_request;\n+\tqat_qp_conf.process_response = qat_sym_process_response;\n+\tqat_qp_conf.cookie_size = sizeof(struct qat_sym_op_cookie);\n+\tqat_qp_conf.nb_descriptors = qp_conf->nb_descriptors;\n+\tqat_qp_conf.socket_id = socket_id;\n+\tqat_qp_conf.service_str = \"sym\";\n+\n+\tret = qat_qp_setup(dev, qp_id, &qat_qp_conf);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tqp = (struct qat_qp *)dev->data->queue_pairs[qp_id];\n+\n+\tfor (i = 0; i < qp->nb_descriptors; i++) {\n \n \t\tstruct qat_sym_op_cookie *sql_cookie =\n \t\t\t\tqp->op_cookies[i];\n@@ -196,24 +234,11 @@ int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \t\t\t\tqat_sgl_list_dst);\n \t}\n \n-\tstruct qat_pmd_private *internals\n-\t\t= dev->data->dev_private;\n-\tqp->qat_dev_gen = internals->qat_dev_gen;\n-\tqp->build_request = qat_sym_build_request;\n-\tqp->process_response = qat_sym_process_response;\n+\treturn ret;\n \n-\tdev->data->queue_pairs[queue_pair_id] = qp;\n-\treturn 0;\n-\n-create_err:\n-\tif (qp->op_cookie_pool)\n-\t\trte_mempool_free(qp->op_cookie_pool);\n-\trte_free(qp->op_cookies);\n-\trte_free(qp);\n-\treturn -EFAULT;\n }\n \n-int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n+static int qat_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n {\n \tstruct qat_qp *qp =\n \t\t\t(struct qat_qp *)dev->data->queue_pairs[queue_pair_id];\n@@ -247,38 +272,13 @@ int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n \treturn 0;\n }\n \n-static int qat_tx_queue_create(struct rte_cryptodev *dev,\n-\tstruct qat_queue *queue, uint8_t qp_id,\n-\tuint32_t nb_desc, int socket_id)\n-{\n-\tPMD_INIT_FUNC_TRACE();\n-\tqueue->hw_bundle_number = qp_id/ADF_NUM_SYM_QPS_PER_BUNDLE;\n-\tqueue->hw_queue_number = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +\n-\t\t\t\t\t\tADF_SYM_TX_QUEUE_STARTOFF;\n-\tPMD_DRV_LOG(DEBUG, \"TX ring for %u msgs: qp_id %d, bundle %u, ring %u\",\n-\t\tnb_desc, qp_id, queue->hw_bundle_number,\n-\t\tqueue->hw_queue_number);\n-\n-\treturn qat_queue_create(dev, queue, nb_desc,\n-\t\t\t\tADF_SYM_TX_RING_DESC_SIZE, socket_id);\n-}\n \n-static int qat_rx_queue_create(struct rte_cryptodev *dev,\n-\t\tstruct qat_queue *queue, uint8_t qp_id, uint32_t nb_desc,\n-\t\tint socket_id)\n+int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n {\n-\tPMD_INIT_FUNC_TRACE();\n-\tqueue->hw_bundle_number = qp_id/ADF_NUM_SYM_QPS_PER_BUNDLE;\n-\tqueue->hw_queue_number = (qp_id%ADF_NUM_SYM_QPS_PER_BUNDLE) +\n-\t\t\t\t\t\tADF_SYM_RX_QUEUE_STARTOFF;\n-\n-\tPMD_DRV_LOG(DEBUG, \"RX ring for %u msgs: qp id %d, bundle %u, ring %u\",\n-\t\tnb_desc, qp_id, queue->hw_bundle_number,\n-\t\tqueue->hw_queue_number);\n-\treturn qat_queue_create(dev, queue, nb_desc,\n-\t\t\t\tADF_SYM_RX_RING_DESC_SIZE, socket_id);\n+\treturn qat_qp_release(dev, queue_pair_id);\n }\n \n+\n static void qat_queue_delete(struct qat_queue *queue)\n {\n \tconst struct rte_memzone *mz;\n@@ -304,15 +304,21 @@ static void qat_queue_delete(struct qat_queue *queue)\n \n static int\n qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,\n-\t\tuint32_t nb_desc, uint8_t desc_size, int socket_id)\n+\t\tstruct qat_qp_config *qp_conf, uint8_t dir)\n {\n \tuint64_t queue_base;\n \tvoid *io_addr;\n \tconst struct rte_memzone *qp_mz;\n-\tuint32_t queue_size_bytes = nb_desc*desc_size;\n \tstruct rte_pci_device *pci_dev;\n+\tint ret = 0;\n+\tuint16_t desc_size = (dir == ADF_RING_DIR_TX ?\n+\t\t\t\tqp_conf->tx_msg_size : qp_conf->rx_msg_size);\n+\tuint32_t queue_size_bytes = (qp_conf->nb_descriptors)*(desc_size);\n+\n+\tqueue->hw_bundle_number = qp_conf->hw_bundle_num;\n+\tqueue->hw_queue_number = (dir == ADF_RING_DIR_TX ?\n+\t\t\tqp_conf->tx_ring_num : qp_conf->rx_ring_num);\n \n-\tPMD_INIT_FUNC_TRACE();\n \tif (desc_size > ADF_MSG_SIZE_TO_BYTES(ADF_MAX_MSG_SIZE)) {\n \t\tPMD_DRV_LOG(ERR, \"Invalid descriptor size %d\", desc_size);\n \t\treturn -EINVAL;\n@@ -323,11 +329,13 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,\n \t/*\n \t * Allocate a memzone for the queue - create a unique name.\n \t */\n-\tsnprintf(queue->memz_name, sizeof(queue->memz_name), \"%s_%s_%d_%d_%d\",\n-\t\tpci_dev->driver->driver.name, \"qp_mem\", dev->data->dev_id,\n+\tsnprintf(queue->memz_name, sizeof(queue->memz_name),\n+\t\t\"%s_%s_%s_%d_%d_%d\",\n+\t\tpci_dev->driver->driver.name, qp_conf->service_str,\n+\t\t\"qp_mem\", dev->data->dev_id,\n \t\tqueue->hw_bundle_number, queue->hw_queue_number);\n \tqp_mz = queue_dma_zone_reserve(queue->memz_name, queue_size_bytes,\n-\t\t\tsocket_id);\n+\t\t\tqp_conf->socket_id);\n \tif (qp_mz == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to allocate ring memzone\");\n \t\treturn -ENOMEM;\n@@ -340,27 +348,31 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,\n \t\tPMD_DRV_LOG(ERR, \"Invalid alignment on queue create \"\n \t\t\t\t\t\" 0x%\"PRIx64\"\\n\",\n \t\t\t\t\tqueue->base_phys_addr);\n-\t\treturn -EFAULT;\n+\t\tret = -EFAULT;\n+\t\tgoto queue_create_err;\n \t}\n \n-\tif (adf_verify_queue_size(desc_size, nb_desc, &(queue->queue_size))\n-\t\t\t!= 0) {\n+\tif (adf_verify_queue_size(desc_size, qp_conf->nb_descriptors,\n+\t\t\t&(queue->queue_size)) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Invalid num inflights\");\n-\t\treturn -EINVAL;\n+\t\tret = -EINVAL;\n+\t\tgoto queue_create_err;\n \t}\n \n \tqueue->max_inflights = ADF_MAX_INFLIGHTS(queue->queue_size,\n \t\t\t\t\tADF_BYTES_TO_MSG_SIZE(desc_size));\n \tqueue->modulo = ADF_RING_SIZE_MODULO(queue->queue_size);\n-\tPMD_DRV_LOG(DEBUG, \"RING size in CSR: %u, in bytes %u, nb msgs %u,\"\n-\t\t\t\t\" msg_size %u, max_inflights %u modulo %u\",\n-\t\t\t\tqueue->queue_size, queue_size_bytes,\n-\t\t\t\tnb_desc, desc_size, queue->max_inflights,\n-\t\t\t\tqueue->modulo);\n+\tPMD_DRV_LOG(DEBUG, \"RING: Name:%s, size in CSR: %u, in bytes %u,\"\n+\t\t\t\" nb msgs %u, msg_size %u, max_inflights %u modulo %u\",\n+\t\t\tqueue->memz_name,\n+\t\t\tqueue->queue_size, queue_size_bytes,\n+\t\t\tqp_conf->nb_descriptors, desc_size,\n+\t\t\tqueue->max_inflights, queue->modulo);\n \n \tif (queue->max_inflights < 2) {\n \t\tPMD_DRV_LOG(ERR, \"Invalid num inflights\");\n-\t\treturn -EINVAL;\n+\t\tret = -EINVAL;\n+\t\tgoto queue_create_err;\n \t}\n \tqueue->head = 0;\n \tqueue->tail = 0;\n@@ -379,6 +391,10 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,\n \tWRITE_CSR_RING_BASE(io_addr, queue->hw_bundle_number,\n \t\t\tqueue->hw_queue_number, queue_base);\n \treturn 0;\n+\n+queue_create_err:\n+\trte_memzone_free(qp_mz);\n+\treturn ret;\n }\n \n static int qat_qp_check_queue_alignment(uint64_t phys_addr,\ndiff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h\nindex 87d55c5f2..edebb8773 100644\n--- a/drivers/crypto/qat/qat_qp.h\n+++ b/drivers/crypto/qat/qat_qp.h\n@@ -16,6 +16,23 @@ typedef int (*process_response_t)(void **ops,\n \t\tenum qat_device_gen qat_dev_gen);\n /**< Process a response descriptor and return the associated op. */\n \n+/**\n+ * Structure with data needed for creation of queue pair.\n+ */\n+struct qat_qp_config {\n+\tuint8_t hw_bundle_num;\n+\tuint8_t tx_ring_num;\n+\tuint8_t rx_ring_num;\n+\tuint16_t tx_msg_size;\n+\tuint16_t rx_msg_size;\n+\tuint32_t nb_descriptors;\n+\tuint32_t cookie_size;\n+\tint socket_id;\n+\tbuild_request_t build_request;\n+\tprocess_response_t process_response;\n+\tconst char *service_str;\n+};\n+\n /**\n * Structure associated with each queue.\n */\n", "prefixes": [ "v3", "11/38" ] }