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GET /api/patches/41039/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 41039,
    "url": "https://patches.dpdk.org/api/patches/41039/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1528892062-4997-7-git-send-email-tomaszx.jozwiak@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1528892062-4997-7-git-send-email-tomaszx.jozwiak@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1528892062-4997-7-git-send-email-tomaszx.jozwiak@intel.com",
    "date": "2018-06-13T12:13:50",
    "name": "[v3,06/38] crypto/qat: rename fns for consistency",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "da74b4a04006bf28ab0342a80d0bd7b5ad11cf84",
    "submitter": {
        "id": 949,
        "url": "https://patches.dpdk.org/api/people/949/?format=api",
        "name": "Tomasz Jozwiak",
        "email": "tomaszx.jozwiak@intel.com"
    },
    "delegate": {
        "id": 22,
        "url": "https://patches.dpdk.org/api/users/22/?format=api",
        "username": "pdelarag",
        "first_name": "Pablo",
        "last_name": "de Lara Guarch",
        "email": "pablo.de.lara.guarch@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1528892062-4997-7-git-send-email-tomaszx.jozwiak@intel.com/mbox/",
    "series": [
        {
            "id": 111,
            "url": "https://patches.dpdk.org/api/series/111/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=111",
            "date": "2018-06-13T12:13:44",
            "name": "crypto/qat: refactor to support multiple services",
            "version": 3,
            "mbox": "https://patches.dpdk.org/series/111/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/41039/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/41039/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0A6491EF35;\n\tWed, 13 Jun 2018 14:14:40 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 8916E1EE58\n\tfor <dev@dpdk.org>; Wed, 13 Jun 2018 14:14:35 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t13 Jun 2018 05:14:35 -0700",
            "from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain)\n\t([10.103.104.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:33 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.51,218,1526367600\"; d=\"scan'208\";a=\"63727662\"",
        "From": "Tomasz Jozwiak <tomaszx.jozwiak@intel.com>",
        "To": "fiona.trahe@intel.com,\n\ttomaszx.jozwiak@intel.com,\n\tdev@dpdk.org",
        "Date": "Wed, 13 Jun 2018 14:13:50 +0200",
        "Message-Id": "<1528892062-4997-7-git-send-email-tomaszx.jozwiak@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "References": "<1523040732-3290-1-git-send-email-fiona.trahe@intel.com>\n\t<1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 06/38] crypto/qat: rename fns for consistency",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Fiona Trahe <fiona.trahe@intel.com>\n\nRename fn names to shorten them, i.e.\n  qat_crypto_sym_xxx to qat_sym_xxx\n  _content_desc_ to _cd_\nRenaming symmetric crypto specific with consistent names:\n  qat_crypto_set_session_parameters->qat_sym_set_session_parameters\n  qat_write_hw_desc_entry()->qat_sym_build_request()\n  qat_alg_xxx ->qat_sym_xxx\n  qat_sym_xxx_session_yyy()->qat_sym_session_xxx_yyy()\nRemoved unused prototypes:\n  qat_get_inter_state_size()\n  qat_pmd_session_mempool_create()\nRemoved 2 unnecessary extern declarations\n\nSigned-off-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/crypto/qat/qat_device.c        |   2 +-\n drivers/crypto/qat/qat_device.h        |   2 +-\n drivers/crypto/qat/qat_qp.c            |   6 +-\n drivers/crypto/qat/qat_sym.c           |  14 +--\n drivers/crypto/qat/qat_sym.h           |  22 ++---\n drivers/crypto/qat/qat_sym_session.c   | 131 ++++++++++++-------------\n drivers/crypto/qat/qat_sym_session.h   |  53 +++++-----\n drivers/crypto/qat/rte_qat_cryptodev.c |  18 ++--\n 8 files changed, 123 insertions(+), 125 deletions(-)",
    "diff": "diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c\nindex c2bf9b7a7..ac6bd1af6 100644\n--- a/drivers/crypto/qat/qat_device.c\n+++ b/drivers/crypto/qat/qat_device.c\n@@ -30,7 +30,7 @@ int qat_dev_close(struct rte_cryptodev *dev)\n \tPMD_INIT_FUNC_TRACE();\n \n \tfor (i = 0; i < dev->data->nb_queue_pairs; i++) {\n-\t\tret = qat_crypto_sym_qp_release(dev, i);\n+\t\tret = qat_sym_qp_release(dev, i);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t}\ndiff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h\nindex 5c48fdb93..2cb8e7612 100644\n--- a/drivers/crypto/qat/qat_device.h\n+++ b/drivers/crypto/qat/qat_device.h\n@@ -11,7 +11,7 @@\n \n extern uint8_t cryptodev_qat_driver_id;\n \n-extern int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,\n+extern int qat_sym_qp_release(struct rte_cryptodev *dev,\n \tuint16_t queue_pair_id);\n \n /** private data structure for each QAT device */\ndiff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c\nindex 794a8d7c9..23a9d5f01 100644\n--- a/drivers/crypto/qat/qat_qp.c\n+++ b/drivers/crypto/qat/qat_qp.c\n@@ -79,7 +79,7 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t queue_size,\n \t\tsocket_id, RTE_MEMZONE_IOVA_CONTIG, queue_size);\n }\n \n-int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n+int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \tconst struct rte_cryptodev_qp_conf *qp_conf,\n \tint socket_id, struct rte_mempool *session_pool __rte_unused)\n {\n@@ -93,7 +93,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \n \t/* If qp is already in use free ring memory and qp metadata. */\n \tif (dev->data->queue_pairs[queue_pair_id] != NULL) {\n-\t\tret = qat_crypto_sym_qp_release(dev, queue_pair_id);\n+\t\tret = qat_sym_qp_release(dev, queue_pair_id);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t}\n@@ -209,7 +209,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \treturn -EFAULT;\n }\n \n-int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n+int qat_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)\n {\n \tstruct qat_qp *qp =\n \t\t\t(struct qat_qp *)dev->data->queue_pairs[queue_pair_id];\ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex f5d542ae3..ae521c2b1 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -87,7 +87,7 @@ static inline uint32_t\n adf_modulo(uint32_t data, uint32_t shift);\n \n static inline int\n-qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n+qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\tstruct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp);\n \n static inline uint32_t\n@@ -210,7 +210,7 @@ txq_write_tail(struct qat_qp *qp, struct qat_queue *q) {\n }\n \n uint16_t\n-qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n+qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t\tuint16_t nb_ops)\n {\n \tregister struct qat_queue *queue;\n@@ -242,7 +242,7 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t}\n \n \twhile (nb_ops_sent != nb_ops_possible) {\n-\t\tret = qat_write_hw_desc_entry(*cur_op, base_addr + tail,\n+\t\tret = qat_sym_build_request(*cur_op, base_addr + tail,\n \t\t\ttmp_qp->op_cookies[tail / queue->msg_size], tmp_qp);\n \t\tif (ret != 0) {\n \t\t\ttmp_qp->stats.enqueue_err_count++;\n@@ -299,7 +299,7 @@ void rxq_free_desc(struct qat_qp *qp, struct qat_queue *q)\n }\n \n uint16_t\n-qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n+qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t\tuint16_t nb_ops)\n {\n \tstruct qat_queue *rx_queue, *tx_queue;\n@@ -456,7 +456,7 @@ set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,\n }\n \n static inline int\n-qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg,\n+qat_sym_build_request(struct rte_crypto_op *op, uint8_t *out_msg,\n \t\tstruct qat_crypto_op_cookie *qat_op_cookie, struct qat_qp *qp)\n {\n \tint ret = 0;\n@@ -883,7 +883,7 @@ static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)\n \treturn data - mult;\n }\n \n-void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,\n+void qat_sym_stats_get(struct rte_cryptodev *dev,\n \t\tstruct rte_cryptodev_stats *stats)\n {\n \tint i;\n@@ -907,7 +907,7 @@ void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,\n \t}\n }\n \n-void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)\n+void qat_sym_stats_reset(struct rte_cryptodev *dev)\n {\n \tint i;\n \tstruct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);\ndiff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h\nindex e3873171c..811ba8619 100644\n--- a/drivers/crypto/qat/qat_sym.h\n+++ b/drivers/crypto/qat/qat_sym.h\n@@ -2,8 +2,8 @@\n  * Copyright(c) 2015-2018 Intel Corporation\n  */\n \n-#ifndef _QAT_CRYPTO_H_\n-#define _QAT_CRYPTO_H_\n+#ifndef _QAT_SYM_H_\n+#define _QAT_SYM_H_\n \n #include <rte_cryptodev_pmd.h>\n #include <rte_memzone.h>\n@@ -65,23 +65,23 @@ struct qat_qp {\n \tenum qat_device_gen qat_dev_gen;\n } __rte_cache_aligned;\n \n-void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,\n+void qat_sym_stats_get(struct rte_cryptodev *dev,\n \tstruct rte_cryptodev_stats *stats);\n-void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev);\n+void qat_sym_stats_reset(struct rte_cryptodev *dev);\n \n-int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n+int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,\n \tconst struct rte_cryptodev_qp_conf *rx_conf, int socket_id,\n \tstruct rte_mempool *session_pool);\n-int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,\n+int qat_sym_qp_release(struct rte_cryptodev *dev,\n \tuint16_t queue_pair_id);\n \n \n-extern uint16_t\n-qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n+uint16_t\n+qat_sym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t\tuint16_t nb_ops);\n \n-extern uint16_t\n-qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n+uint16_t\n+qat_sym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,\n \t\tuint16_t nb_ops);\n \n-#endif /* _QAT_CRYPTO_H_ */\n+#endif /* _QAT_SYM_H_ */\ndiff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c\nindex 5caac5a6f..f598d1461 100644\n--- a/drivers/crypto/qat/qat_sym_session.c\n+++ b/drivers/crypto/qat/qat_sym_session.c\n@@ -105,7 +105,7 @@ qat_is_auth_alg_supported(enum rte_crypto_auth_algorithm algo,\n }\n \n void\n-qat_crypto_sym_clear_session(struct rte_cryptodev *dev,\n+qat_sym_session_clear(struct rte_cryptodev *dev,\n \t\tstruct rte_cryptodev_sym_session *sess)\n {\n \tPMD_INIT_FUNC_TRACE();\n@@ -116,7 +116,7 @@ qat_crypto_sym_clear_session(struct rte_cryptodev *dev,\n \tif (sess_priv) {\n \t\tif (s->bpi_ctx)\n \t\t\tbpi_cipher_ctx_free(s->bpi_ctx);\n-\t\tmemset(s, 0, qat_crypto_sym_get_session_private_size(dev));\n+\t\tmemset(s, 0, qat_sym_session_get_private_size(dev));\n \t\tstruct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);\n \n \t\tset_session_private_data(sess, index, NULL);\n@@ -197,7 +197,7 @@ qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)\n }\n \n int\n-qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n+qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n \t\tstruct qat_session *session)\n {\n@@ -213,7 +213,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \n \tswitch (cipher_xform->algo) {\n \tcase RTE_CRYPTO_CIPHER_AES_CBC:\n-\t\tif (qat_alg_validate_aes_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_aes_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -222,7 +222,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_AES_CTR:\n-\t\tif (qat_alg_validate_aes_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_aes_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -231,7 +231,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_SNOW3G_UEA2:\n-\t\tif (qat_alg_validate_snow3g_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_snow3g_key(cipher_xform->key.length,\n \t\t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid SNOW 3G cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -243,7 +243,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_KASUMI_F8:\n-\t\tif (qat_alg_validate_kasumi_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_kasumi_key(cipher_xform->key.length,\n \t\t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid KASUMI cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -252,7 +252,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_3DES_CBC:\n-\t\tif (qat_alg_validate_3des_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_3des_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid 3DES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -261,7 +261,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_DES_CBC:\n-\t\tif (qat_alg_validate_des_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_des_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid DES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -270,7 +270,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_3DES_CTR:\n-\t\tif (qat_alg_validate_3des_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_3des_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid 3DES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -288,7 +288,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\t\tPMD_DRV_LOG(ERR, \"failed to create DES BPI ctx\");\n \t\t\tgoto error_out;\n \t\t}\n-\t\tif (qat_alg_validate_des_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_des_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid DES cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -306,7 +306,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\t\tPMD_DRV_LOG(ERR, \"failed to create AES BPI ctx\");\n \t\t\tgoto error_out;\n \t\t}\n-\t\tif (qat_alg_validate_aes_docsisbpi_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_aes_docsisbpi_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES DOCSISBPI key size\");\n \t\t\tret = -EINVAL;\n@@ -323,7 +323,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \t\t\tret = -ENOTSUP;\n \t\t\tgoto error_out;\n \t\t}\n-\t\tif (qat_alg_validate_zuc_key(cipher_xform->key.length,\n+\t\tif (qat_sym_validate_zuc_key(cipher_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid ZUC cipher key size\");\n \t\t\tret = -EINVAL;\n@@ -352,7 +352,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n \telse\n \t\tsession->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;\n \n-\tif (qat_alg_aead_session_create_content_desc_cipher(session,\n+\tif (qat_sym_session_aead_create_cd_cipher(session,\n \t\t\t\t\t\tcipher_xform->key.data,\n \t\t\t\t\t\tcipher_xform->key.length)) {\n \t\tret = -EINVAL;\n@@ -370,7 +370,7 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n }\n \n int\n-qat_crypto_sym_configure_session(struct rte_cryptodev *dev,\n+qat_sym_session_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n \t\tstruct rte_cryptodev_sym_session *sess,\n \t\tstruct rte_mempool *mempool)\n@@ -384,7 +384,7 @@ qat_crypto_sym_configure_session(struct rte_cryptodev *dev,\n \t\treturn -ENOMEM;\n \t}\n \n-\tret = qat_crypto_set_session_parameters(dev, xform, sess_private_data);\n+\tret = qat_sym_session_set_parameters(dev, xform, sess_private_data);\n \tif (ret != 0) {\n \t\tPMD_DRV_LOG(ERR,\n \t\t    \"Crypto QAT PMD: failed to configure session parameters\");\n@@ -401,7 +401,7 @@ qat_crypto_sym_configure_session(struct rte_cryptodev *dev,\n }\n \n int\n-qat_crypto_set_session_parameters(struct rte_cryptodev *dev,\n+qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform, void *session_private)\n {\n \tstruct qat_session *session = session_private;\n@@ -425,29 +425,27 @@ qat_crypto_set_session_parameters(struct rte_cryptodev *dev,\n \tsession->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;\n \tswitch (session->qat_cmd) {\n \tcase ICP_QAT_FW_LA_CMD_CIPHER:\n-\t\tret = qat_crypto_sym_configure_session_cipher(dev,\n-\t\t\t\t\t\t\txform, session);\n+\t\tret = qat_sym_session_configure_cipher(dev, xform, session);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t\tbreak;\n \tcase ICP_QAT_FW_LA_CMD_AUTH:\n-\t\tret = qat_crypto_sym_configure_session_auth(dev,\n-\t\t\t\t\t\t\txform, session);\n+\t\tret = qat_sym_session_configure_auth(dev, xform, session);\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t\tbreak;\n \tcase ICP_QAT_FW_LA_CMD_CIPHER_HASH:\n \t\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {\n-\t\t\tret = qat_crypto_sym_configure_session_aead(xform,\n+\t\t\tret = qat_sym_session_configure_aead(xform,\n \t\t\t\t\tsession);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n \t\t} else {\n-\t\t\tret = qat_crypto_sym_configure_session_cipher(dev,\n+\t\t\tret = qat_sym_session_configure_cipher(dev,\n \t\t\t\t\txform, session);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n-\t\t\tret = qat_crypto_sym_configure_session_auth(dev,\n+\t\t\tret = qat_sym_session_configure_auth(dev,\n \t\t\t\t\txform, session);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n@@ -455,16 +453,16 @@ qat_crypto_set_session_parameters(struct rte_cryptodev *dev,\n \t\tbreak;\n \tcase ICP_QAT_FW_LA_CMD_HASH_CIPHER:\n \t\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {\n-\t\t\tret = qat_crypto_sym_configure_session_aead(xform,\n+\t\t\tret = qat_sym_session_configure_aead(xform,\n \t\t\t\t\tsession);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n \t\t} else {\n-\t\t\tret = qat_crypto_sym_configure_session_auth(dev,\n+\t\t\tret = qat_sym_session_configure_auth(dev,\n \t\t\t\t\txform, session);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n-\t\t\tret = qat_crypto_sym_configure_session_cipher(dev,\n+\t\t\tret = qat_sym_session_configure_cipher(dev,\n \t\t\t\t\txform, session);\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n@@ -492,7 +490,7 @@ qat_crypto_set_session_parameters(struct rte_cryptodev *dev,\n }\n \n int\n-qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n+qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t\t\tstruct rte_crypto_sym_xform *xform,\n \t\t\t\tstruct qat_session *session)\n {\n@@ -521,7 +519,7 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;\n \t\tbreak;\n \tcase RTE_CRYPTO_AUTH_AES_GMAC:\n-\t\tif (qat_alg_validate_aes_key(auth_xform->key.length,\n+\t\tif (qat_sym_validate_aes_key(auth_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES key size\");\n \t\t\treturn -EINVAL;\n@@ -579,14 +577,13 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n \t\t\t * It needs to create cipher desc content first,\n \t\t\t * then authentication\n \t\t\t */\n-\t\t\tif (qat_alg_aead_session_create_content_desc_cipher(\n-\t\t\t\t\t\tsession,\n+\n+\t\t\tif (qat_sym_session_aead_create_cd_cipher(session,\n \t\t\t\t\t\tauth_xform->key.data,\n \t\t\t\t\t\tauth_xform->key.length))\n \t\t\t\treturn -EINVAL;\n \n-\t\t\tif (qat_alg_aead_session_create_content_desc_auth(\n-\t\t\t\t\t\tsession,\n+\t\t\tif (qat_sym_session_aead_create_cd_auth(session,\n \t\t\t\t\t\tkey_data,\n \t\t\t\t\t\tkey_length,\n \t\t\t\t\t\t0,\n@@ -600,8 +597,8 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n \t\t\t * It needs to create authentication desc content first,\n \t\t\t * then cipher\n \t\t\t */\n-\t\t\tif (qat_alg_aead_session_create_content_desc_auth(\n-\t\t\t\t\tsession,\n+\n+\t\t\tif (qat_sym_session_aead_create_cd_auth(session,\n \t\t\t\t\tkey_data,\n \t\t\t\t\tkey_length,\n \t\t\t\t\t0,\n@@ -609,8 +606,7 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n \t\t\t\t\tauth_xform->op))\n \t\t\t\treturn -EINVAL;\n \n-\t\t\tif (qat_alg_aead_session_create_content_desc_cipher(\n-\t\t\t\t\t\tsession,\n+\t\t\tif (qat_sym_session_aead_create_cd_cipher(session,\n \t\t\t\t\t\tauth_xform->key.data,\n \t\t\t\t\t\tauth_xform->key.length))\n \t\t\t\treturn -EINVAL;\n@@ -618,7 +614,7 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n \t\t/* Restore to authentication only only */\n \t\tsession->qat_cmd = ICP_QAT_FW_LA_CMD_AUTH;\n \t} else {\n-\t\tif (qat_alg_aead_session_create_content_desc_auth(session,\n+\t\tif (qat_sym_session_aead_create_cd_auth(session,\n \t\t\t\tkey_data,\n \t\t\t\tkey_length,\n \t\t\t\t0,\n@@ -632,7 +628,7 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n }\n \n int\n-qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n+qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,\n \t\t\t\tstruct qat_session *session)\n {\n \tstruct rte_crypto_aead_xform *aead_xform = &xform->aead;\n@@ -647,7 +643,7 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \n \tswitch (aead_xform->algo) {\n \tcase RTE_CRYPTO_AEAD_AES_GCM:\n-\t\tif (qat_alg_validate_aes_key(aead_xform->key.length,\n+\t\tif (qat_sym_validate_aes_key(aead_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES key size\");\n \t\t\treturn -EINVAL;\n@@ -656,7 +652,7 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;\n \t\tbreak;\n \tcase RTE_CRYPTO_AEAD_AES_CCM:\n-\t\tif (qat_alg_validate_aes_key(aead_xform->key.length,\n+\t\tif (qat_sym_validate_aes_key(aead_xform->key.length,\n \t\t\t\t&session->qat_cipher_alg) != 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"Invalid AES key size\");\n \t\t\treturn -EINVAL;\n@@ -682,12 +678,12 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \t\tcrypto_operation = aead_xform->algo == RTE_CRYPTO_AEAD_AES_GCM ?\n \t\t\tRTE_CRYPTO_AUTH_OP_GENERATE : RTE_CRYPTO_AUTH_OP_VERIFY;\n \n-\t\tif (qat_alg_aead_session_create_content_desc_cipher(session,\n+\t\tif (qat_sym_session_aead_create_cd_cipher(session,\n \t\t\t\t\taead_xform->key.data,\n \t\t\t\t\taead_xform->key.length))\n \t\t\treturn -EINVAL;\n \n-\t\tif (qat_alg_aead_session_create_content_desc_auth(session,\n+\t\tif (qat_sym_session_aead_create_cd_auth(session,\n \t\t\t\t\taead_xform->key.data,\n \t\t\t\t\taead_xform->key.length,\n \t\t\t\t\taead_xform->aad_length,\n@@ -704,7 +700,7 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \t\tcrypto_operation = aead_xform->algo == RTE_CRYPTO_AEAD_AES_GCM ?\n \t\t\tRTE_CRYPTO_AUTH_OP_VERIFY : RTE_CRYPTO_AUTH_OP_GENERATE;\n \n-\t\tif (qat_alg_aead_session_create_content_desc_auth(session,\n+\t\tif (qat_sym_session_aead_create_cd_auth(session,\n \t\t\t\t\taead_xform->key.data,\n \t\t\t\t\taead_xform->key.length,\n \t\t\t\t\taead_xform->aad_length,\n@@ -712,7 +708,7 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \t\t\t\t\tcrypto_operation))\n \t\t\treturn -EINVAL;\n \n-\t\tif (qat_alg_aead_session_create_content_desc_cipher(session,\n+\t\tif (qat_sym_session_aead_create_cd_cipher(session,\n \t\t\t\t\taead_xform->key.data,\n \t\t\t\t\taead_xform->key.length))\n \t\t\treturn -EINVAL;\n@@ -722,7 +718,7 @@ qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n \treturn 0;\n }\n \n-unsigned int qat_crypto_sym_get_session_private_size(\n+unsigned int qat_sym_session_get_private_size(\n \t\tstruct rte_cryptodev *dev __rte_unused)\n {\n \treturn RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);\n@@ -996,7 +992,7 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,\n #define HMAC_OPAD_VALUE\t0x5c\n #define HASH_XCBC_PRECOMP_KEY_NUM 3\n \n-static int qat_alg_do_precomputes(enum icp_qat_hw_auth_algo hash_alg,\n+static int qat_sym_do_precomputes(enum icp_qat_hw_auth_algo hash_alg,\n \t\t\t\tconst uint8_t *auth_key,\n \t\t\t\tuint16_t auth_keylen,\n \t\t\t\tuint8_t *p_state_buf,\n@@ -1126,7 +1122,8 @@ static int qat_alg_do_precomputes(enum icp_qat_hw_auth_algo hash_alg,\n \treturn 0;\n }\n \n-void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n+static void\n+qat_sym_session_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n \t\tenum qat_crypto_proto_flag proto_flags)\n {\n \tPMD_INIT_FUNC_TRACE();\n@@ -1194,7 +1191,7 @@ qat_get_crypto_proto_flag(uint16_t flags)\n \treturn qat_proto_flag;\n }\n \n-int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,\n+int qat_sym_session_aead_create_cd_cipher(struct qat_session *cdesc,\n \t\t\t\t\t\tuint8_t *cipherkey,\n \t\t\t\t\t\tuint32_t cipherkeylen)\n {\n@@ -1298,7 +1295,7 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,\n \tcipher_cd_ctrl->cipher_cfg_offset = cipher_offset >> 3;\n \n \theader->service_cmd_id = cdesc->qat_cmd;\n-\tqat_alg_init_common_hdr(header, qat_proto_flag);\n+\tqat_sym_session_init_common_hdr(header, qat_proto_flag);\n \n \tcipher = (struct icp_qat_hw_cipher_algo_blk *)cdesc->cd_cur_ptr;\n \tcipher->cipher_config.val =\n@@ -1342,7 +1339,7 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,\n \treturn 0;\n }\n \n-int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n+int qat_sym_session_aead_create_cd_auth(struct qat_session *cdesc,\n \t\t\t\t\t\tuint8_t *authkey,\n \t\t\t\t\t\tuint32_t authkeylen,\n \t\t\t\t\t\tuint32_t aad_length,\n@@ -1431,7 +1428,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t */\n \tswitch (cdesc->qat_hash_alg) {\n \tcase ICP_QAT_HW_AUTH_ALGO_SHA1:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA1,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA1,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr,\t&state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(SHA)precompute failed\");\n \t\t\treturn -EFAULT;\n@@ -1439,7 +1436,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t\tstate2_size = RTE_ALIGN_CEIL(ICP_QAT_HW_SHA1_STATE2_SZ, 8);\n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_SHA224:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA224,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA224,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(SHA)precompute failed\");\n \t\t\treturn -EFAULT;\n@@ -1447,7 +1444,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t\tstate2_size = ICP_QAT_HW_SHA224_STATE2_SZ;\n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_SHA256:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA256,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA256,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr,\t&state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(SHA)precompute failed\");\n \t\t\treturn -EFAULT;\n@@ -1455,7 +1452,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t\tstate2_size = ICP_QAT_HW_SHA256_STATE2_SZ;\n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_SHA384:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA384,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA384,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(SHA)precompute failed\");\n \t\t\treturn -EFAULT;\n@@ -1463,7 +1460,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t\tstate2_size = ICP_QAT_HW_SHA384_STATE2_SZ;\n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_SHA512:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA512,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA512,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr,\t&state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(SHA)precompute failed\");\n \t\t\treturn -EFAULT;\n@@ -1472,7 +1469,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC:\n \t\tstate1_size = ICP_QAT_HW_AES_XCBC_MAC_STATE1_SZ;\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr + state1_size,\n \t\t\t&state2_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(XCBC)precompute failed\");\n@@ -1483,7 +1480,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \tcase ICP_QAT_HW_AUTH_ALGO_GALOIS_64:\n \t\tqat_proto_flag = QAT_CRYPTO_PROTO_FLAG_GCM;\n \t\tstate1_size = ICP_QAT_HW_GALOIS_128_STATE1_SZ;\n-\t\tif (qat_alg_do_precomputes(cdesc->qat_hash_alg,\n+\t\tif (qat_sym_do_precomputes(cdesc->qat_hash_alg,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr + state1_size,\n \t\t\t&state2_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(GCM)precompute failed\");\n@@ -1543,7 +1540,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \n \t\tbreak;\n \tcase ICP_QAT_HW_AUTH_ALGO_MD5:\n-\t\tif (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_MD5,\n+\t\tif (qat_sym_do_precomputes(ICP_QAT_HW_AUTH_ALGO_MD5,\n \t\t\tauthkey, authkeylen, cdesc->cd_cur_ptr,\n \t\t\t&state1_size)) {\n \t\t\tPMD_DRV_LOG(ERR, \"(MD5)precompute failed\");\n@@ -1606,7 +1603,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \t}\n \n \t/* Request template setup */\n-\tqat_alg_init_common_hdr(header, qat_proto_flag);\n+\tqat_sym_session_init_common_hdr(header, qat_proto_flag);\n \theader->service_cmd_id = cdesc->qat_cmd;\n \n \t/* Auth CD config setup */\n@@ -1632,7 +1629,7 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n \treturn 0;\n }\n \n-int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase ICP_QAT_HW_AES_128_KEY_SZ:\n@@ -1650,7 +1647,7 @@ int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n \treturn 0;\n }\n \n-int qat_alg_validate_aes_docsisbpi_key(int key_len,\n+int qat_sym_validate_aes_docsisbpi_key(int key_len,\n \t\tenum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n@@ -1663,7 +1660,7 @@ int qat_alg_validate_aes_docsisbpi_key(int key_len,\n \treturn 0;\n }\n \n-int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase ICP_QAT_HW_SNOW_3G_UEA2_KEY_SZ:\n@@ -1675,7 +1672,7 @@ int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n \treturn 0;\n }\n \n-int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase ICP_QAT_HW_KASUMI_KEY_SZ:\n@@ -1687,7 +1684,7 @@ int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n \treturn 0;\n }\n \n-int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase ICP_QAT_HW_DES_KEY_SZ:\n@@ -1699,7 +1696,7 @@ int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n \treturn 0;\n }\n \n-int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase QAT_3DES_KEY_SZ_OPT1:\n@@ -1712,7 +1709,7 @@ int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n \treturn 0;\n }\n \n-int qat_alg_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n+int qat_sym_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg)\n {\n \tswitch (key_len) {\n \tcase ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ:\ndiff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h\nindex f90b1821d..493036ebf 100644\n--- a/drivers/crypto/qat/qat_sym_session.h\n+++ b/drivers/crypto/qat/qat_sym_session.h\n@@ -76,67 +76,68 @@ struct qat_session {\n };\n \n int\n-qat_crypto_sym_configure_session(struct rte_cryptodev *dev,\n+qat_sym_session_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n \t\tstruct rte_cryptodev_sym_session *sess,\n \t\tstruct rte_mempool *mempool);\n \n int\n-qat_crypto_set_session_parameters(struct rte_cryptodev *dev,\n+qat_sym_session_set_parameters(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform, void *session_private);\n \n int\n-qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,\n+qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,\n \t\t\t\tstruct qat_session *session);\n \n int\n-qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,\n+qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n \t\tstruct qat_session *session);\n \n int\n-qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,\n+qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t\t\tstruct rte_crypto_sym_xform *xform,\n \t\t\t\tstruct qat_session *session);\n \n int\n-qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cd,\n+qat_sym_session_aead_create_cd_cipher(struct qat_session *cd,\n \t\t\t\t\t\tuint8_t *enckey,\n \t\t\t\t\t\tuint32_t enckeylen);\n \n int\n-qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,\n+qat_sym_session_aead_create_cd_auth(struct qat_session *cdesc,\n \t\t\t\t\t\tuint8_t *authkey,\n \t\t\t\t\t\tuint32_t authkeylen,\n \t\t\t\t\t\tuint32_t aad_length,\n \t\t\t\t\t\tuint32_t digestsize,\n \t\t\t\t\t\tunsigned int operation);\n \n-int\n-qat_pmd_session_mempool_create(struct rte_cryptodev *dev,\n-\tunsigned int nb_objs, unsigned int obj_cache_size, int socket_id);\n-\n void\n-qat_crypto_sym_clear_session(struct rte_cryptodev *dev,\n+qat_sym_session_clear(struct rte_cryptodev *dev,\n \t\tstruct rte_cryptodev_sym_session *session);\n \n unsigned int\n-qat_crypto_sym_get_session_private_size(struct rte_cryptodev *dev);\n-\n-int qat_get_inter_state_size(enum icp_qat_hw_auth_algo qat_hash_alg);\n-\n+qat_sym_session_get_private_size(struct rte_cryptodev *dev);\n \n-void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n+void\n+qat_sym_sesssion_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,\n \t\t\t\t\tenum qat_crypto_proto_flag proto_flags);\n-\n-int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n-int qat_alg_validate_aes_docsisbpi_key(int key_len,\n+int\n+qat_sym_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_sym_validate_aes_docsisbpi_key(int key_len,\n \t\t\t\t\tenum icp_qat_hw_cipher_algo *alg);\n-int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n-int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n-int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n-int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n-int qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);\n-int qat_alg_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_sym_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_sym_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_sym_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_sym_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n+int\n+qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg);\n+int\n+qat_sym_validate_zuc_key(int key_len, enum icp_qat_hw_cipher_algo *alg);\n \n #endif /* _QAT_SYM_SESSION_H_ */\ndiff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c\nindex 45f8a253b..42011dcd9 100644\n--- a/drivers/crypto/qat/rte_qat_cryptodev.c\n+++ b/drivers/crypto/qat/rte_qat_cryptodev.c\n@@ -35,18 +35,18 @@ static struct rte_cryptodev_ops crypto_qat_ops = {\n \t\t.dev_close\t\t= qat_dev_close,\n \t\t.dev_infos_get\t\t= qat_dev_info_get,\n \n-\t\t.stats_get\t\t= qat_crypto_sym_stats_get,\n-\t\t.stats_reset\t\t= qat_crypto_sym_stats_reset,\n-\t\t.queue_pair_setup\t= qat_crypto_sym_qp_setup,\n-\t\t.queue_pair_release\t= qat_crypto_sym_qp_release,\n+\t\t.stats_get\t\t= qat_sym_stats_get,\n+\t\t.stats_reset\t\t= qat_sym_stats_reset,\n+\t\t.queue_pair_setup\t= qat_sym_qp_setup,\n+\t\t.queue_pair_release\t= qat_sym_qp_release,\n \t\t.queue_pair_start\t= NULL,\n \t\t.queue_pair_stop\t= NULL,\n \t\t.queue_pair_count\t= NULL,\n \n \t\t/* Crypto related operations */\n-\t\t.session_get_size\t= qat_crypto_sym_get_session_private_size,\n-\t\t.session_configure\t= qat_crypto_sym_configure_session,\n-\t\t.session_clear\t\t= qat_crypto_sym_clear_session\n+\t\t.session_get_size\t= qat_sym_session_get_private_size,\n+\t\t.session_configure\t= qat_sym_session_configure,\n+\t\t.session_clear\t\t= qat_sym_session_clear\n };\n \n /*\n@@ -86,8 +86,8 @@ crypto_qat_create(const char *name, struct rte_pci_device *pci_dev,\n \tcryptodev->driver_id = cryptodev_qat_driver_id;\n \tcryptodev->dev_ops = &crypto_qat_ops;\n \n-\tcryptodev->enqueue_burst = qat_pmd_enqueue_op_burst;\n-\tcryptodev->dequeue_burst = qat_pmd_dequeue_op_burst;\n+\tcryptodev->enqueue_burst = qat_sym_pmd_enqueue_op_burst;\n+\tcryptodev->dequeue_burst = qat_sym_pmd_dequeue_op_burst;\n \n \tcryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n \t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\n",
    "prefixes": [
        "v3",
        "06/38"
    ]
}