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GET /api/patches/41020/?format=api
https://patches.dpdk.org/api/patches/41020/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1528869161-94542-1-git-send-email-haiyue.wang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1528869161-94542-1-git-send-email-haiyue.wang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1528869161-94542-1-git-send-email-haiyue.wang@intel.com", "date": "2018-06-13T05:52:41", "name": "[v3] net/i40e: workaround for Fortville performance", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "630c308e1c8be7b3f3ca6230b4ef8c2d20d32d38", "submitter": { "id": 1044, "url": "https://patches.dpdk.org/api/people/1044/?format=api", "name": "Wang, Haiyue", "email": "haiyue.wang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1528869161-94542-1-git-send-email-haiyue.wang@intel.com/mbox/", "series": [ { "id": 100, "url": "https://patches.dpdk.org/api/series/100/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=100", "date": "2018-06-13T05:52:41", "name": "[v3] net/i40e: workaround for Fortville performance", "version": 3, "mbox": "https://patches.dpdk.org/series/100/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/41020/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/41020/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id DC1E71EDF2;\n\tWed, 13 Jun 2018 07:52:57 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id D8AD91EDF1;\n\tWed, 13 Jun 2018 07:52:54 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Jun 2018 22:52:53 -0700", "from dpdk-haiyue-s2600wfp.sh.intel.com ([10.67.111.114])\n\tby orsmga007.jf.intel.com with ESMTP; 12 Jun 2018 22:52:51 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.51,217,1526367600\"; d=\"scan'208\";a=\"48572187\"", "From": "Haiyue Wang <haiyue.wang@intel.com>", "To": "dev@dpdk.org", "Cc": "Haiyue Wang <haiyue.wang@intel.com>, qi.z.zhang@intel.com,\n\tjingjing.wu@intel.com, qiming.yang@intel.com, stable@dpdk.org", "Date": "Wed, 13 Jun 2018 13:52:41 +0800", "Message-Id": "<1528869161-94542-1-git-send-email-haiyue.wang@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1527594786-83831-1-git-send-email-haiyue.wang@intel.com>", "References": "<1527594786-83831-1-git-send-email-haiyue.wang@intel.com>", "Subject": "[dpdk-dev] [PATCH v3] net/i40e: workaround for Fortville performance", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The GL_SWR_PM_UP_THR value is not impacted from the link speed, its\nvalue is set according to the total number of ports for a better\npipe-monitor configuration.\n\nAll bellowing relevant device IDs are considered (NICs, LOMs, Mezz\nand Backplane):\n\nDevice-ID Value Comments\n0x1572 0x03030303 10G SFI\n0x1581 0x03030303 10G Backplane\n0x1586 0x03030303 10G BaseT\n0x1589 0x03030303 10G BaseT (FortPond)\n0x1580 0x06060606 40G Backplane\n0x1583 0x06060606 2x40G QSFP\n0x1584 0x06060606 1x40G QSFP\n0x1587 0x06060606 20G Backplane (HP)\n0x1588 0x06060606 20G KR2 (HP)\n0x158A 0x06060606 25G Backplane\n0x158B 0x06060606 25G SFP28\n\nFixes: c9223a2bf53c (\"i40e: workaround for XL710 performance\")\nFixes: 75d133dd3296 (\"net/i40e: enable 25G device\")\nCc: stable@dpdk.org\n\nSigned-off-by: Haiyue Wang <haiyue.wang@intel.com>\n---\nv2 -> v3:\n - Change the return type of i40e_get_swr_pm_cfg from int to bool.\n\nv1 -> v2:\n - The GL_SWR_PM_UP_THR register size is 4B, so change the table\n value type from uint64_t to uint32_t to reduce the table size.\n - Fix two CAMELCASE coding style errors.\n---\n drivers/net/i40e/i40e_ethdev.c | 71 +++++++++++++++++++++++++++++++++++++-----\n 1 file changed, 64 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 13c5d32..ef17de8 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -10003,6 +10003,60 @@ i40e_pctype_to_flowtype(const struct i40e_adapter *adapter,\n #define I40E_GL_SWR_PM_UP_THR_SF_VALUE 0x06060606\n #define I40E_GL_SWR_PM_UP_THR 0x269FBC\n \n+/*\n+ * GL_SWR_PM_UP_THR:\n+ * The value is not impacted from the link speed, its value is set according\n+ * to the total number of ports for a better pipe-monitor configuration.\n+ */\n+static bool\n+i40e_get_swr_pm_cfg(struct i40e_hw *hw, uint32_t *value)\n+{\n+#define I40E_GL_SWR_PM_EF_DEVICE(dev) \\\n+\t\t.device_id = (dev), \\\n+\t\t.val = I40E_GL_SWR_PM_UP_THR_EF_VALUE\n+\n+#define I40E_GL_SWR_PM_SF_DEVICE(dev) \\\n+\t\t.device_id = (dev), \\\n+\t\t.val = I40E_GL_SWR_PM_UP_THR_SF_VALUE\n+\n+\tstatic const struct {\n+\t\tuint16_t device_id;\n+\t\tuint32_t val;\n+\t} swr_pm_table[] = {\n+\t\t{ I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_SFP_XL710) },\n+\t\t{ I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_KX_C) },\n+\t\t{ I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T) },\n+\t\t{ I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T4) },\n+\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_KX_B) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_A) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_B) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2_A) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_B) },\n+\t\t{ I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_SFP28) },\n+\t};\n+\tuint32_t i;\n+\n+\tif (value == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"value is NULL\");\n+\t\treturn false;\n+\t}\n+\n+\tfor (i = 0; i < RTE_DIM(swr_pm_table); i++) {\n+\t\tif (hw->device_id == swr_pm_table[i].device_id) {\n+\t\t\t*value = swr_pm_table[i].val;\n+\n+\t\t\tPMD_DRV_LOG(DEBUG, \"Device 0x%x with GL_SWR_PM_UP_THR \"\n+\t\t\t\t \"value - 0x%08x\",\n+\t\t\t\t hw->device_id, *value);\n+\t\t\treturn true;\n+\t\t}\n+\t}\n+\n+\treturn false;\n+}\n+\n static int\n i40e_dev_sync_phy_type(struct i40e_hw *hw)\n {\n@@ -10067,13 +10121,16 @@ i40e_configure_registers(struct i40e_hw *hw)\n \t\t}\n \n \t\tif (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) {\n-\t\t\tif (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types) || /* For XL710 */\n-\t\t\t I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types)) /* For XXV710 */\n-\t\t\t\treg_table[i].val =\n-\t\t\t\t\tI40E_GL_SWR_PM_UP_THR_SF_VALUE;\n-\t\t\telse /* For X710 */\n-\t\t\t\treg_table[i].val =\n-\t\t\t\t\tI40E_GL_SWR_PM_UP_THR_EF_VALUE;\n+\t\t\tuint32_t cfg_val;\n+\n+\t\t\tif (!i40e_get_swr_pm_cfg(hw, &cfg_val)) {\n+\t\t\t\tPMD_DRV_LOG(DEBUG, \"Device 0x%x skips \"\n+\t\t\t\t\t \"GL_SWR_PM_UP_THR value fixup\",\n+\t\t\t\t\t hw->device_id);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\n+\t\t\treg_table[i].val = cfg_val;\n \t\t}\n \n \t\tret = i40e_aq_debug_read_register(hw, reg_table[i].addr,\n", "prefixes": [ "v3" ] }{ "id": 41020, "url": "