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GET /api/patches/40872/?format=api
{ "id": 40872, "url": "https://patches.dpdk.org/api/patches/40872/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1528476325-15585-12-git-send-email-anoob.joseph@caviumnetworks.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1528476325-15585-12-git-send-email-anoob.joseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1528476325-15585-12-git-send-email-anoob.joseph@caviumnetworks.com", "date": "2018-06-08T16:45:20", "name": "[dpdk-dev,11/16] crypto/cpt: add the basic device callback functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "44c3e3016c781d0f2822eb16f9a43ff826ecac2f", "submitter": { "id": 893, "url": "https://patches.dpdk.org/api/people/893/?format=api", "name": "Anoob Joseph", "email": "anoob.joseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1528476325-15585-12-git-send-email-anoob.joseph@caviumnetworks.com/mbox/", "series": [ { "id": 58, "url": "https://patches.dpdk.org/api/series/58/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=58", "date": "2018-06-08T16:45:09", "name": "Adding Cavium's crypto device(CPT) driver", "version": 1, "mbox": "https://patches.dpdk.org/series/58/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/40872/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/40872/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5578D1CDEF;\n\tFri, 8 Jun 2018 18:49:30 +0200 (CEST)", "from NAM02-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam02on0072.outbound.protection.outlook.com [104.47.36.72])\n\tby dpdk.org (Postfix) with ESMTP id EBC5D1B20D\n\tfor <dev@dpdk.org>; Fri, 8 Jun 2018 18:49:27 +0200 (CEST)", "from ajoseph83.caveonetworks.com.caveonetworks.com (115.113.156.2)\n\tby SN6PR07MB4911.namprd07.prod.outlook.com (2603:10b6:805:3c::29)\n\twith Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.820.15;\n\tFri, 8 Jun 2018 16:49:22 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=dMlJNjXVSGCW//ZrjOV60sRR0eq+95+HJdzf65JLnUU=;\n\tb=DOORk1bIpzzVC8Z2bnZDAFeCQfH0VWG4O9MaWiXL9Zt+0/gsb9bI9XzBXSA29wGdy/KFP0DXXIID44NotPF+kZFbEgraud+7iEHuqATVHC5Mcg0mnZfA7N+RW8csoCMrZ0y8inhqxmi8icfmq9s6aVyojg5pV0Rsswp+tMEU/PM=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <anoob.joseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Srisivasubramanian Srinivasan <Srisivasubramanian.Srinivasan@cavium.com>,\n\tAnkur Dwivedi <ankur.dwivedi@cavium.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tMurthy NSSR <Nidadavolu.Murthy@cavium.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tNithin Dabilpuram <nithin.dabilpuram@cavium.com>,\n\tRagothaman Jayaraman <Ragothaman.Jayaraman@cavium.com>, dev@dpdk.org", "Date": "Fri, 8 Jun 2018 22:15:20 +0530", "Message-Id": "<1528476325-15585-12-git-send-email-anoob.joseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>", "References": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "BM1PR01CA0071.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:1::11) To SN6PR07MB4911.namprd07.prod.outlook.com\n\t(2603:10b6:805:3c::29)", "X-MS-PublicTrafficType": "Email", "X-Microsoft-Antispam": "UriScan:; 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SFP:1101; SCL:1; SRVR:SN6PR07MB4911;\n\tH:ajoseph83.caveonetworks.com.caveonetworks.com; FPR:; SPF:None;\n\tLANG:en; PTR:InfoNoRecords; MX:1; A:1; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "X-Microsoft-Antispam-Message-Info": "2XVZDfD/h69Ln+fNgLzjT/RqGT1WYAA+lM6GF2/igkb1WVA94ekO8AmUpwPW371aZghoH/D1xC/XAlkRAki1SXn8ZpfHQx+066namk+pcT1VsDx1FGO8ikTv1mk0aVZu40v2JdNeVhtDjrhlFAnUuvl/UEneuyJsAss91WtUYmvfZUsrPDjlVjZ8k3QuDBmz", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Office365-Filtering-Correlation-Id": "09214e95-523c-43a4-4454-08d5cd5fcb58", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Jun 2018 16:49:22.4292\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "09214e95-523c-43a4-4454-08d5cd5fcb58", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN6PR07MB4911", "Subject": "[dpdk-dev] [PATCH 11/16] crypto/cpt: add the basic device callback\n\tfunctions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Srisivasubramanian Srinivasan <Srisivasubramanian.Srinivasan@cavium.com>\n\nThis patch addresses the following:\n1. Adds the basic device operation functions for the cpt vf.\n2. The probe/remove functions are staic so no need to declare in\nthe header file.\n3. Removing extra declaration for cpt_dev_periodic_alarm_stop in the\nheader file.\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@cavium.com>\nSigned-off-by: Murthy NSSR <Nidadavolu.Murthy@cavium.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@cavium.com>\nSigned-off-by: Ragothaman Jayaraman <Ragothaman.Jayaraman@cavium.com>\nSigned-off-by: Srisivasubramanian Srinivasan <Srisivasubramanian.Srinivasan@cavium.com>\n---\n drivers/crypto/cpt/Makefile | 1 +\n drivers/crypto/cpt/cpt_pmd_cryptodev.c | 13 +-\n drivers/crypto/cpt/cpt_pmd_ops.c | 544 +++++++++++++++++++++++++++++++++\n drivers/crypto/cpt/cpt_pmd_ops.h | 64 ++++\n 4 files changed, 616 insertions(+), 6 deletions(-)\n create mode 100644 drivers/crypto/cpt/cpt_pmd_ops.c\n create mode 100644 drivers/crypto/cpt/cpt_pmd_ops.h", "diff": "diff --git a/drivers/crypto/cpt/Makefile b/drivers/crypto/cpt/Makefile\nindex 40ec9e2..bf22c2b 100644\n--- a/drivers/crypto/cpt/Makefile\n+++ b/drivers/crypto/cpt/Makefile\n@@ -25,6 +25,7 @@ CFLAGS += -O3\n \n # PMD code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_pmd_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_pmd_ops.c\n \n # Base code\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_CPT) += cpt_device.c\ndiff --git a/drivers/crypto/cpt/cpt_pmd_cryptodev.c b/drivers/crypto/cpt/cpt_pmd_cryptodev.c\nindex addddd8..3939b5e 100644\n--- a/drivers/crypto/cpt/cpt_pmd_cryptodev.c\n+++ b/drivers/crypto/cpt/cpt_pmd_cryptodev.c\n@@ -13,6 +13,7 @@\n \n #include \"base/cpt_device.h\"\n #include \"cpt_pmd_logs.h\"\n+#include \"cpt_pmd_ops.h\"\n \n #define CSP_INTR_POLL_INTERVAL_MS 50\n \n@@ -38,7 +39,7 @@\n \t\t\t\t cpt_pmd_alarm_cb, arg);\n }\n \n-static int\n+int\n cpt_pmd_periodic_alarm_stop(void *arg)\n {\n \treturn rte_eal_alarm_cancel(cpt_pmd_alarm_cb, arg);\n@@ -46,11 +47,11 @@\n \n static struct rte_cryptodev_ops cptvf_ops = {\n \t/* Device related operations */\n-\t.dev_configure = NULL,\n-\t.dev_start = NULL,\n-\t.dev_stop = NULL,\n-\t.dev_close = NULL,\n-\t.dev_infos_get = NULL,\n+\t.dev_configure = cpt_pmd_dev_config,\n+\t.dev_start = cpt_pmd_dev_start,\n+\t.dev_stop = cpt_pmd_dev_stop,\n+\t.dev_close = cpt_pmd_dev_close,\n+\t.dev_infos_get = cptvf_dev_info_get,\n \n \t.stats_get = NULL,\n \t.stats_reset = NULL,\ndiff --git a/drivers/crypto/cpt/cpt_pmd_ops.c b/drivers/crypto/cpt/cpt_pmd_ops.c\nnew file mode 100644\nindex 0000000..2f066cb\n--- /dev/null\n+++ b/drivers/crypto/cpt/cpt_pmd_ops.c\n@@ -0,0 +1,544 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2017 Cavium, Inc\n+ */\n+\n+#include <rte_cryptodev_pmd.h>\n+#include <rte_crypto.h>\n+#include <rte_bus_pci.h>\n+\n+#include \"cpt_pmd_logs.h\"\n+#include \"cpt_pmd_ops.h\"\n+#include \"base/cpt.h\"\n+#include \"base/cpt_device.h\"\n+\n+struct cpt_sess_misc {\n+\tuint16_t cpt_op:4;\n+\tuint16_t zsk_flag:4;\n+\tuint16_t aes_gcm:1;\n+\tuint16_t aes_ctr:1;\n+\tuint16_t dir_dma_supp:1; /* Single frag DMA supported? */\n+\tuint16_t is_gmac:1;\n+\tuint16_t aad_length;\n+\tuint8_t mac_len;\n+\tuint8_t iv_length; /**< IV length in bytes */\n+\tuint8_t auth_iv_length; /**< Auth IV length in bytes */\n+\tuint8_t rsvd1;\n+\tuint16_t iv_offset; /**< IV offset in bytes */\n+\tuint16_t auth_iv_offset; /**< Auth IV offset in bytes */\n+\tuint32_t salt;\n+\tphys_addr_t ctx_dma_addr;\n+};\n+\n+/* Helper macros */\n+\n+#define SRC_IOV_SIZE \\\n+\t(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * MAX_SG_CNT))\n+#define DST_IOV_SIZE \\\n+\t(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * MAX_SG_CNT))\n+\n+#define SESS_PRIV(__sess) \\\n+\t(void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))\n+\n+#define BYTE_LEN 8\n+\n+/* #define CPT_ALWAYS_USE_SG_MODE */\n+#define CPT_ALWAYS_USE_SEPARATE_BUF\n+\n+/* TODO: Add all other capabilities */\n+static const struct rte_cryptodev_capabilities cpt_capabilities[] = {\n+\t{\t/* SHA1 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 20,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA224 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 28,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA256 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA384 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 48,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SHA512 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,\n+\t\t\t\t.block_size = 128,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 64,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* MD5 HMAC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5_HMAC,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 64,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES GCM */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n+\t\t\t{.aead = {\n+\t\t\t\t.algo = RTE_CRYPTO_AEAD_AES_GCM,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 1024,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES GMAC (AUTH) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_GMAC,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 4\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 1,\n+\t\t\t\t\t.max = 65535,\n+\t\t\t\t\t.increment = 1\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SNOW 3G (UIA2) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CBC,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* SNOW 3G (UEA2) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* AES CTR */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CTR,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* NULL (AUTH) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_NULL,\n+\t\t\t\t.block_size = 1,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.aad_size = { 0 }\n+\t\t\t}, },\n+\t\t}, },\n+\t},\n+\t{\t/* NULL (CIPHER) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_NULL,\n+\t\t\t\t.block_size = 1,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 0,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, },\n+\t\t}, }\n+\t},\n+\t{ /* KASUMI (F8) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* ZUC (EIA3) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_ZUC_EIA3,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* ZUC (EEA3) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_ZUC_EEA3,\n+\t\t\t\t.block_size = 16,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{ /* KASUMI (F9) */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n+\t\t\t{.auth = {\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_KASUMI_F9,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 4,\n+\t\t\t\t\t.max = 4,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 8,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\t{\t/* 3DES CBC */\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t\t{.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n+\t\t\t{.cipher = {\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_3DES_CBC,\n+\t\t\t\t.block_size = 8,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 24,\n+\t\t\t\t\t.max = 24,\n+\t\t\t\t\t.increment = 0\n+\t\t\t\t},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 8,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 8\n+\t\t\t\t}\n+\t\t\t}, }\n+\t\t}, }\n+\t},\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+int cpt_pmd_dev_config(struct rte_cryptodev *dev __rte_unused,\n+\t\t struct rte_cryptodev_config *config __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn 0;\n+}\n+\n+int cpt_pmd_dev_start(struct rte_cryptodev *c_dev __rte_unused)\n+{\n+\tstruct cpt_vf *cptvf = c_dev->data->dev_private;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\treturn cptvf_start_device(cptvf);\n+}\n+\n+void cpt_pmd_dev_stop(struct rte_cryptodev *c_dev __rte_unused)\n+{\n+\tstruct cpt_vf *cptvf = c_dev->data->dev_private;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tcptvf_stop_device(cptvf);\n+}\n+\n+int cpt_pmd_dev_close(struct rte_cryptodev *c_dev)\n+{\n+\tstruct cpt_vf *cptvf = c_dev->data->dev_private;\n+\tint i, ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tfor (i = 0; i < c_dev->data->nb_queue_pairs; i++) {\n+\t\tret = cpt_pmd_que_pair_release(c_dev, i);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\tcpt_pmd_periodic_alarm_stop(cptvf);\n+\tcptvf_deinit_device(cptvf);\n+\n+\treturn 0;\n+}\n+\n+void\n+cptvf_dev_info_get(struct rte_cryptodev *dev, struct rte_cryptodev_info *info)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tif (info != NULL) {\n+\t\tinfo->max_nb_queue_pairs = CPT_NUM_QS_PER_VF;\n+\t\tinfo->feature_flags = dev->feature_flags;\n+\t\tinfo->capabilities = cpt_capabilities;\n+\t\t/* TODO: Hardcoding as of now */\n+\t\tinfo->sym.max_nb_sessions = 128;\n+\t\tinfo->driver_id = cryptodev_cpt_driver_id;\n+\t}\n+}\n+\n+int\n+cpt_pmd_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id)\n+{\n+\tcpt_instance_t *instance = dev->data->queue_pairs[que_pair_id];\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tret = cptvf_put_resource(instance);\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Error putting instance handle\"\n+\t\t\t \" of device %s : ret = %d\\n\", dev->data->name, ret);\n+\t\treturn ret;\n+\t}\n+\n+\tdev->data->queue_pairs[que_pair_id] = NULL;\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/cpt/cpt_pmd_ops.h b/drivers/crypto/cpt/cpt_pmd_ops.h\nnew file mode 100644\nindex 0000000..015b4a2\n--- /dev/null\n+++ b/drivers/crypto/cpt/cpt_pmd_ops.h\n@@ -0,0 +1,64 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2017 Cavium, Inc\n+ */\n+\n+#ifndef __CPT_PMD_OPS_H_\n+#define __CPT_PMD_OPS_H_\n+\n+#include \"base/cpt.h\"\n+\n+#define CAVIUM_VENDOR_ID 0x177d\n+#define NITROXIII_DEV_ID 0x11\n+\n+#define CSP_OP_CIPHER_ENCRYPT\t0x1\n+#define CSP_OP_CIPHER_DECRYPT\t0x2\n+#define CSP_OP_CIPHER_MASK\t0x3\n+\n+#define CSP_OP_AUTH_VERIFY\t0x4\n+#define CSP_OP_AUTH_GENERATE\t0x8\n+#define CSP_OP_AUTH_MASK\t0xC\n+\n+#define CSP_OP_ENCODE\t(CSP_OP_CIPHER_ENCRYPT | CSP_OP_AUTH_GENERATE)\n+#define CSP_OP_DECODE\t(CSP_OP_CIPHER_DECRYPT | CSP_OP_AUTH_VERIFY)\n+\n+#define MAX_CIPHER_KEY_LEN 32\n+#define MAX_AUTH_KEY_LEN 32\n+#define DEFAULT_BLOCK_SIZE 64\n+\n+#define CSP_DDMA_AUTH\t\t(1 << 1)\n+#define CSP_DDMA_ENC\t\t(1 << 2)\n+#define CSP_DDMA_SUPPORTED\t(CSP_DDMA_AUTH | CSP_DDMA_ENC)\n+\n+/*\n+ * Space needed in packet for direct-dma operation.\n+ * UCODE result & padding - 16 bytes max\n+ * Result - 16 bytes\n+ * struct cb_info size\n+ */\n+#define CSP_DDMA_EXTRA_SPACE (32 + sizeof(struct cpt_cb_info))\n+\n+#define ZS_EA 0x1\n+#define ZS_IA 0x2\n+#define K_F8 0x4\n+#define K_F9 0x8\n+\n+extern uint8_t cryptodev_cpt_driver_id;\n+extern int cpt_pmd_periodic_alarm_stop(void *arg);\n+extern struct rte_mempool *cpt_meta_pool;\n+extern int cpt_op_mlen;\n+extern int cpt_op_sb_mlen;\n+\n+int cpt_pmd_dev_config(struct rte_cryptodev *dev __rte_unused,\n+\t\t struct rte_cryptodev_config *config __rte_unused);\n+int cpt_pmd_dev_start(struct rte_cryptodev *dev);\n+\n+void cpt_pmd_dev_stop(struct rte_cryptodev *dev);\n+\n+int cpt_pmd_dev_close(struct rte_cryptodev *dev);\n+\n+void cptvf_dev_info_get(struct rte_cryptodev *dev,\n+\t\t\t struct rte_cryptodev_info *inf);\n+\n+int cpt_pmd_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id);\n+\n+#endif\n", "prefixes": [ "dpdk-dev", "11/16" ] }