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{
    "id": 36011,
    "url": "https://patches.dpdk.org/api/patches/36011/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20180312172615.6621-23-jasvinder.singh@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20180312172615.6621-23-jasvinder.singh@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20180312172615.6621-23-jasvinder.singh@intel.com",
    "date": "2018-03-12T17:25:53",
    "name": "[dpdk-dev,v2,22/44] ip_pipeline: add traffic manager object",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0e0c29c6ef582d59500c0113f3a94709f32df9df",
    "submitter": {
        "id": 285,
        "url": "https://patches.dpdk.org/api/people/285/?format=api",
        "name": "Jasvinder Singh",
        "email": "jasvinder.singh@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20180312172615.6621-23-jasvinder.singh@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/36011/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/36011/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 613B4AABF;\n\tMon, 12 Mar 2018 18:52:46 +0100 (CET)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 48E877CF1\n\tfor <dev@dpdk.org>; Mon, 12 Mar 2018 18:52:32 +0100 (CET)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t12 Mar 2018 10:26:50 -0700",
            "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.222.149])\n\tby orsmga004.jf.intel.com with ESMTP; 12 Mar 2018 10:26:49 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.47,462,1515484800\"; d=\"scan'208\";a=\"182012963\"",
        "From": "Jasvinder Singh <jasvinder.singh@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "cristian.dumitrescu@intel.com",
        "Date": "Mon, 12 Mar 2018 17:25:53 +0000",
        "Message-Id": "<20180312172615.6621-23-jasvinder.singh@intel.com>",
        "X-Mailer": "git-send-email 2.9.3",
        "In-Reply-To": "<20180312172615.6621-1-jasvinder.singh@intel.com>",
        "References": "<20180309182426.135278-2-jasvinder.singh@intel.com>\n\t<20180312172615.6621-1-jasvinder.singh@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 22/44] ip_pipeline: add traffic manager object",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add traffic manager object implementation to the application.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\n---\n examples/ip_pipeline/Makefile    |   1 +\n examples/ip_pipeline/cli.c       | 360 +++++++++++++++++++++++++++++++++++++++\n examples/ip_pipeline/main.c      |   8 +\n examples/ip_pipeline/meson.build |   1 +\n examples/ip_pipeline/tmgr.c      | 227 ++++++++++++++++++++++++\n examples/ip_pipeline/tmgr.h      |  70 ++++++++\n 6 files changed, 667 insertions(+)\n create mode 100644 examples/ip_pipeline/tmgr.c\n create mode 100644 examples/ip_pipeline/tmgr.h",
    "diff": "diff --git a/examples/ip_pipeline/Makefile b/examples/ip_pipeline/Makefile\nindex 0dc8442..35e4302 100644\n--- a/examples/ip_pipeline/Makefile\n+++ b/examples/ip_pipeline/Makefile\n@@ -12,6 +12,7 @@ SRCS-y += main.c\n SRCS-y += mempool.c\n SRCS-y += parser.c\n SRCS-y += swq.c\n+SRCS-y += tmgr.c\n #SRCS-y += thread.c\n \n # Build using pkg-config variables if possible\ndiff --git a/examples/ip_pipeline/cli.c b/examples/ip_pipeline/cli.c\nindex 0f665eb..c6111e7 100644\n--- a/examples/ip_pipeline/cli.c\n+++ b/examples/ip_pipeline/cli.c\n@@ -14,6 +14,7 @@\n #include \"mempool.h\"\n #include \"parser.h\"\n #include \"swq.h\"\n+#include \"tmgr.h\"\n \n #ifndef CMD_MAX_TOKENS\n #define CMD_MAX_TOKENS     256\n@@ -277,6 +278,331 @@ cmd_swq(char **tokens,\n \t}\n }\n \n+/**\n+ * tmgr subport profile\n+ *  <tb_rate> <tb_size>\n+ *  <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate>\n+ *  <tc_period>\n+ */\n+static void\n+cmd_tmgr_subport_profile(char **tokens,\n+\tuint32_t n_tokens,\n+\tchar *out,\n+\tsize_t out_size)\n+{\n+\tstruct rte_sched_subport_params p;\n+\tint status, i;\n+\n+\tif (n_tokens != 10) {\n+\t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.tb_rate, tokens[3]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tb_rate\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.tb_size, tokens[4]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tb_size\");\n+\t\treturn;\n+\t}\n+\n+\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\t\tif (parser_read_uint32(&p.tc_rate[i], tokens[5 + i]) != 0) {\n+\t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_rate\");\n+\t\t\treturn;\n+\t\t}\n+\n+\tif (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_period\");\n+\t\treturn;\n+\t}\n+\n+\tstatus = tmgr_subport_profile_add(&p);\n+\tif (status != 0) {\n+\t\tsnprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);\n+\t\treturn;\n+\t}\n+}\n+\n+/**\n+ * tmgr pipe profile\n+ *  <tb_rate> <tb_size>\n+ *  <tc0_rate> <tc1_rate> <tc2_rate> <tc3_rate>\n+ *  <tc_period>\n+ *  <tc_ov_weight>\n+ *  <wrr_weight0..15>\n+ */\n+static void\n+cmd_tmgr_pipe_profile(char **tokens,\n+\tuint32_t n_tokens,\n+\tchar *out,\n+\tsize_t out_size)\n+{\n+\tstruct rte_sched_pipe_params p;\n+\tint status, i;\n+\n+\tif (n_tokens != 27) {\n+\t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.tb_rate, tokens[3]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tb_rate\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.tb_size, tokens[4]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tb_size\");\n+\t\treturn;\n+\t}\n+\n+\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\t\tif (parser_read_uint32(&p.tc_rate[i], tokens[5 + i]) != 0) {\n+\t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_rate\");\n+\t\t\treturn;\n+\t\t}\n+\n+\tif (parser_read_uint32(&p.tc_period, tokens[9]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_period\");\n+\t\treturn;\n+\t}\n+\n+#ifdef RTE_SCHED_SUBPORT_TC_OV\n+\tif (parser_read_uint32(&p.tc_ov_weight, tokens[10]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"tc_ov_weight\");\n+\t\treturn;\n+\t}\n+#endif\n+\n+\tfor (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++)\n+\t\tif (parser_read_uint8(&p.wrr_weights[i], tokens[11 + i]) != 0) {\n+\t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"wrr_weights\");\n+\t\t\treturn;\n+\t\t}\n+\n+\tstatus = tmgr_pipe_profile_add(&p);\n+\tif (status != 0) {\n+\t\tsnprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);\n+\t\treturn;\n+\t}\n+}\n+\n+/**\n+ * tmgr <tmgr_name>\n+ *  rate <rate>\n+ *  spp <n_subports_per_port>\n+ *  pps <n_pipes_per_subport>\n+ *  qsize <qsize_tc0> <qsize_tc1> <qsize_tc2> <qsize_tc3>\n+ *  fo <frame_overhead>\n+ *  mtu <mtu>\n+ *  cpu <cpu_id>\n+ */\n+static void\n+cmd_tmgr(char **tokens,\n+\tuint32_t n_tokens,\n+\tchar *out,\n+\tsize_t out_size)\n+{\n+\tstruct tmgr_port_params p;\n+\tchar *name;\n+\tstruct tmgr_port *tmgr_port;\n+\tint i;\n+\n+\tif (n_tokens != 19) {\n+\t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n+\t\treturn;\n+\t}\n+\n+\tname = tokens[1];\n+\n+\tif (strcmp(tokens[2], \"rate\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"rate\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.rate, tokens[3]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"rate\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[4], \"spp\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"spp\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.n_subports_per_port, tokens[5]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"n_subports_per_port\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[6], \"pps\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"pps\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.n_pipes_per_subport, tokens[7]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"n_pipes_per_subport\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[8], \"qsize\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"qsize\");\n+\t\treturn;\n+\t}\n+\n+\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\t\tif (parser_read_uint16(&p.qsize[i], tokens[9 + i]) != 0) {\n+\t\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"qsize\");\n+\t\t\treturn;\n+\t\t}\n+\n+\tif (strcmp(tokens[13], \"fo\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"fo\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.frame_overhead, tokens[14]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"frame_overhead\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[15], \"mtu\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"mtu\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.mtu, tokens[16]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"mtu\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[17], \"cpu\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"cpu\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&p.cpu_id, tokens[18]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"cpu_id\");\n+\t\treturn;\n+\t}\n+\n+\ttmgr_port = tmgr_port_create(name, &p);\n+\tif (tmgr_port == NULL) {\n+\t\tsnprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);\n+\t\treturn;\n+\t}\n+}\n+\n+/**\n+ * tmgr <tmgr_name> subport <subport_id>\n+ *  profile <subport_profile_id>\n+ */\n+static void\n+cmd_tmgr_subport(char **tokens,\n+\tuint32_t n_tokens,\n+\tchar *out,\n+\tsize_t out_size)\n+{\n+\tuint32_t subport_id, subport_profile_id;\n+\tint status;\n+\tchar *name;\n+\n+\tif (n_tokens != 6) {\n+\t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n+\t\treturn;\n+\t}\n+\n+\tname = tokens[1];\n+\n+\tif (parser_read_uint32(&subport_id, tokens[3]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"subport_id\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&subport_profile_id, tokens[5]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"subport_profile_id\");\n+\t\treturn;\n+\t}\n+\n+\tstatus = tmgr_subport_config(name, subport_id, subport_profile_id);\n+\tif (status) {\n+\t\tsnprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);\n+\t\treturn;\n+\t}\n+}\n+\n+/**\n+ * tmgr <tmgr_name> subport <subport_id> pipe\n+ *  from <pipe_id_first> to <pipe_id_last>\n+ *  profile <pipe_profile_id>\n+ */\n+static void\n+cmd_tmgr_subport_pipe(char **tokens,\n+\tuint32_t n_tokens,\n+\tchar *out,\n+\tsize_t out_size)\n+{\n+\tuint32_t subport_id, pipe_id_first, pipe_id_last, pipe_profile_id;\n+\tint status;\n+\tchar *name;\n+\n+\tif (n_tokens != 11) {\n+\t\tsnprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]);\n+\t\treturn;\n+\t}\n+\n+\tname = tokens[1];\n+\n+\tif (parser_read_uint32(&subport_id, tokens[3]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"subport_id\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[4], \"pipe\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"pipe\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[5], \"from\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"from\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&pipe_id_first, tokens[6]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"pipe_id_first\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[7], \"to\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"to\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&pipe_id_last, tokens[8]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"pipe_id_last\");\n+\t\treturn;\n+\t}\n+\n+\tif (strcmp(tokens[9], \"profile\") != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_NOT_FOUND, \"profile\");\n+\t\treturn;\n+\t}\n+\n+\tif (parser_read_uint32(&pipe_profile_id, tokens[10]) != 0) {\n+\t\tsnprintf(out, out_size, MSG_ARG_INVALID, \"pipe_profile_id\");\n+\t\treturn;\n+\t}\n+\n+\tstatus = tmgr_pipe_config(name, subport_id, pipe_id_first,\n+\t\t\tpipe_id_last, pipe_profile_id);\n+\tif (status) {\n+\t\tsnprintf(out, out_size, MSG_CMD_FAIL, tokens[0]);\n+\t\treturn;\n+\t}\n+}\n+\n void\n cli_process(char *in, char *out, size_t out_size)\n {\n@@ -311,6 +637,40 @@ cli_process(char *in, char *out, size_t out_size)\n \t\treturn;\n \t}\n \n+\tif (strcmp(tokens[0], \"tmgr\") == 0) {\n+\t\tif ((n_tokens >= 3) &&\n+\t\t\t(strcmp(tokens[1], \"subport\") == 0) &&\n+\t\t\t(strcmp(tokens[2], \"profile\") == 0)) {\n+\t\t\tcmd_tmgr_subport_profile(tokens, n_tokens,\n+\t\t\t\tout, out_size);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\tif ((n_tokens >= 3) &&\n+\t\t\t(strcmp(tokens[1], \"pipe\") == 0) &&\n+\t\t\t(strcmp(tokens[2], \"profile\") == 0)) {\n+\t\t\tcmd_tmgr_pipe_profile(tokens, n_tokens, out, out_size);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\tif ((n_tokens >= 5) &&\n+\t\t\t(strcmp(tokens[2], \"subport\") == 0) &&\n+\t\t\t(strcmp(tokens[4], \"profile\") == 0)) {\n+\t\t\tcmd_tmgr_subport(tokens, n_tokens, out, out_size);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\tif ((n_tokens >= 5) &&\n+\t\t\t(strcmp(tokens[2], \"subport\") == 0) &&\n+\t\t\t(strcmp(tokens[4], \"pipe\") == 0)) {\n+\t\t\tcmd_tmgr_subport_pipe(tokens, n_tokens, out, out_size);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\tcmd_tmgr(tokens, n_tokens, out, out_size);\n+\t\treturn;\n+\t}\n+\n \tsnprintf(out, out_size, MSG_CMD_UNKNOWN, tokens[0]);\n }\n \ndiff --git a/examples/ip_pipeline/main.c b/examples/ip_pipeline/main.c\nindex 456f016..490991f 100644\n--- a/examples/ip_pipeline/main.c\n+++ b/examples/ip_pipeline/main.c\n@@ -15,6 +15,7 @@\n #include \"link.h\"\n #include \"mempool.h\"\n #include \"swq.h\"\n+#include \"tmgr.h\"\n \n static const char usage[] =\n \t\"%s EAL_ARGS -- [-h HOST] [-p PORT] [-s SCRIPT]\\n\";\n@@ -183,6 +184,13 @@ main(int argc, char **argv)\n \t\treturn status;\n \t}\n \n+\t/* Traffic Manager */\n+\tstatus = tmgr_init();\n+\tif (status) {\n+\t\tprintf(\"Error: TMGR initialization failed (%d)\\n\", status);\n+\t\treturn status;\n+\t}\n+\n \t/* Script */\n \tif (app.script_name)\n \t\tcli_script_process(app.script_name,\ndiff --git a/examples/ip_pipeline/meson.build b/examples/ip_pipeline/meson.build\nindex 442f3e3..cb2154c 100644\n--- a/examples/ip_pipeline/meson.build\n+++ b/examples/ip_pipeline/meson.build\n@@ -15,4 +15,5 @@ sources = files(\n \t'mempool.c',\n \t'parser.c',\n \t'swq.c',\n+\t'tmgr.c'\n )\ndiff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c\nnew file mode 100644\nindex 0000000..b46ca96\n--- /dev/null\n+++ b/examples/ip_pipeline/tmgr.c\n@@ -0,0 +1,227 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2018 Intel Corporation\n+ */\n+\n+#include <stdlib.h>\n+\n+#include \"tmgr.h\"\n+\n+static struct rte_sched_subport_params\n+\tsubport_profile[TMGR_SUBPORT_PROFILE_MAX];\n+\n+static uint32_t n_subport_profiles;\n+\n+static struct rte_sched_pipe_params\n+\tpipe_profile[TMGR_PIPE_PROFILE_MAX];\n+\n+static uint32_t n_pipe_profiles;\n+\n+static struct tmgr_port_list tmgr_port_list;\n+\n+int\n+tmgr_init(void)\n+{\n+\tTAILQ_INIT(&tmgr_port_list);\n+\n+\treturn 0;\n+}\n+\n+struct tmgr_port *\n+tmgr_port_find(const char *name)\n+{\n+\tstruct tmgr_port *tmgr_port;\n+\n+\tif (name == NULL)\n+\t\treturn NULL;\n+\n+\tTAILQ_FOREACH(tmgr_port, &tmgr_port_list, node)\n+\t\tif (strcmp(tmgr_port->name, name) == 0)\n+\t\t\treturn tmgr_port;\n+\n+\treturn NULL;\n+}\n+\n+int\n+tmgr_subport_profile_add(struct rte_sched_subport_params *p)\n+{\n+\t/* Check input params */\n+\tif (p == NULL)\n+\t\treturn -1;\n+\n+\t/* Save profile */\n+\tmemcpy(&subport_profile[n_subport_profiles],\n+\t\tp,\n+\t\tsizeof(*p));\n+\n+\tn_subport_profiles++;\n+\n+\treturn 0;\n+}\n+\n+int\n+tmgr_pipe_profile_add(struct rte_sched_pipe_params *p)\n+{\n+\t/* Check input params */\n+\tif (p == NULL)\n+\t\treturn -1;\n+\n+\t/* Save profile */\n+\tmemcpy(&pipe_profile[n_pipe_profiles],\n+\t\tp,\n+\t\tsizeof(*p));\n+\n+\tn_pipe_profiles++;\n+\n+\treturn 0;\n+}\n+\n+struct tmgr_port *\n+tmgr_port_create(const char *name, struct tmgr_port_params *params)\n+{\n+\tstruct rte_sched_port_params p;\n+\tstruct tmgr_port *tmgr_port;\n+\tstruct rte_sched_port *s;\n+\tuint32_t i, j;\n+\n+\t/* Check input params */\n+\tif ((name == NULL) ||\n+\t\ttmgr_port_find(name) ||\n+\t\t(params == NULL) ||\n+\t\t(params->n_subports_per_port == 0) ||\n+\t\t(params->n_pipes_per_subport == 0) ||\n+\t\t(params->cpu_id >= RTE_MAX_NUMA_NODES) ||\n+\t\t(n_subport_profiles == 0) ||\n+\t\t(n_pipe_profiles == 0))\n+\t\treturn NULL;\n+\n+\t/* Resource create */\n+\tp.name = name;\n+\tp.socket = (int) params->cpu_id;\n+\tp.rate = params->rate;\n+\tp.mtu = params->mtu;\n+\tp.frame_overhead = params->frame_overhead;\n+\tp.n_subports_per_port = params->n_subports_per_port;\n+\tp.n_pipes_per_subport = params->n_pipes_per_subport;\n+\n+\tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)\n+\t\tp.qsize[i] = params->qsize[i];\n+\n+\tp.pipe_profiles = pipe_profile;\n+\tp.n_pipe_profiles = n_pipe_profiles;\n+\n+\ts = rte_sched_port_config(&p);\n+\tif (s == NULL)\n+\t\treturn NULL;\n+\n+\tfor (i = 0; i < params->n_subports_per_port; i++) {\n+\t\tint status;\n+\n+\t\tstatus = rte_sched_subport_config(\n+\t\t\ts,\n+\t\t\ti,\n+\t\t\t&subport_profile[0]);\n+\n+\t\tif (status) {\n+\t\t\trte_sched_port_free(s);\n+\t\t\treturn NULL;\n+\t\t}\n+\n+\t\tfor (j = 0; j < params->n_pipes_per_subport; j++) {\n+\t\t\tstatus = rte_sched_pipe_config(\n+\t\t\t\ts,\n+\t\t\t\ti,\n+\t\t\t\tj,\n+\t\t\t\t0);\n+\n+\t\t\tif (status) {\n+\t\t\t\trte_sched_port_free(s);\n+\t\t\t\treturn NULL;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\t/* Node allocation */\n+\ttmgr_port = calloc(1, sizeof(struct tmgr_port));\n+\tif (tmgr_port == NULL) {\n+\t\trte_sched_port_free(s);\n+\t\treturn NULL;\n+\t}\n+\n+\t/* Node fill in */\n+\tstrncpy(tmgr_port->name, name, sizeof(tmgr_port->name));\n+\ttmgr_port->s = s;\n+\ttmgr_port->n_subports_per_port = params->n_subports_per_port;\n+\ttmgr_port->n_pipes_per_subport = params->n_pipes_per_subport;\n+\n+\t/* Node add to list */\n+\tTAILQ_INSERT_TAIL(&tmgr_port_list, tmgr_port, node);\n+\n+\treturn tmgr_port;\n+}\n+\n+int\n+tmgr_subport_config(const char *port_name,\n+\tuint32_t subport_id,\n+\tuint32_t subport_profile_id)\n+{\n+\tstruct tmgr_port *port;\n+\tint status;\n+\n+\t/* Check input params */\n+\tif (port_name == NULL)\n+\t\treturn -1;\n+\n+\tport = tmgr_port_find(port_name);\n+\tif ((port == NULL) ||\n+\t\t(subport_id >= port->n_subports_per_port) ||\n+\t\t(subport_profile_id >= n_subport_profiles))\n+\t\treturn -1;\n+\n+\t/* Resource config */\n+\tstatus = rte_sched_subport_config(\n+\t\tport->s,\n+\t\tsubport_id,\n+\t\t&subport_profile[subport_profile_id]);\n+\n+\treturn status;\n+}\n+\n+int\n+tmgr_pipe_config(const char *port_name,\n+\tuint32_t subport_id,\n+\tuint32_t pipe_id_first,\n+\tuint32_t pipe_id_last,\n+\tuint32_t pipe_profile_id)\n+{\n+\tstruct tmgr_port *port;\n+\tuint32_t i;\n+\n+\t/* Check input params */\n+\tif (port_name == NULL)\n+\t\treturn -1;\n+\n+\tport = tmgr_port_find(port_name);\n+\tif ((port == NULL) ||\n+\t\t(subport_id >= port->n_subports_per_port) ||\n+\t\t(pipe_id_first >= port->n_pipes_per_subport) ||\n+\t\t(pipe_id_last >= port->n_pipes_per_subport) ||\n+\t\t(pipe_id_first > pipe_id_last) ||\n+\t\t(pipe_profile_id >= n_pipe_profiles))\n+\t\treturn -1;\n+\n+\t/* Resource config */\n+\tfor (i = pipe_id_first; i <= pipe_id_last; i++) {\n+\t\tint status;\n+\n+\t\tstatus = rte_sched_pipe_config(\n+\t\t\tport->s,\n+\t\t\tsubport_id,\n+\t\t\ti,\n+\t\t\t(int) pipe_profile_id);\n+\n+\t\tif (status)\n+\t\t\treturn status;\n+\t}\n+\n+\treturn 0;\n+}\ndiff --git a/examples/ip_pipeline/tmgr.h b/examples/ip_pipeline/tmgr.h\nnew file mode 100644\nindex 0000000..0b497e7\n--- /dev/null\n+++ b/examples/ip_pipeline/tmgr.h\n@@ -0,0 +1,70 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2018 Intel Corporation\n+ */\n+\n+#ifndef _INCLUDE_TMGR_H_\n+#define _INCLUDE_TMGR_H_\n+\n+#include <stdint.h>\n+#include <sys/queue.h>\n+\n+#include <rte_sched.h>\n+\n+#include \"common.h\"\n+\n+#ifndef TMGR_SUBPORT_PROFILE_MAX\n+#define TMGR_SUBPORT_PROFILE_MAX                           256\n+#endif\n+\n+#ifndef TMGR_PIPE_PROFILE_MAX\n+#define TMGR_PIPE_PROFILE_MAX                              256\n+#endif\n+\n+struct tmgr_port {\n+\tTAILQ_ENTRY(tmgr_port) node;\n+\tchar name[NAME_SIZE];\n+\tstruct rte_sched_port *s;\n+\tuint32_t n_subports_per_port;\n+\tuint32_t n_pipes_per_subport;\n+};\n+\n+TAILQ_HEAD(tmgr_port_list, tmgr_port);\n+\n+int\n+tmgr_init(void);\n+\n+struct tmgr_port *\n+tmgr_port_find(const char *name);\n+\n+struct tmgr_port_params {\n+\tuint32_t rate;\n+\tuint32_t n_subports_per_port;\n+\tuint32_t n_pipes_per_subport;\n+\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n+\tuint32_t frame_overhead;\n+\tuint32_t mtu;\n+\tuint32_t cpu_id;\n+};\n+\n+int\n+tmgr_subport_profile_add(struct rte_sched_subport_params *p);\n+\n+int\n+tmgr_pipe_profile_add(struct rte_sched_pipe_params *p);\n+\n+struct tmgr_port *\n+tmgr_port_create(const char *name, struct tmgr_port_params *params);\n+\n+int\n+tmgr_subport_config(const char *port_name,\n+\tuint32_t subport_id,\n+\tuint32_t subport_profile_id);\n+\n+int\n+tmgr_pipe_config(const char *port_name,\n+\tuint32_t subport_id,\n+\tuint32_t pipe_id_first,\n+\tuint32_t pipe_id_last,\n+\tuint32_t pipe_profile_id);\n+\n+#endif /* _INCLUDE_TMGR_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "22/44"
    ]
}