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GET /api/patches/32939/?format=api
{ "id": 32939, "url": "https://patches.dpdk.org/api/patches/32939/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1515140505-38655-11-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1515140505-38655-11-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1515140505-38655-11-git-send-email-wenzhuo.lu@intel.com", "date": "2018-01-05T08:21:40", "name": "[dpdk-dev,v4,10/15] net/avf: enable ops to check queue info and status", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "877e465f30167cfaa1705e856fcc4f399ae6c748", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 24, "url": "https://patches.dpdk.org/api/users/24/?format=api", "username": "helin_zhang", "first_name": "Helin", "last_name": "Zhang", "email": "helin.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1515140505-38655-11-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/32939/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/32939/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A2C911B1D8;\n\tFri, 5 Jan 2018 09:20:05 +0100 (CET)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id A65A41B1AB\n\tfor <dev@dpdk.org>; Fri, 5 Jan 2018 09:19:59 +0100 (CET)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t05 Jan 2018 00:19:58 -0800", "from dpdk26.sh.intel.com ([10.67.110.152])\n\tby FMSMGA003.fm.intel.com with ESMTP; 05 Jan 2018 00:19:58 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.46,317,1511856000\"; d=\"scan'208\";a=\"16971510\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Jingjing Wu <jingjing.wu@intel.com>", "Date": "Fri, 5 Jan 2018 16:21:40 +0800", "Message-Id": "<1515140505-38655-11-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1515140505-38655-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1511505206-97333-1-git-send-email-jingjing.wu@intel.com>\n\t<1515140505-38655-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 10/15] net/avf: enable ops to check queue info\n\tand status", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jingjing Wu <jingjing.wu@intel.com>\n\n - rxq_info_get\n - txq_info_get\n - rx_queue_count\n - rx_descriptor_status\n - tx_descriptor_status\n\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n doc/guides/nics/features/avf.ini | 2 +\n drivers/net/avf/avf_ethdev.c | 5 ++\n drivers/net/avf/avf_rxtx.c | 120 +++++++++++++++++++++++++++++++++++++++\n drivers/net/avf/avf_rxtx.h | 7 +++\n 4 files changed, 134 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/avf.ini b/doc/guides/nics/features/avf.ini\nindex cf1b246..da4d81b 100644\n--- a/doc/guides/nics/features/avf.ini\n+++ b/doc/guides/nics/features/avf.ini\n@@ -25,6 +25,8 @@ VLAN offload = Y\n L3 checksum offload = Y\n L4 checksum offload = Y\n Packet type parsing = Y\n+Rx descriptor status = Y\n+Tx descriptor status = Y\n Basic stats = Y\n Multiprocess aware = Y\n BSD nic_uio = Y\ndiff --git a/drivers/net/avf/avf_ethdev.c b/drivers/net/avf/avf_ethdev.c\nindex e4a6f35..e00bb5d 100644\n--- a/drivers/net/avf/avf_ethdev.c\n+++ b/drivers/net/avf/avf_ethdev.c\n@@ -105,6 +105,11 @@ static void avf_dev_set_default_mac_addr(struct rte_eth_dev *dev,\n \t.reta_query = avf_dev_rss_reta_query,\n \t.rss_hash_update = avf_dev_rss_hash_update,\n \t.rss_hash_conf_get = avf_dev_rss_hash_conf_get,\n+\t.rxq_info_get = avf_dev_rxq_info_get,\n+\t.txq_info_get = avf_dev_txq_info_get,\n+\t.rx_queue_count = avf_dev_rxq_count,\n+\t.rx_descriptor_status = avf_dev_rx_desc_status,\n+\t.tx_descriptor_status = avf_dev_tx_desc_status,\n \t.mtu_set = avf_dev_mtu_set,\n };\n \ndiff --git a/drivers/net/avf/avf_rxtx.c b/drivers/net/avf/avf_rxtx.c\nindex baccec4..0fea8f9 100644\n--- a/drivers/net/avf/avf_rxtx.c\n+++ b/drivers/net/avf/avf_rxtx.c\n@@ -1385,3 +1385,123 @@\n \tdev->tx_pkt_burst = avf_xmit_pkts;\n \tdev->tx_pkt_prepare = avf_prep_pkts;\n }\n+\n+void\n+avf_dev_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_rxq_info *qinfo)\n+{\n+\tstruct avf_rx_queue *rxq;\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\n+\tqinfo->mp = rxq->mp;\n+\tqinfo->scattered_rx = dev->data->scattered_rx;\n+\tqinfo->nb_desc = rxq->nb_rx_desc;\n+\n+\tqinfo->conf.rx_free_thresh = rxq->rx_free_thresh;\n+\tqinfo->conf.rx_drop_en = TRUE;\n+\tqinfo->conf.rx_deferred_start = rxq->rx_deferred_start;\n+}\n+\n+void\n+avf_dev_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t struct rte_eth_txq_info *qinfo)\n+{\n+\tstruct avf_tx_queue *txq;\n+\n+\ttxq = dev->data->tx_queues[queue_id];\n+\n+\tqinfo->nb_desc = txq->nb_tx_desc;\n+\n+\tqinfo->conf.tx_free_thresh = txq->free_thresh;\n+\tqinfo->conf.tx_rs_thresh = txq->rs_thresh;\n+\tqinfo->conf.txq_flags = txq->txq_flags;\n+\tqinfo->conf.tx_deferred_start = txq->tx_deferred_start;\n+}\n+\n+/* Get the number of used descriptors of a rx queue */\n+uint32_t\n+avf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id)\n+{\n+#define AVF_RXQ_SCAN_INTERVAL 4\n+\tvolatile union avf_rx_desc *rxdp;\n+\tstruct avf_rx_queue *rxq;\n+\tuint16_t desc = 0;\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\trxdp = &rxq->rx_ring[rxq->rx_tail];\n+\twhile ((desc < rxq->nb_rx_desc) &&\n+\t ((rte_le_to_cpu_64(rxdp->wb.qword1.status_error_len) &\n+\t\t AVF_RXD_QW1_STATUS_MASK) >> AVF_RXD_QW1_STATUS_SHIFT) &\n+\t (1 << AVF_RX_DESC_STATUS_DD_SHIFT)) {\n+\t\t/* Check the DD bit of a rx descriptor of each 4 in a group,\n+\t\t * to avoid checking too frequently and downgrading performance\n+\t\t * too much.\n+\t\t */\n+\t\tdesc += AVF_RXQ_SCAN_INTERVAL;\n+\t\trxdp += AVF_RXQ_SCAN_INTERVAL;\n+\t\tif (rxq->rx_tail + desc >= rxq->nb_rx_desc)\n+\t\t\trxdp = &(rxq->rx_ring[rxq->rx_tail +\n+\t\t\t\t\tdesc - rxq->nb_rx_desc]);\n+\t}\n+\n+\treturn desc;\n+}\n+\n+int\n+avf_dev_rx_desc_status(void *rx_queue, uint16_t offset)\n+{\n+\tstruct avf_rx_queue *rxq = rx_queue;\n+\tvolatile uint64_t *status;\n+\tuint64_t mask;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn -EINVAL;\n+\n+\tif (offset >= rxq->nb_rx_desc - rxq->nb_rx_hold)\n+\t\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\tstatus = &rxq->rx_ring[desc].wb.qword1.status_error_len;\n+\tmask = rte_le_to_cpu_64((1ULL << AVF_RX_DESC_STATUS_DD_SHIFT)\n+\t\t<< AVF_RXD_QW1_STATUS_SHIFT);\n+\tif (*status & mask)\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n+int\n+avf_dev_tx_desc_status(void *tx_queue, uint16_t offset)\n+{\n+\tstruct avf_tx_queue *txq = tx_queue;\n+\tvolatile uint64_t *status;\n+\tuint64_t mask, expect;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= txq->nb_tx_desc))\n+\t\treturn -EINVAL;\n+\n+\tdesc = txq->tx_tail + offset;\n+\t/* go to next desc that has the RS bit */\n+\tdesc = ((desc + txq->rs_thresh - 1) / txq->rs_thresh) *\n+\t\ttxq->rs_thresh;\n+\tif (desc >= txq->nb_tx_desc) {\n+\t\tdesc -= txq->nb_tx_desc;\n+\t\tif (desc >= txq->nb_tx_desc)\n+\t\t\tdesc -= txq->nb_tx_desc;\n+\t}\n+\n+\tstatus = &txq->tx_ring[desc].cmd_type_offset_bsz;\n+\tmask = rte_le_to_cpu_64(AVF_TXD_QW1_DTYPE_MASK);\n+\texpect = rte_cpu_to_le_64(\n+\t\t AVF_TX_DESC_DTYPE_DESC_DONE << AVF_TXD_QW1_DTYPE_SHIFT);\n+\tif ((*status & mask) == expect)\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\n+\treturn RTE_ETH_TX_DESC_FULL;\n+}\ndiff --git a/drivers/net/avf/avf_rxtx.h b/drivers/net/avf/avf_rxtx.h\nindex cad240d..e248f55 100644\n--- a/drivers/net/avf/avf_rxtx.h\n+++ b/drivers/net/avf/avf_rxtx.h\n@@ -147,6 +147,13 @@ uint16_t avf_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t uint16_t nb_pkts);\n void avf_set_rx_function(struct rte_eth_dev *dev);\n void avf_set_tx_function(struct rte_eth_dev *dev);\n+void avf_dev_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t\t struct rte_eth_rxq_info *qinfo);\n+void avf_dev_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\t\t\t struct rte_eth_txq_info *qinfo);\n+uint32_t avf_dev_rxq_count(struct rte_eth_dev *dev, uint16_t queue_id);\n+int avf_dev_rx_desc_status(void *rx_queue, uint16_t offset);\n+int avf_dev_tx_desc_status(void *tx_queue, uint16_t offset);\n \n static inline\n void avf_dump_rx_descriptor(struct avf_rx_queue *rxq,\n", "prefixes": [ "dpdk-dev", "v4", "10/15" ] }