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{
    "id": 323,
    "url": "https://patches.dpdk.org/api/patches/323/",
    "web_url": "https://patches.dpdk.org/patch/323/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1410247299-4365-12-git-send-email-helin.zhang@intel.com>",
    "date": "2014-09-09T07:21:35",
    "name": "[dpdk-dev,11/15] i40e: expose debug_write_register request",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "c7f4f9adf69da88e52e498451f828bb8d09e6213",
    "submitter": {
        "id": 14,
        "url": "https://patches.dpdk.org/api/people/14/",
        "name": "Helin Zhang",
        "email": "helin.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/patch/323/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/323/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/323/checks/",
    "tags": {},
    "headers": {
        "Delivered-To": "patchwork@dpdk.org",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-Original-To": "patchwork@dpdk.org",
        "Date": "Tue,  9 Sep 2014 15:21:35 +0800",
        "In-Reply-To": "<1410247299-4365-1-git-send-email-helin.zhang@intel.com>",
        "Precedence": "list",
        "X-BeenThere": "dev@dpdk.org",
        "References": "<1410247299-4365-1-git-send-email-helin.zhang@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "To": "dev@dpdk.org",
        "Errors-To": "dev-bounces@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id BB901B3BC;\n\tTue,  9 Sep 2014 09:17:17 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 1501BB3BE\n\tfor <dev@dpdk.org>; Tue,  9 Sep 2014 09:17:15 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga101.fm.intel.com with ESMTP; 09 Sep 2014 00:22:16 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby FMSMGA003.fm.intel.com with ESMTP; 09 Sep 2014 00:17:16 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s897MDKO008886;\n\tTue, 9 Sep 2014 15:22:13 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s897MB72004502; Tue, 9 Sep 2014 15:22:13 +0800",
            "(from hzhan75@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s897MBgb004498; \n\tTue, 9 Sep 2014 15:22:11 +0800"
        ],
        "From": "Helin Zhang <helin.zhang@intel.com>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-ExtLoop1": "1",
        "Message-Id": "<1410247299-4365-12-git-send-email-helin.zhang@intel.com>",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "Subject": "[dpdk-dev] [PATCH 11/15] i40e: expose debug_write_register request",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-IronPort-AV": "E=Sophos;i=\"4.97,862,1389772800\"; d=\"scan'208\";a=\"383381697\"",
        "List-Post": "<mailto:dev@dpdk.org>",
        "X-Mailman-Version": "2.1.15"
    },
    "content": "The firware api request of writes to hardware registers should be\nexposed to driver. The new API of 'i40e_aq_debug_write_register'\nis introduced for that.\n\nSigned-off-by: Helin Zhang <helin.zhang@intel.com>\nReviewed-by: Chen Jing <jing.d.chen@intel.com>\n---\n lib/librte_pmd_i40e/i40e/i40e_common.c    | 29 +++++++++++++++++++++++++++++\n lib/librte_pmd_i40e/i40e/i40e_prototype.h |  7 +++++--\n 2 files changed, 34 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c b/lib/librte_pmd_i40e/i40e/i40e_common.c\nindex 84af47a..d901c8d 100644\n--- a/lib/librte_pmd_i40e/i40e/i40e_common.c\n+++ b/lib/librte_pmd_i40e/i40e/i40e_common.c\n@@ -2358,6 +2358,35 @@ enum i40e_status_code i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,\n }\n \n /**\n+ * i40e_aq_debug_write_register\n+ * @hw: pointer to the hw struct\n+ * @reg_addr: register address\n+ * @reg_val: register value\n+ * @cmd_details: pointer to command details structure or NULL\n+ *\n+ * Write to a register using the admin queue commands\n+ **/\n+enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,\n+\t\t\t\tu32 reg_addr, u64 reg_val,\n+\t\t\t\tstruct i40e_asq_cmd_details *cmd_details)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_debug_reg_read_write *cmd =\n+\t\t(struct i40e_aqc_debug_reg_read_write *)&desc.params.raw;\n+\tenum i40e_status_code status;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_write_reg);\n+\n+\tcmd->address = CPU_TO_LE32(reg_addr);\n+\tcmd->value_high = CPU_TO_LE32((u32)(reg_val >> 32));\n+\tcmd->value_low = CPU_TO_LE32((u32)(reg_val & 0xFFFFFFFF));\n+\n+\tstatus = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);\n+\n+\treturn status;\n+}\n+\n+/**\n  * i40e_aq_get_hmc_resource_profile\n  * @hw: pointer to the hw struct\n  * @profile: type of profile the HMC is to be set as\ndiff --git a/lib/librte_pmd_i40e/i40e/i40e_prototype.h b/lib/librte_pmd_i40e/i40e/i40e_prototype.h\nindex e559569..f819f9a 100644\n--- a/lib/librte_pmd_i40e/i40e/i40e_prototype.h\n+++ b/lib/librte_pmd_i40e/i40e/i40e_prototype.h\n@@ -90,6 +90,9 @@ enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw,\n \t\t\t\tu16 *fw_major_version, u16 *fw_minor_version,\n \t\t\t\tu16 *api_major_version, u16 *api_minor_version,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n+enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,\n+\t\t\t\tu32 reg_addr, u64 reg_val,\n+\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n enum i40e_status_code i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id,\n@@ -103,11 +106,11 @@ enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,\n \t\t\t\t  bool atomic_reset);\n+enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask,\n+\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n enum i40e_status_code i40e_aq_set_mac_config(struct i40e_hw *hw,\n \t\t\t\tu16 max_frame_size, bool crc_en, u16 pacing,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n-enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask,\n-\t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n enum i40e_status_code i40e_aq_get_local_advt_reg(struct i40e_hw *hw,\n \t\t\t\tu64 *advt_reg,\n \t\t\t\tstruct i40e_asq_cmd_details *cmd_details);\n",
    "prefixes": [
        "dpdk-dev",
        "11/15"
    ]
}