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GET /api/patches/29562/?format=api
{ "id": 29562, "url": "https://patches.dpdk.org/api/patches/29562/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1507042796-86318-3-git-send-email-xiaoyun.li@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1507042796-86318-3-git-send-email-xiaoyun.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1507042796-86318-3-git-send-email-xiaoyun.li@intel.com", "date": "2017-10-03T14:59:55", "name": "[dpdk-dev,v5,2/3] app/test: run-time dispatch over memcpy perf test", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "181a81bda6d98fc41bd72a5984a60498005ebb1c", "submitter": { "id": 798, "url": "https://patches.dpdk.org/api/people/798/?format=api", "name": "Li, Xiaoyun", "email": "xiaoyun.li@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1507042796-86318-3-git-send-email-xiaoyun.li@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/29562/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/29562/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 714E11B3CA;\n\tTue, 3 Oct 2017 17:01:50 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 0C0711B3C6\n\tfor <dev@dpdk.org>; Tue, 3 Oct 2017 17:01:48 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Oct 2017 08:01:48 -0700", "from dpdk-lixiaoyun.sh.intel.com ([10.67.111.93])\n\tby fmsmga005.fm.intel.com with ESMTP; 03 Oct 2017 08:01:47 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.42,474,1500966000\"; d=\"scan'208\";a=\"158303968\"", "From": "Xiaoyun Li <xiaoyun.li@intel.com>", "To": "konstantin.ananyev@intel.com,\n\tbruce.richardson@intel.com", "Cc": "wenzhuo.lu@intel.com, helin.zhang@intel.com, dev@dpdk.org,\n\tXiaoyun Li <xiaoyun.li@intel.com>", "Date": "Tue, 3 Oct 2017 22:59:55 +0800", "Message-Id": "<1507042796-86318-3-git-send-email-xiaoyun.li@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1507042796-86318-1-git-send-email-xiaoyun.li@intel.com>", "References": "<1506960796-71620-1-git-send-email-xiaoyun.li@intel.com>\n\t<1507042796-86318-1-git-send-email-xiaoyun.li@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 2/3] app/test: run-time dispatch over memcpy\n\tperf test", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch modifies assignment of alignment unit from build-time\nto run-time based on CPU flags that machine supports.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\n---\n test/test/test_memcpy_perf.c | 40 +++++++++++++++++++++++++++-------------\n 1 file changed, 27 insertions(+), 13 deletions(-)", "diff": "diff --git a/test/test/test_memcpy_perf.c b/test/test/test_memcpy_perf.c\nindex ff3aaaa..33def3b 100644\n--- a/test/test/test_memcpy_perf.c\n+++ b/test/test/test_memcpy_perf.c\n@@ -79,13 +79,7 @@ static size_t buf_sizes[TEST_VALUE_RANGE];\n #define TEST_BATCH_SIZE 100\n \n /* Data is aligned on this many bytes (power of 2) */\n-#ifdef RTE_MACHINE_CPUFLAG_AVX512F\n-#define ALIGNMENT_UNIT 64\n-#elif defined RTE_MACHINE_CPUFLAG_AVX2\n-#define ALIGNMENT_UNIT 32\n-#else /* RTE_MACHINE_CPUFLAG */\n-#define ALIGNMENT_UNIT 16\n-#endif /* RTE_MACHINE_CPUFLAG */\n+static uint8_t alignment_unit = 16;\n \n /*\n * Pointers used in performance tests. The two large buffers are for uncached\n@@ -100,20 +94,39 @@ static int\n init_buffers(void)\n {\n \tunsigned i;\n+#ifdef CC_SUPPORT_AVX512\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n+\t\talignment_unit = 64;\n+\telse\n+#endif\n+#ifdef CC_SUPPORT_AVX2\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n+\t\talignment_unit = 32;\n+\telse\n+#endif\n+\t\talignment_unit = 16;\n \n-\tlarge_buf_read = rte_malloc(\"memcpy\", LARGE_BUFFER_SIZE + ALIGNMENT_UNIT, ALIGNMENT_UNIT);\n+\tlarge_buf_read = rte_malloc(\"memcpy\",\n+\t\t\t\t LARGE_BUFFER_SIZE + alignment_unit,\n+\t\t\t\t alignment_unit);\n \tif (large_buf_read == NULL)\n \t\tgoto error_large_buf_read;\n \n-\tlarge_buf_write = rte_malloc(\"memcpy\", LARGE_BUFFER_SIZE + ALIGNMENT_UNIT, ALIGNMENT_UNIT);\n+\tlarge_buf_write = rte_malloc(\"memcpy\",\n+\t\t\t\t LARGE_BUFFER_SIZE + alignment_unit,\n+\t\t\t\t alignment_unit);\n \tif (large_buf_write == NULL)\n \t\tgoto error_large_buf_write;\n \n-\tsmall_buf_read = rte_malloc(\"memcpy\", SMALL_BUFFER_SIZE + ALIGNMENT_UNIT, ALIGNMENT_UNIT);\n+\tsmall_buf_read = rte_malloc(\"memcpy\",\n+\t\t\t\t SMALL_BUFFER_SIZE + alignment_unit,\n+\t\t\t\t alignment_unit);\n \tif (small_buf_read == NULL)\n \t\tgoto error_small_buf_read;\n \n-\tsmall_buf_write = rte_malloc(\"memcpy\", SMALL_BUFFER_SIZE + ALIGNMENT_UNIT, ALIGNMENT_UNIT);\n+\tsmall_buf_write = rte_malloc(\"memcpy\",\n+\t\t\t\t SMALL_BUFFER_SIZE + alignment_unit,\n+\t\t\t\t alignment_unit);\n \tif (small_buf_write == NULL)\n \t\tgoto error_small_buf_write;\n \n@@ -153,7 +166,7 @@ static inline size_t\n get_rand_offset(size_t uoffset)\n {\n \treturn ((rte_rand() % (LARGE_BUFFER_SIZE - SMALL_BUFFER_SIZE)) &\n-\t\t\t~(ALIGNMENT_UNIT - 1)) + uoffset;\n+\t\t\t~(alignment_unit - 1)) + uoffset;\n }\n \n /* Fill in source and destination addresses. */\n@@ -321,7 +334,8 @@ perf_test(void)\n \t\t \"(bytes) (ticks) (ticks) (ticks) (ticks)\\n\"\n \t\t \"------- -------------- -------------- -------------- --------------\");\n \n-\tprintf(\"\\n========================== %2dB aligned ============================\", ALIGNMENT_UNIT);\n+\tprintf(\"\\n========================= %2dB aligned ============================\",\n+\t\talignment_unit);\n \t/* Do aligned tests where size is a variable */\n \tperf_test_variable_aligned();\n \tprintf(\"\\n------- -------------- -------------- -------------- --------------\");\n", "prefixes": [ "dpdk-dev", "v5", "2/3" ] }