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{
    "id": 29444,
    "url": "https://patches.dpdk.org/api/patches/29444/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1506700252-34949-7-git-send-email-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1506700252-34949-7-git-send-email-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1506700252-34949-7-git-send-email-beilei.xing@intel.com",
    "date": "2017-09-29T15:50:50",
    "name": "[dpdk-dev,v7,6/8] net/i40e: add FDIR support for GTP-C and GTP-U",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6ae6b7f8e0a068a7cc8ec862252e616b0f1e7fb4",
    "submitter": {
        "id": 410,
        "url": "https://patches.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1506700252-34949-7-git-send-email-beilei.xing@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/29444/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/29444/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F09B21B1C3;\n\tFri, 29 Sep 2017 17:52:02 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id E4AAA2B9E\n\tfor <dev@dpdk.org>; Fri, 29 Sep 2017 17:51:47 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Sep 2017 08:51:47 -0700",
            "from unknown (HELO dpdk9.sh.intel.com) ([10.67.118.52])\n\tby orsmga001.jf.intel.com with ESMTP; 29 Sep 2017 08:51:45 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos; i=\"5.42,453,1500966000\"; d=\"scan'208\";\n\ta=\"1177050566\"",
        "From": "Beilei Xing <beilei.xing@intel.com>",
        "To": "jingjing.wu@intel.com",
        "Cc": "andrey.chilikin@intel.com,\n\tdev@dpdk.org",
        "Date": "Fri, 29 Sep 2017 23:50:50 +0800",
        "Message-Id": "<1506700252-34949-7-git-send-email-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.5.5",
        "In-Reply-To": "<1506700252-34949-1-git-send-email-beilei.xing@intel.com>",
        "References": "<1506662342-18966-1-git-send-email-beilei.xing@intel.com>\n\t<1506700252-34949-1-git-send-email-beilei.xing@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v7 6/8] net/i40e: add FDIR support for GTP-C and\n\tGTP-U",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch adds FDIR support for GTP-C and GTP-U. The\ninput set of GTP-C and GTP-U is TEID.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.h |  30 +++++\n drivers/net/i40e/i40e_fdir.c   | 214 ++++++++++++++++++++++++---------\n drivers/net/i40e/i40e_flow.c   | 267 +++++++++++++++++++++++++++++++++++------\n 3 files changed, 413 insertions(+), 98 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 4d690a1..502f6c6 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -460,6 +460,25 @@ struct i40e_vmdq_info {\n #define I40E_FLEX_WORD_MASK(off) (0x80 >> (off))\n #define I40E_FDIR_IPv6_TC_OFFSET\t20\n \n+/* A structure used to define the input for GTP flow */\n+struct i40e_gtp_flow {\n+\tstruct rte_eth_udpv4_flow udp; /* IPv4 UDP fields to match. */\n+\tuint8_t msg_type;              /* Message type. */\n+\tuint32_t teid;                 /* TEID in big endian. */\n+};\n+\n+/* A structure used to define the input for GTP IPV4 flow */\n+struct i40e_gtp_ipv4_flow {\n+\tstruct i40e_gtp_flow gtp;\n+\tstruct rte_eth_ipv4_flow ip4;\n+};\n+\n+/* A structure used to define the input for GTP IPV6 flow */\n+struct i40e_gtp_ipv6_flow {\n+\tstruct i40e_gtp_flow gtp;\n+\tstruct rte_eth_ipv6_flow ip6;\n+};\n+\n /*\n  * A union contains the inputs for all types of flow\n  * items in flows need to be in big endian\n@@ -474,6 +493,14 @@ union i40e_fdir_flow {\n \tstruct rte_eth_tcpv6_flow  tcp6_flow;\n \tstruct rte_eth_sctpv6_flow sctp6_flow;\n \tstruct rte_eth_ipv6_flow   ipv6_flow;\n+\tstruct i40e_gtp_flow       gtp_flow;\n+\tstruct i40e_gtp_ipv4_flow  gtp_ipv4_flow;\n+\tstruct i40e_gtp_ipv6_flow  gtp_ipv6_flow;\n+};\n+\n+enum i40e_fdir_ip_type {\n+\tI40E_FDIR_IPTYPE_IPV4,\n+\tI40E_FDIR_IPTYPE_IPV6,\n };\n \n /* A structure used to contain extend input of flow */\n@@ -483,6 +510,9 @@ struct i40e_fdir_flow_ext {\n \t/* It is filled by the flexible payload to match. */\n \tuint8_t is_vf;   /* 1 for VF, 0 for port dev */\n \tuint16_t dst_id; /* VF ID, available when is_vf is 1*/\n+\tbool inner_ip;   /* If there is inner ip */\n+\tenum i40e_fdir_ip_type iip_type; /* ip type for inner ip */\n+\tbool customized_pctype; /* If customized pctype is used */\n };\n \n /* A structure used to define the input for a flow director filter entry */\ndiff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c\nindex e9e2f44..bab8981 100644\n--- a/drivers/net/i40e/i40e_fdir.c\n+++ b/drivers/net/i40e/i40e_fdir.c\n@@ -71,6 +71,16 @@\n #define I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS   0xFF\n #define I40E_FDIR_IPv6_PAYLOAD_LEN          380\n #define I40E_FDIR_UDP_DEFAULT_LEN           400\n+#define I40E_FDIR_GTP_DEFAULT_LEN           384\n+#define I40E_FDIR_INNER_IP_DEFAULT_LEN      384\n+#define I40E_FDIR_INNER_IPV6_DEFAULT_LEN    344\n+\n+#define I40E_FDIR_GTPC_DST_PORT             2123\n+#define I40E_FDIR_GTPU_DST_PORT             2152\n+#define I40E_FDIR_GTP_VER_FLAG_0X30         0x30\n+#define I40E_FDIR_GTP_VER_FLAG_0X32         0x32\n+#define I40E_FDIR_GTP_MSG_TYPE_0X01         0x01\n+#define I40E_FDIR_GTP_MSG_TYPE_0XFF         0xFF\n \n /* Wait time for fdir filter programming */\n #define I40E_FDIR_MAX_WAIT_US 10000\n@@ -939,16 +949,34 @@ i40e_fdir_construct_pkt(struct i40e_pf *pf,\n \treturn 0;\n }\n \n+static struct i40e_customized_pctype *\n+i40e_flow_fdir_find_customized_pctype(struct i40e_pf *pf, uint8_t pctype)\n+{\n+\tstruct i40e_customized_pctype *cus_pctype;\n+\tenum i40e_new_pctype i = I40E_CUSTOMIZED_GTPC;\n+\n+\tfor (; i < I40E_CUSTOMIZED_MAX; i++) {\n+\t\tcus_pctype = &pf->customized_pctype[i];\n+\t\tif (pctype == cus_pctype->pctype)\n+\t\t\treturn cus_pctype;\n+\t}\n+\treturn NULL;\n+}\n+\n static inline int\n-i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n+i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf,\n+\t\t\t\tconst struct i40e_fdir_input *fdir_input,\n \t\t\t\tunsigned char *raw_pkt,\n \t\t\t\tbool vlan)\n {\n+\tstruct i40e_customized_pctype *cus_pctype = NULL;\n \tstatic uint8_t vlan_frame[] = {0x81, 0, 0, 0};\n \tuint16_t *ether_type;\n \tuint8_t len = 2 * sizeof(struct ether_addr);\n \tstruct ipv4_hdr *ip;\n \tstruct ipv6_hdr *ip6;\n+\tuint8_t pctype = fdir_input->pctype;\n+\tbool is_customized_pctype = fdir_input->flow_ext.customized_pctype;\n \tstatic const uint8_t next_proto[] = {\n \t\t[I40E_FILTER_PCTYPE_FRAG_IPV4] = IPPROTO_IP,\n \t\t[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] = IPPROTO_TCP,\n@@ -975,27 +1003,30 @@ i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n \traw_pkt += sizeof(uint16_t);\n \tlen += sizeof(uint16_t);\n \n-\tswitch (fdir_input->pctype) {\n-\tcase I40E_FILTER_PCTYPE_L2_PAYLOAD:\n+\tif (is_customized_pctype) {\n+\t\tcus_pctype = i40e_flow_fdir_find_customized_pctype(pf, pctype);\n+\t\tif (!cus_pctype)\n+\t\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n+\t\t\t\t    fdir_input->pctype);\n+\t}\n+\n+\tif (pctype == I40E_FILTER_PCTYPE_L2_PAYLOAD)\n \t\t*ether_type = fdir_input->flow.l2_flow.ether_type;\n-\t\tbreak;\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_TCP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_UDP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_SCTP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_OTHER:\n-\tcase I40E_FILTER_PCTYPE_FRAG_IPV4:\n+\telse if (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_TCP ||\n+\t\t pctype == I40E_FILTER_PCTYPE_NONF_IPV4_UDP ||\n+\t\t pctype == I40E_FILTER_PCTYPE_NONF_IPV4_SCTP ||\n+\t\t pctype == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER ||\n+\t\t pctype == I40E_FILTER_PCTYPE_FRAG_IPV4 ||\n+\t\t is_customized_pctype) {\n \t\tip = (struct ipv4_hdr *)raw_pkt;\n \n \t\t*ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv4);\n \t\tip->version_ihl = I40E_FDIR_IP_DEFAULT_VERSION_IHL;\n \t\t/* set len to by default */\n \t\tip->total_length = rte_cpu_to_be_16(I40E_FDIR_IP_DEFAULT_LEN);\n-\t\tip->next_proto_id = fdir_input->flow.ip4_flow.proto ?\n-\t\t\t\t\tfdir_input->flow.ip4_flow.proto :\n-\t\t\t\t\tnext_proto[fdir_input->pctype];\n \t\tip->time_to_live = fdir_input->flow.ip4_flow.ttl ?\n-\t\t\t\t\tfdir_input->flow.ip4_flow.ttl :\n-\t\t\t\t\tI40E_FDIR_IP_DEFAULT_TTL;\n+\t\t\tfdir_input->flow.ip4_flow.ttl :\n+\t\t\tI40E_FDIR_IP_DEFAULT_TTL;\n \t\tip->type_of_service = fdir_input->flow.ip4_flow.tos;\n \t\t/**\n \t\t * The source and destination fields in the transmitted packet\n@@ -1004,13 +1035,22 @@ i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n \t\t */\n \t\tip->src_addr = fdir_input->flow.ip4_flow.dst_ip;\n \t\tip->dst_addr = fdir_input->flow.ip4_flow.src_ip;\n+\n+\t\tif (!is_customized_pctype)\n+\t\t\tip->next_proto_id = fdir_input->flow.ip4_flow.proto ?\n+\t\t\t\tfdir_input->flow.ip4_flow.proto :\n+\t\t\t\tnext_proto[fdir_input->pctype];\n+\t\telse if (cus_pctype->index == I40E_CUSTOMIZED_GTPC ||\n+\t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV4 ||\n+\t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV6 ||\n+\t\t\t cus_pctype->index == I40E_CUSTOMIZED_GTPU)\n+\t\t\tip->next_proto_id = IPPROTO_UDP;\n \t\tlen += sizeof(struct ipv4_hdr);\n-\t\tbreak;\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_TCP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_UDP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_SCTP:\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_OTHER:\n-\tcase I40E_FILTER_PCTYPE_FRAG_IPV6:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_TCP ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_NONF_IPV6_UDP ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_NONF_IPV6_SCTP ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_NONF_IPV6_OTHER ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_FRAG_IPV6) {\n \t\tip6 = (struct ipv6_hdr *)raw_pkt;\n \n \t\t*ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv6);\n@@ -1021,11 +1061,11 @@ i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n \t\tip6->payload_len =\n \t\t\trte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN);\n \t\tip6->proto = fdir_input->flow.ipv6_flow.proto ?\n-\t\t\t\t\tfdir_input->flow.ipv6_flow.proto :\n-\t\t\t\t\tnext_proto[fdir_input->pctype];\n+\t\t\tfdir_input->flow.ipv6_flow.proto :\n+\t\t\tnext_proto[fdir_input->pctype];\n \t\tip6->hop_limits = fdir_input->flow.ipv6_flow.hop_limits ?\n-\t\t\t\t\tfdir_input->flow.ipv6_flow.hop_limits :\n-\t\t\t\t\tI40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;\n+\t\t\tfdir_input->flow.ipv6_flow.hop_limits :\n+\t\t\tI40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;\n \t\t/**\n \t\t * The source and destination fields in the transmitted packet\n \t\t * need to be presented in a reversed order with respect\n@@ -1038,12 +1078,12 @@ i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n \t\t\t   &fdir_input->flow.ipv6_flow.src_ip,\n \t\t\t   IPV6_ADDR_LEN);\n \t\tlen += sizeof(struct ipv6_hdr);\n-\t\tbreak;\n-\tdefault:\n+\t} else {\n \t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n \t\t\t    fdir_input->pctype);\n \t\treturn -1;\n \t}\n+\n \treturn len;\n }\n \n@@ -1057,23 +1097,28 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\t\t     const struct i40e_fdir_input *fdir_input,\n \t\t\t     unsigned char *raw_pkt)\n {\n-\tunsigned char *payload, *ptr;\n+\tunsigned char *payload = NULL;\n+\tunsigned char *ptr;\n \tstruct udp_hdr *udp;\n \tstruct tcp_hdr *tcp;\n \tstruct sctp_hdr *sctp;\n+\tstruct rte_flow_item_gtp *gtp;\n+\tstruct ipv4_hdr *gtp_ipv4;\n+\tstruct ipv6_hdr *gtp_ipv6;\n \tuint8_t size, dst = 0;\n \tuint8_t i, pit_idx, set_idx = I40E_FLXPLD_L4_IDX; /* use l4 by default*/\n \tint len;\n+\tuint8_t pctype = fdir_input->pctype;\n+\tstruct i40e_customized_pctype *cus_pctype;\n \n \t/* fill the ethernet and IP head */\n-\tlen = i40e_flow_fdir_fill_eth_ip_head(fdir_input, raw_pkt,\n+\tlen = i40e_flow_fdir_fill_eth_ip_head(pf, fdir_input, raw_pkt,\n \t\t\t\t\t      !!fdir_input->flow_ext.vlan_tci);\n \tif (len < 0)\n \t\treturn -EINVAL;\n \n \t/* fill the L4 head */\n-\tswitch (fdir_input->pctype) {\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_UDP:\n+\tif (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_UDP) {\n \t\tudp = (struct udp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)udp + sizeof(struct udp_hdr);\n \t\t/**\n@@ -1084,9 +1129,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\tudp->src_port = fdir_input->flow.udp4_flow.dst_port;\n \t\tudp->dst_port = fdir_input->flow.udp4_flow.src_port;\n \t\tudp->dgram_len = rte_cpu_to_be_16(I40E_FDIR_UDP_DEFAULT_LEN);\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_TCP:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_TCP) {\n \t\ttcp = (struct tcp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)tcp + sizeof(struct tcp_hdr);\n \t\t/**\n@@ -1097,9 +1140,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\ttcp->src_port = fdir_input->flow.tcp4_flow.dst_port;\n \t\ttcp->dst_port = fdir_input->flow.tcp4_flow.src_port;\n \t\ttcp->data_off = I40E_FDIR_TCP_DEFAULT_DATAOFF;\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_SCTP:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) {\n \t\tsctp = (struct sctp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)sctp + sizeof(struct sctp_hdr);\n \t\t/**\n@@ -1110,15 +1151,11 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\tsctp->src_port = fdir_input->flow.sctp4_flow.dst_port;\n \t\tsctp->dst_port = fdir_input->flow.sctp4_flow.src_port;\n \t\tsctp->tag = fdir_input->flow.sctp4_flow.verify_tag;\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV4_OTHER:\n-\tcase I40E_FILTER_PCTYPE_FRAG_IPV4:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_FRAG_IPV4) {\n \t\tpayload = raw_pkt + len;\n \t\tset_idx = I40E_FLXPLD_L3_IDX;\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_UDP:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_UDP) {\n \t\tudp = (struct udp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)udp + sizeof(struct udp_hdr);\n \t\t/**\n@@ -1129,9 +1166,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\tudp->src_port = fdir_input->flow.udp6_flow.dst_port;\n \t\tudp->dst_port = fdir_input->flow.udp6_flow.src_port;\n \t\tudp->dgram_len = rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN);\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_TCP:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_TCP) {\n \t\ttcp = (struct tcp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)tcp + sizeof(struct tcp_hdr);\n \t\t/**\n@@ -1142,9 +1177,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\ttcp->data_off = I40E_FDIR_TCP_DEFAULT_DATAOFF;\n \t\ttcp->src_port = fdir_input->flow.udp6_flow.dst_port;\n \t\ttcp->dst_port = fdir_input->flow.udp6_flow.src_port;\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_SCTP:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) {\n \t\tsctp = (struct sctp_hdr *)(raw_pkt + len);\n \t\tpayload = (unsigned char *)sctp + sizeof(struct sctp_hdr);\n \t\t/**\n@@ -1155,14 +1188,11 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\tsctp->src_port = fdir_input->flow.sctp6_flow.dst_port;\n \t\tsctp->dst_port = fdir_input->flow.sctp6_flow.src_port;\n \t\tsctp->tag = fdir_input->flow.sctp6_flow.verify_tag;\n-\t\tbreak;\n-\n-\tcase I40E_FILTER_PCTYPE_NONF_IPV6_OTHER:\n-\tcase I40E_FILTER_PCTYPE_FRAG_IPV6:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_OTHER ||\n+\t\t   pctype == I40E_FILTER_PCTYPE_FRAG_IPV6) {\n \t\tpayload = raw_pkt + len;\n \t\tset_idx = I40E_FLXPLD_L3_IDX;\n-\t\tbreak;\n-\tcase I40E_FILTER_PCTYPE_L2_PAYLOAD:\n+\t} else if (pctype == I40E_FILTER_PCTYPE_L2_PAYLOAD) {\n \t\tpayload = raw_pkt + len;\n \t\t/**\n \t\t * ARP packet is a special case on which the payload\n@@ -1172,10 +1202,76 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n \t\t\t\trte_cpu_to_be_16(ETHER_TYPE_ARP))\n \t\t\tpayload += sizeof(struct arp_hdr);\n \t\tset_idx = I40E_FLXPLD_L2_IDX;\n-\t\tbreak;\n-\tdefault:\n-\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\", fdir_input->pctype);\n-\t\treturn -EINVAL;\n+\t} else if (fdir_input->flow_ext.customized_pctype) {\n+\t\t/* If customized pctype is used */\n+\t\tcus_pctype = i40e_flow_fdir_find_customized_pctype(pf, pctype);\n+\t\tif (cus_pctype->index == I40E_CUSTOMIZED_GTPC ||\n+\t\t    cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV4 ||\n+\t\t    cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV6 ||\n+\t\t    cus_pctype->index == I40E_CUSTOMIZED_GTPU) {\n+\t\t\tudp = (struct udp_hdr *)(raw_pkt + len);\n+\t\t\tudp->dgram_len =\n+\t\t\t\trte_cpu_to_be_16(I40E_FDIR_UDP_DEFAULT_LEN);\n+\n+\t\t\tgtp = (struct rte_flow_item_gtp *)\n+\t\t\t\t((unsigned char *)udp + sizeof(struct udp_hdr));\n+\t\t\tgtp->msg_len =\n+\t\t\t\trte_cpu_to_be_16(I40E_FDIR_GTP_DEFAULT_LEN);\n+\t\t\tgtp->teid = fdir_input->flow.gtp_flow.teid;\n+\t\t\tgtp->msg_type = I40E_FDIR_GTP_MSG_TYPE_0X01;\n+\n+\t\t\t/* GTP-C message type is not supported. */\n+\t\t\tif (cus_pctype->index == I40E_CUSTOMIZED_GTPC) {\n+\t\t\t\tudp->dst_port =\n+\t\t\t\t      rte_cpu_to_be_16(I40E_FDIR_GTPC_DST_PORT);\n+\t\t\t\tgtp->v_pt_rsv_flags =\n+\t\t\t\t\tI40E_FDIR_GTP_VER_FLAG_0X32;\n+\t\t\t} else {\n+\t\t\t\tudp->dst_port =\n+\t\t\t\t      rte_cpu_to_be_16(I40E_FDIR_GTPU_DST_PORT);\n+\t\t\t\tgtp->v_pt_rsv_flags =\n+\t\t\t\t\tI40E_FDIR_GTP_VER_FLAG_0X30;\n+\t\t\t}\n+\n+\t\t\tif (cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV4) {\n+\t\t\t\tgtp->msg_type = I40E_FDIR_GTP_MSG_TYPE_0XFF;\n+\t\t\t\tgtp_ipv4 = (struct ipv4_hdr *)\n+\t\t\t\t\t((unsigned char *)gtp +\n+\t\t\t\t\t sizeof(struct rte_flow_item_gtp));\n+\t\t\t\tgtp_ipv4->version_ihl =\n+\t\t\t\t\tI40E_FDIR_IP_DEFAULT_VERSION_IHL;\n+\t\t\t\tgtp_ipv4->next_proto_id = IPPROTO_IP;\n+\t\t\t\tgtp_ipv4->total_length =\n+\t\t\t\t\trte_cpu_to_be_16(\n+\t\t\t\t\t\tI40E_FDIR_INNER_IP_DEFAULT_LEN);\n+\t\t\t\tpayload = (unsigned char *)gtp_ipv4 +\n+\t\t\t\t\tsizeof(struct ipv4_hdr);\n+\t\t\t} else if (cus_pctype->index ==\n+\t\t\t\t   I40E_CUSTOMIZED_GTPU_IPV6) {\n+\t\t\t\tgtp->msg_type = I40E_FDIR_GTP_MSG_TYPE_0XFF;\n+\t\t\t\tgtp_ipv6 = (struct ipv6_hdr *)\n+\t\t\t\t\t((unsigned char *)gtp +\n+\t\t\t\t\t sizeof(struct rte_flow_item_gtp));\n+\t\t\t\tgtp_ipv6->vtc_flow =\n+\t\t\t\t\trte_cpu_to_be_32(\n+\t\t\t\t\t       I40E_FDIR_IPv6_DEFAULT_VTC_FLOW |\n+\t\t\t\t\t       (0 << I40E_FDIR_IPv6_TC_OFFSET));\n+\t\t\t\tgtp_ipv6->proto = IPPROTO_NONE;\n+\t\t\t\tgtp_ipv6->payload_len =\n+\t\t\t\t\trte_cpu_to_be_16(\n+\t\t\t\t\t      I40E_FDIR_INNER_IPV6_DEFAULT_LEN);\n+\t\t\t\tgtp_ipv6->hop_limits =\n+\t\t\t\t\tI40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;\n+\t\t\t\tpayload = (unsigned char *)gtp_ipv6 +\n+\t\t\t\t\tsizeof(struct ipv6_hdr);\n+\t\t\t} else\n+\t\t\t\tpayload = (unsigned char *)gtp +\n+\t\t\t\t\tsizeof(struct rte_flow_item_gtp);\n+\t\t}\n+\t} else {\n+\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n+\t\t\t    fdir_input->pctype);\n+\t\treturn -1;\n \t}\n \n \t/* fill the flexbytes to payload */\ndiff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex 73af7fd..370c93b 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -189,6 +189,40 @@ static enum rte_flow_item_type pattern_fdir_ipv4_sctp[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n+static enum rte_flow_item_type pattern_fdir_ipv4_gtpc[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPC,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv4_gtpu[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv4_gtpu_ipv4[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv4_gtpu_ipv6[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n static enum rte_flow_item_type pattern_fdir_ipv6[] = {\n \tRTE_FLOW_ITEM_TYPE_ETH,\n \tRTE_FLOW_ITEM_TYPE_IPV6,\n@@ -216,6 +250,40 @@ static enum rte_flow_item_type pattern_fdir_ipv6_sctp[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n+static enum rte_flow_item_type pattern_fdir_ipv6_gtpc[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPC,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv6_gtpu[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv6_gtpu_ipv4[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_IPV4,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n+static enum rte_flow_item_type pattern_fdir_ipv6_gtpu_ipv6[] = {\n+\tRTE_FLOW_ITEM_TYPE_ETH,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_UDP,\n+\tRTE_FLOW_ITEM_TYPE_GTPU,\n+\tRTE_FLOW_ITEM_TYPE_IPV6,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n static enum rte_flow_item_type pattern_fdir_ethertype_raw_1[] = {\n \tRTE_FLOW_ITEM_TYPE_ETH,\n \tRTE_FLOW_ITEM_TYPE_RAW,\n@@ -1576,10 +1644,18 @@ static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t{ pattern_fdir_ipv4_udp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv4_tcp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv4_sctp, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_gtpc, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_gtpu, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_gtpu_ipv4, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv4_gtpu_ipv6, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_udp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_tcp, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_sctp, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_gtpc, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_gtpu, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_gtpu_ipv4, i40e_flow_parse_fdir_filter },\n+\t{ pattern_fdir_ipv6_gtpu_ipv6, i40e_flow_parse_fdir_filter },\n \t/* FDIR - support default flow type with flexible payload */\n \t{ pattern_fdir_ethertype_raw_1, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ethertype_raw_2, i40e_flow_parse_fdir_filter },\n@@ -2302,14 +2378,52 @@ i40e_flow_set_fdir_inset(struct i40e_pf *pf,\n \treturn 0;\n }\n \n+static uint8_t\n+i40e_flow_fdir_get_pctype_value(struct i40e_pf *pf,\n+\t\t\t\tenum rte_flow_item_type item_type,\n+\t\t\t\tstruct i40e_fdir_filter_conf *filter)\n+{\n+\tstruct i40e_customized_pctype *cus_pctype = NULL;\n+\n+\tswitch (item_type) {\n+\tcase RTE_FLOW_ITEM_TYPE_GTPC:\n+\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\t\t I40E_CUSTOMIZED_GTPC);\n+\t\tbreak;\n+\tcase RTE_FLOW_ITEM_TYPE_GTPU:\n+\t\tif (!filter->input.flow_ext.inner_ip)\n+\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\t\t I40E_CUSTOMIZED_GTPU);\n+\t\telse if (filter->input.flow_ext.iip_type ==\n+\t\t\t I40E_FDIR_IPTYPE_IPV4)\n+\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\t I40E_CUSTOMIZED_GTPU_IPV4);\n+\t\telse if (filter->input.flow_ext.iip_type ==\n+\t\t\t I40E_FDIR_IPTYPE_IPV6)\n+\t\t\tcus_pctype = i40e_find_customized_pctype(pf,\n+\t\t\t\t\t\t I40E_CUSTOMIZED_GTPU_IPV6);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"Unsupported item type\");\n+\t\tbreak;\n+\t}\n+\n+\tif (cus_pctype)\n+\t\treturn cus_pctype->pctype;\n+\n+\treturn I40E_FILTER_PCTYPE_INVALID;\n+}\n+\n /* 1. Last in item should be NULL as range is not supported.\n  * 2. Supported patterns: refer to array i40e_supported_patterns.\n- * 3. Supported flow type and input set: refer to array\n+ * 3. Default supported flow type and input set: refer to array\n  *    valid_fdir_inset_table in i40e_ethdev.c.\n  * 4. Mask of fields which need to be matched should be\n  *    filled with 1.\n  * 5. Mask of fields which needn't to be matched should be\n  *    filled with 0.\n+ * 6. GTP profile supports GTPv1 only.\n+ * 7. GTP-C response message ('source_port' = 2123) is not supported.\n  */\n static int\n i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n@@ -2326,14 +2440,16 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \tconst struct rte_flow_item_tcp *tcp_spec, *tcp_mask;\n \tconst struct rte_flow_item_udp *udp_spec, *udp_mask;\n \tconst struct rte_flow_item_sctp *sctp_spec, *sctp_mask;\n+\tconst struct rte_flow_item_gtp *gtp_spec, *gtp_mask;\n \tconst struct rte_flow_item_raw *raw_spec, *raw_mask;\n \tconst struct rte_flow_item_vf *vf_spec;\n \n-\tenum i40e_filter_pctype pctype = 0;\n+\tuint8_t pctype = 0;\n \tuint64_t input_set = I40E_INSET_NONE;\n \tuint16_t frag_off;\n \tenum rte_flow_item_type item_type;\n \tenum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;\n+\tenum rte_flow_item_type cus_proto = RTE_FLOW_ITEM_TYPE_END;\n \tuint32_t i, j;\n \tuint8_t  ipv6_addr_mask[16] = {\n \t\t0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n@@ -2351,12 +2467,14 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \tuint16_t outer_tpid;\n \tuint16_t ether_type;\n \tuint32_t vtc_flow_cpu;\n+\tbool outer_ip = true;\n \tint ret;\n \n \tmemset(off_arr, 0, sizeof(off_arr));\n \tmemset(len_arr, 0, sizeof(len_arr));\n \tmemset(flex_mask, 0, I40E_FDIR_MAX_FLEX_LEN);\n \touter_tpid = i40e_get_outer_vlan(dev);\n+\tfilter->input.flow_ext.customized_pctype = false;\n \tfor (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n \t\tif (item->last) {\n \t\t\trte_flow_error_set(error, EINVAL,\n@@ -2430,7 +2548,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\tipv4_mask =\n \t\t\t\t(const struct rte_flow_item_ipv4 *)item->mask;\n \n-\t\t\tif (ipv4_spec && ipv4_mask) {\n+\t\t\tif (ipv4_spec && ipv4_mask && outer_ip) {\n \t\t\t\t/* Check IPv4 mask and update input set */\n \t\t\t\tif (ipv4_mask->hdr.version_ihl ||\n \t\t\t\t    ipv4_mask->hdr.total_length ||\n@@ -2475,9 +2593,22 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t\tipv4_spec->hdr.src_addr;\n \t\t\t\tfilter->input.flow.ip4_flow.dst_ip =\n \t\t\t\t\tipv4_spec->hdr.dst_addr;\n+\n+\t\t\t\tlayer_idx = I40E_FLXPLD_L3_IDX;\n+\t\t\t} else if (!ipv4_spec && !ipv4_mask && !outer_ip) {\n+\t\t\t\tfilter->input.flow_ext.inner_ip = true;\n+\t\t\t\tfilter->input.flow_ext.iip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV4;\n+\t\t\t} else if ((ipv4_spec || ipv4_mask) && !outer_ip) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Invalid inner IPv4 mask.\");\n+\t\t\t\treturn -rte_errno;\n \t\t\t}\n \n-\t\t\tlayer_idx = I40E_FLXPLD_L3_IDX;\n+\t\t\tif (outer_ip)\n+\t\t\t\touter_ip = false;\n \n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_IPV6:\n@@ -2487,7 +2618,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\tipv6_mask =\n \t\t\t\t(const struct rte_flow_item_ipv6 *)item->mask;\n \n-\t\t\tif (ipv6_spec && ipv6_mask) {\n+\t\t\tif (ipv6_spec && ipv6_mask && outer_ip) {\n \t\t\t\t/* Check IPv6 mask and update input set */\n \t\t\t\tif (ipv6_mask->hdr.payload_len) {\n \t\t\t\t\trte_flow_error_set(error, EINVAL,\n@@ -2538,10 +2669,22 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\telse\n \t\t\t\t\tpctype =\n \t\t\t\t\t     I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;\n-\t\t\t}\n \n-\t\t\tlayer_idx = I40E_FLXPLD_L3_IDX;\n+\t\t\t\tlayer_idx = I40E_FLXPLD_L3_IDX;\n+\t\t\t} else if (!ipv6_spec && !ipv6_mask && !outer_ip) {\n+\t\t\t\tfilter->input.flow_ext.inner_ip = true;\n+\t\t\t\tfilter->input.flow_ext.iip_type =\n+\t\t\t\t\tI40E_FDIR_IPTYPE_IPV6;\n+\t\t\t} else if ((ipv6_spec || ipv6_mask) && !outer_ip) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Invalid inner IPv6 mask\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n \n+\t\t\tif (outer_ip)\n+\t\t\t\touter_ip = false;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_TCP:\n \t\t\ttcp_spec = (const struct rte_flow_item_tcp *)item->spec;\n@@ -2636,6 +2779,37 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\tlayer_idx = I40E_FLXPLD_L4_IDX;\n \n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_GTPC:\n+\t\tcase RTE_FLOW_ITEM_TYPE_GTPU:\n+\t\t\tif (!pf->gtp_support) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Unsupported protocol\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tgtp_spec = (const struct rte_flow_item_gtp *)item->spec;\n+\t\t\tgtp_mask = (const struct rte_flow_item_gtp *)item->mask;\n+\n+\t\t\tif (gtp_spec && gtp_mask) {\n+\t\t\t\tif (gtp_mask->v_pt_rsv_flags ||\n+\t\t\t\t    gtp_mask->msg_type ||\n+\t\t\t\t    gtp_mask->msg_len ||\n+\t\t\t\t    gtp_mask->teid != UINT32_MAX) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t   item,\n+\t\t\t\t\t\t   \"Invalid GTP mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tfilter->input.flow.gtp_flow.teid =\n+\t\t\t\t\tgtp_spec->teid;\n+\t\t\t\tfilter->input.flow_ext.customized_pctype = true;\n+\t\t\t\tcus_proto = item_type;\n+\t\t\t}\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_SCTP:\n \t\t\tsctp_spec =\n \t\t\t\t(const struct rte_flow_item_sctp *)item->spec;\n@@ -2774,43 +2948,58 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t}\n \t}\n \n-\tret = i40e_flow_set_fdir_inset(pf, pctype, input_set);\n-\tif (ret == -1) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM, item,\n-\t\t\t\t   \"Conflict with the first rule's input set.\");\n-\t\treturn -rte_errno;\n-\t} else if (ret == -EINVAL) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM, item,\n-\t\t\t\t   \"Invalid pattern mask.\");\n-\t\treturn -rte_errno;\n+\t/* Get customized pctype value */\n+\tif (filter->input.flow_ext.customized_pctype) {\n+\t\tpctype = i40e_flow_fdir_get_pctype_value(pf, cus_proto, filter);\n+\t\tif (pctype == I40E_FILTER_PCTYPE_INVALID) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t   item,\n+\t\t\t\t\t   \"Unsupported pctype\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n \t}\n \n-\tfilter->input.pctype = pctype;\n+\t/* If customized pctype is not used, set fdir configuration.*/\n+\tif (!filter->input.flow_ext.customized_pctype) {\n+\t\tret = i40e_flow_set_fdir_inset(pf, pctype, input_set);\n+\t\tif (ret == -1) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t   \"Conflict with the first rule's input set.\");\n+\t\t\treturn -rte_errno;\n+\t\t} else if (ret == -EINVAL) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t   \"Invalid pattern mask.\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n \n-\t/* Store flex mask to SW */\n-\tret = i40e_flow_store_flex_mask(pf, pctype, flex_mask);\n-\tif (ret == -1) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\t\t   item,\n-\t\t\t\t   \"Exceed maximal number of bitmasks\");\n-\t\treturn -rte_errno;\n-\t} else if (ret == -2) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n-\t\t\t\t   item,\n-\t\t\t\t   \"Conflict with the first flexible rule\");\n-\t\treturn -rte_errno;\n-\t} else if (ret > 0)\n-\t\tcfg_flex_msk = false;\n+\t\t/* Store flex mask to SW */\n+\t\tret = i40e_flow_store_flex_mask(pf, pctype, flex_mask);\n+\t\tif (ret == -1) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t   item,\n+\t\t\t\t\t   \"Exceed maximal number of bitmasks\");\n+\t\t\treturn -rte_errno;\n+\t\t} else if (ret == -2) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t   item,\n+\t\t\t\t\t   \"Conflict with the first flexible rule\");\n+\t\t\treturn -rte_errno;\n+\t\t} else if (ret > 0)\n+\t\t\tcfg_flex_msk = false;\n \n-\tif (cfg_flex_pit)\n-\t\ti40e_flow_set_fdir_flex_pit(pf, layer_idx, raw_id);\n+\t\tif (cfg_flex_pit)\n+\t\t\ti40e_flow_set_fdir_flex_pit(pf, layer_idx, raw_id);\n \n-\tif (cfg_flex_msk)\n-\t\ti40e_flow_set_fdir_flex_msk(pf, pctype);\n+\t\tif (cfg_flex_msk)\n+\t\t\ti40e_flow_set_fdir_flex_msk(pf, pctype);\n+\t}\n+\n+\tfilter->input.pctype = pctype;\n \n \treturn 0;\n }\n",
    "prefixes": [
        "dpdk-dev",
        "v7",
        "6/8"
    ]
}