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GET /api/patches/28440/?format=api
{ "id": 28440, "url": "https://patches.dpdk.org/api/patches/28440/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1504783263-20575-7-git-send-email-beilei.xing@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1504783263-20575-7-git-send-email-beilei.xing@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1504783263-20575-7-git-send-email-beilei.xing@intel.com", "date": "2017-09-07T11:21:03", "name": "[dpdk-dev,v2,6/6] net/i40e: enable cloud filter for GTP-C and GTP-U", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "10a7eb6f9c9f15025730174699659a16098559e1", "submitter": { "id": 410, "url": "https://patches.dpdk.org/api/people/410/?format=api", "name": "Xing, Beilei", "email": "beilei.xing@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1504783263-20575-7-git-send-email-beilei.xing@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/28440/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/28440/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id DA778199CF;\n\tThu, 7 Sep 2017 13:21:12 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 6E7A2199B8\n\tfor <dev@dpdk.org>; Thu, 7 Sep 2017 13:21:07 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga105.fm.intel.com with ESMTP; 07 Sep 2017 04:21:07 -0700", "from unknown (HELO dpdk9.sh.intel.com) ([10.67.118.52])\n\tby orsmga005.jf.intel.com with ESMTP; 07 Sep 2017 04:21:06 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.42,358,1500966000\"; d=\"scan'208\";a=\"146527097\"", "From": "Beilei Xing <beilei.xing@intel.com>", "To": "jingjing.wu@intel.com", "Cc": "andrey.chilikin@intel.com,\n\tdev@dpdk.org", "Date": "Thu, 7 Sep 2017 19:21:03 +0800", "Message-Id": "<1504783263-20575-7-git-send-email-beilei.xing@intel.com>", "X-Mailer": "git-send-email 2.5.5", "In-Reply-To": "<1504783263-20575-1-git-send-email-beilei.xing@intel.com>", "References": "<1503647430-93905-2-git-send-email-beilei.xing@intel.com>\n\t<1504783263-20575-1-git-send-email-beilei.xing@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 6/6] net/i40e: enable cloud filter for GTP-C\n\tand GTP-U", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "GTP-C & GTP-U are not supported by cloud filter due\nto limited resource of HW, this patch enables GTP-C\nand GTP-U cloud filter by replacing inner_mac and\nTUNNEL_KEY.\nThis configuration will be set when adding GTP-C or\nGTP-U filter rules, and it will be invalid only by\nNIC core reset.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 187 +++++++++++++++++++++++++++++++++++++----\n drivers/net/i40e/i40e_ethdev.h | 11 ++-\n drivers/net/i40e/i40e_flow.c | 26 ++++--\n 3 files changed, 196 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 18b3d8c..06e6ee0 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -7132,7 +7132,7 @@ i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf)\n \t/* create L1 filter */\n \tfilter_replace.old_filter_type =\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IMAC;\n-\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;\n+\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_0X11;\n \tfilter_replace.tr_bit = 0;\n \n \t/* Prepare the buffer, 3 entries */\n@@ -7180,12 +7180,12 @@ i40e_status_code i40e_replace_mpls_cloud_filter(struct i40e_pf *pf)\n \t\tI40E_AQC_MIRROR_CLOUD_FILTER;\n \tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IIP;\n \tfilter_replace.new_filter_type =\n-\t\tI40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP;\n+\t\tI40E_AQC_ADD_CLOUD_FILTER_0X11;\n \t/* Prepare the buffer, 2 entries */\n \tfilter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n \tfilter_replace_buf.data[0] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n-\tfilter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;\n+\tfilter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_0X11;\n \tfilter_replace_buf.data[4] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n \tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n@@ -7203,12 +7203,129 @@ i40e_status_code i40e_replace_mpls_cloud_filter(struct i40e_pf *pf)\n \t\tI40E_AQC_MIRROR_CLOUD_FILTER;\n \tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IMAC;\n \tfilter_replace.new_filter_type =\n-\t\tI40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE;\n+\t\tI40E_AQC_ADD_CLOUD_FILTER_0X12;\n \t/* Prepare the buffer, 2 entries */\n \tfilter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n \tfilter_replace_buf.data[0] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n-\tfilter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_TEID_MPLS;\n+\tfilter_replace_buf.data[4] = I40E_AQC_ADD_L1_FILTER_0X11;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\treturn status;\n+}\n+\n+static enum i40e_status_code\n+i40e_replace_gtp_l1_filter(struct i40e_pf *pf)\n+{\n+\tstruct i40e_aqc_replace_cloud_filters_cmd filter_replace;\n+\tstruct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tenum i40e_status_code status = I40E_SUCCESS;\n+\n+\t/* For GTP-C */\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\t/* create L1 filter */\n+\tfilter_replace.old_filter_type =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IMAC;\n+\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_0X12;\n+\tfilter_replace.tr_bit = 22 | 0x80;\n+\t/* Prepare the buffer, 2 entries */\n+\tfilter_replace_buf.data[0] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[2] = 0xFF;\n+\tfilter_replace_buf.data[3] = 0xFF;\n+\tfilter_replace_buf.data[4] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[6] = 0xFF;\n+\tfilter_replace_buf.data[7] = 0xFF;\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\tif (status < 0)\n+\t\treturn status;\n+\n+\t/* for GTP-U */\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\t/* create L1 filter */\n+\tfilter_replace.old_filter_type =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TUNNLE_KEY;\n+\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_0X13;\n+\tfilter_replace.tr_bit = 21 | 0x80;\n+\t/* Prepare the buffer, 2 entries */\n+\tfilter_replace_buf.data[0] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[2] = 0xFF;\n+\tfilter_replace_buf.data[3] = 0xFF;\n+\tfilter_replace_buf.data[4] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[6] = 0xFF;\n+\tfilter_replace_buf.data[7] = 0xFF;\n+\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\treturn status;\n+}\n+\n+static enum\n+i40e_status_code i40e_replace_gtp_cloud_filter(struct i40e_pf *pf)\n+{\n+\tstruct i40e_aqc_replace_cloud_filters_cmd filter_replace;\n+\tstruct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tenum i40e_status_code status = I40E_SUCCESS;\n+\n+\t/* for GTP-C */\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\tfilter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER;\n+\tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN;\n+\tfilter_replace.new_filter_type =\n+\t\tI40E_AQC_ADD_CLOUD_FILTER_0X11;\n+\t/* Prepare the buffer, 2 entries */\n+\tfilter_replace_buf.data[0] = I40E_AQC_ADD_L1_FILTER_0X12;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[4] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\tif (status < 0)\n+\t\treturn status;\n+\n+\t/* for GTP-U */\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\tfilter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER;\n+\tfilter_replace.old_filter_type =\n+\t\tI40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID;\n+\tfilter_replace.new_filter_type =\n+\t\tI40E_AQC_ADD_CLOUD_FILTER_0X12;\n+\t/* Prepare the buffer, 2 entries */\n+\tfilter_replace_buf.data[0] = I40E_AQC_ADD_L1_FILTER_0X13;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[4] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n \tfilter_replace_buf.data[4] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n \n@@ -7317,6 +7434,36 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,\n \t\tbig_buffer = 1;\n \t\ttun_type = I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoGRE;\n \t\tbreak;\n+\tcase I40E_TUNNEL_TYPE_GTPC:\n+\t\tif (!pf->gtp_replace_flag) {\n+\t\t\ti40e_replace_gtp_l1_filter(pf);\n+\t\t\ti40e_replace_gtp_cloud_filter(pf);\n+\t\t\tpf->gtp_replace_flag = 1;\n+\t\t}\n+\t\tteid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD0] =\n+\t\t\t(teid_le >> 16) & 0xFFFF;\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD1] =\n+\t\t\tteid_le & 0xFFFF;\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD2] =\n+\t\t\t0x0;\n+\t\tbig_buffer = 1;\n+\t\tbreak;\n+\tcase I40E_TUNNEL_TYPE_GTPU:\n+\t\tif (!pf->gtp_replace_flag) {\n+\t\t\ti40e_replace_gtp_l1_filter(pf);\n+\t\t\ti40e_replace_gtp_cloud_filter(pf);\n+\t\t\tpf->gtp_replace_flag = 1;\n+\t\t}\n+\t\tteid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD0] =\n+\t\t\t(teid_le >> 16) & 0xFFFF;\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD1] =\n+\t\t\tteid_le & 0xFFFF;\n+\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD2] =\n+\t\t\t0x0;\n+\t\tbig_buffer = 1;\n+\t\tbreak;\n \tcase I40E_TUNNEL_TYPE_QINQ:\n \t\tif (!pf->qinq_replace_flag) {\n \t\t\tret = i40e_cloud_filter_qinq_create(pf);\n@@ -7343,13 +7490,19 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,\n \n \tif (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_MPLSoUDP)\n \t\tpfilter->element.flags =\n-\t\t\tI40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP;\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X11;\n \telse if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_MPLSoGRE)\n \t\tpfilter->element.flags =\n-\t\t\tI40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE;\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X12;\n+\telse if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_GTPC)\n+\t\tpfilter->element.flags =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X11;\n+\telse if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_GTPU)\n+\t\tpfilter->element.flags =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X12;\n \telse if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_QINQ)\n \t\tpfilter->element.flags |=\n-\t\t\tI40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ;\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X10;\n \telse {\n \t\tval = i40e_dev_get_filter_type(tunnel_filter->filter_type,\n \t\t\t\t\t\t&pfilter->element.flags);\n@@ -10870,14 +11023,14 @@ i40e_tunnel_filter_restore(struct i40e_pf *pf)\n \t\t\t sizeof(f->input.general_fields));\n \n \t\tif (((f->input.flags &\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ==\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ||\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X11) ==\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X11) ||\n \t\t ((f->input.flags &\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ==\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ||\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X12) ==\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X12) ||\n \t\t ((f->input.flags &\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ) ==\n-\t\t I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ))\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X10) ==\n+\t\t I40E_AQC_ADD_CLOUD_FILTER_0X10))\n \t\t\tbig_buffer = 1;\n \n \t\tif (big_buffer)\n@@ -11087,7 +11240,7 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf)\n \t/* create L1 filter */\n \tfilter_replace.old_filter_type =\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_IVLAN;\n-\tfilter_replace.new_filter_type = I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ;\n+\tfilter_replace.new_filter_type = I40E_AQC_ADD_CLOUD_FILTER_0X10;\n \tfilter_replace.tr_bit = 0;\n \n \t/* Prepare the buffer, 2 entries */\n@@ -11118,13 +11271,13 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf)\n \t/* create L2 filter, input for L2 filter will be L1 filter */\n \tfilter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER;\n \tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_OIP;\n-\tfilter_replace.new_filter_type = I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ;\n+\tfilter_replace.new_filter_type = I40E_AQC_ADD_CLOUD_FILTER_0X10;\n \n \t/* Prepare the buffer, 2 entries */\n \tfilter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n \tfilter_replace_buf.data[0] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n-\tfilter_replace_buf.data[4] = I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ;\n+\tfilter_replace_buf.data[4] = I40E_AQC_ADD_CLOUD_FILTER_0X10;\n \tfilter_replace_buf.data[4] |=\n \t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n \tret = i40e_aq_replace_cloud_filters(hw, &filter_replace,\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex f252ff3..087ff4d 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -643,10 +643,12 @@ struct i40e_ethertype_rule {\n #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1 45\n #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoUDP 8\n #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSoGRE 9\n-#define I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ 0x10\n-#define I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP 0x11\n-#define I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE 0x12\n-#define I40E_AQC_ADD_L1_FILTER_TEID_MPLS 0x11\n+#define I40E_AQC_ADD_CLOUD_FILTER_0X10 0x10\n+#define I40E_AQC_ADD_CLOUD_FILTER_0X11 0x11\n+#define I40E_AQC_ADD_CLOUD_FILTER_0X12 0x12\n+#define I40E_AQC_ADD_L1_FILTER_0X11 0x11\n+#define I40E_AQC_ADD_L1_FILTER_0X12 0x12\n+#define I40E_AQC_ADD_L1_FILTER_0X13 0x13\n \n enum i40e_tunnel_iptype {\n \tI40E_TUNNEL_IPTYPE_IPV4,\n@@ -896,6 +898,7 @@ struct i40e_pf {\n \tbool floating_veb_list[I40E_MAX_VF];\n \tstruct i40e_flow_list flow_list;\n \tbool mpls_replace_flag; /* 1 - MPLS filter replace is done */\n+\tbool gtp_replace_flag; /* 1 - GTP-C/U filter replace is done */\n \tbool qinq_replace_flag; /* QINQ filter replace is done */\n \tstruct i40e_tm_conf tm_conf;\n \t/* customer personalized pctype */\ndiff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex be44abb..7eb02fd 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -3751,15 +3751,17 @@ i40e_flow_parse_mpls_filter(struct rte_eth_dev *dev,\n * filled with 0.\n */\n static int\n-i40e_flow_parse_gtp_pattern(__rte_unused struct rte_eth_dev *dev,\n+i40e_flow_parse_gtp_pattern(struct rte_eth_dev *dev,\n \t\t\t const struct rte_flow_item *pattern,\n \t\t\t struct rte_flow_error *error,\n \t\t\t struct i40e_tunnel_filter_conf *filter)\n {\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tconst struct rte_flow_item *item = pattern;\n \tconst struct rte_flow_item_gtp *gtp_spec;\n \tconst struct rte_flow_item_gtp *gtp_mask;\n \tenum rte_flow_item_type item_type;\n+\tint pctype = 0;\n \n \tfor (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n \t\tif (item->last) {\n@@ -3809,6 +3811,16 @@ i40e_flow_parse_gtp_pattern(__rte_unused struct rte_eth_dev *dev,\n \t\t\tgtp_mask =\n \t\t\t\t(const struct rte_flow_item_gtp *)item->mask;\n \n+\t\t\tpctype = i40e_flow_find_new_pctype(pf,\n+\t\t\t\t\t\t\t item_type);\n+\t\t\tif (pctype == I40E_INVALID_PCTYPE) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Unsupported protocol\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n \t\t\tif (!gtp_spec || !gtp_mask) {\n \t\t\t\trte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -4245,12 +4257,12 @@ i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf,\n \t\tvsi = vf->vsi;\n \t}\n \n-\tif (((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ==\n-\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoUDP) ||\n-\t ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ==\n-\t I40E_AQC_ADD_CLOUD_FILTER_TEID_MPLSoGRE) ||\n-\t ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ) ==\n-\t I40E_AQC_ADD_CLOUD_FILTER_CUSTOM_QINQ))\n+\tif (((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X11) ==\n+\t I40E_AQC_ADD_CLOUD_FILTER_0X11) ||\n+\t ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X12) ==\n+\t I40E_AQC_ADD_CLOUD_FILTER_0X12) ||\n+\t ((filter->input.flags & I40E_AQC_ADD_CLOUD_FILTER_0X10) ==\n+\t I40E_AQC_ADD_CLOUD_FILTER_0X10))\n \t\tbig_buffer = 1;\n \n \tif (big_buffer)\n", "prefixes": [ "dpdk-dev", "v2", "6/6" ] }