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GET /api/patches/2606/?format=api
{ "id": 2606, "url": "https://patches.dpdk.org/api/patches/2606/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1422428365-5875-2-git-send-email-cunming.liang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1422428365-5875-2-git-send-email-cunming.liang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1422428365-5875-2-git-send-email-cunming.liang@intel.com", "date": "2015-01-28T06:59:11", "name": "[dpdk-dev,v2,01/15] eal: add cpuset into per EAL thread lcore_config", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9a720b4743117f5f389d9fc7313dd6d93e893884", "submitter": { "id": 46, "url": "https://patches.dpdk.org/api/people/46/?format=api", "name": "Cunming Liang", "email": "cunming.liang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1422428365-5875-2-git-send-email-cunming.liang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2606/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2606/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 649705A7A;\n\tWed, 28 Jan 2015 08:00:11 +0100 (CET)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 886355A7A\n\tfor <dev@dpdk.org>; Wed, 28 Jan 2015 07:59:54 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga103.jf.intel.com with ESMTP; 27 Jan 2015 22:55:33 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 27 Jan 2015 22:59:51 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t0S6xnq0023576;\n\tWed, 28 Jan 2015 14:59:49 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t0S6xkUN005936; Wed, 28 Jan 2015 14:59:48 +0800", "(from cliang18@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t0S6xk3n005932; \n\tWed, 28 Jan 2015 14:59:46 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.09,479,1418112000\"; d=\"scan'208\";a=\"668814769\"", "From": "Cunming Liang <cunming.liang@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 28 Jan 2015 14:59:11 +0800", "Message-Id": "<1422428365-5875-2-git-send-email-cunming.liang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1422428365-5875-1-git-send-email-cunming.liang@intel.com>", "References": "<1421914598-2747-1-git-send-email-cunming.liang@intel.com>\n\t<1422428365-5875-1-git-send-email-cunming.liang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 01/15] eal: add cpuset into per EAL thread\n\tlcore_config", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The patch adds 'cpuset' into per-lcore configure 'lcore_config[]',\nas the lcore no longer always 1:1 pinning with physical cpu.\nThe lcore now stands for a EAL thread rather than a logical cpu.\n\nIt doesn't change the default behavior of 1:1 mapping, but allows to\naffinity the EAL thread to multiple cpus.\n\nSigned-off-by: Cunming Liang <cunming.liang@intel.com>\n---\n lib/librte_eal/bsdapp/eal/eal_lcore.c | 7 +++++++\n lib/librte_eal/bsdapp/eal/eal_memory.c | 2 ++\n lib/librte_eal/common/include/rte_lcore.h | 8 ++++++++\n lib/librte_eal/linuxapp/eal/Makefile | 1 +\n lib/librte_eal/linuxapp/eal/eal_lcore.c | 8 ++++++++\n 5 files changed, 26 insertions(+)", "diff": "diff --git a/lib/librte_eal/bsdapp/eal/eal_lcore.c b/lib/librte_eal/bsdapp/eal/eal_lcore.c\nindex 662f024..72f8ac2 100644\n--- a/lib/librte_eal/bsdapp/eal/eal_lcore.c\n+++ b/lib/librte_eal/bsdapp/eal/eal_lcore.c\n@@ -76,11 +76,18 @@ rte_eal_cpu_init(void)\n \t * ones and enable them by default.\n \t */\n \tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\t/* init cpuset for per lcore config */\n+\t\tCPU_ZERO(&lcore_config[lcore_id].cpuset);\n+\n \t\tlcore_config[lcore_id].detected = (lcore_id < ncpus);\n \t\tif (lcore_config[lcore_id].detected == 0) {\n \t\t\tconfig->lcore_role[lcore_id] = ROLE_OFF;\n \t\t\tcontinue;\n \t\t}\n+\n+\t\t/* By default, lcore 1:1 map to cpu id */\n+\t\tCPU_SET(lcore_id, &lcore_config[lcore_id].cpuset);\n+\n \t\t/* By default, each detected core is enabled */\n \t\tconfig->lcore_role[lcore_id] = ROLE_RTE;\n \t\tlcore_config[lcore_id].core_id = cpu_core_id(lcore_id);\ndiff --git a/lib/librte_eal/bsdapp/eal/eal_memory.c b/lib/librte_eal/bsdapp/eal/eal_memory.c\nindex 65ee87d..a34d500 100644\n--- a/lib/librte_eal/bsdapp/eal/eal_memory.c\n+++ b/lib/librte_eal/bsdapp/eal/eal_memory.c\n@@ -45,6 +45,8 @@\n #include \"eal_internal_cfg.h\"\n #include \"eal_filesystem.h\"\n \n+/* avoid re-defined against with freebsd header */\n+#undef PAGE_SIZE\n #define PAGE_SIZE (sysconf(_SC_PAGESIZE))\n \n /*\ndiff --git a/lib/librte_eal/common/include/rte_lcore.h b/lib/librte_eal/common/include/rte_lcore.h\nindex 49b2c03..4c7d6bb 100644\n--- a/lib/librte_eal/common/include/rte_lcore.h\n+++ b/lib/librte_eal/common/include/rte_lcore.h\n@@ -50,6 +50,13 @@ extern \"C\" {\n \n #define LCORE_ID_ANY -1 /**< Any lcore. */\n \n+#if defined(__linux__)\n+\ttypedef\tcpu_set_t rte_cpuset_t;\n+#elif defined(__FreeBSD__)\n+#include <pthread_np.h>\n+\ttypedef cpuset_t rte_cpuset_t;\n+#endif\n+\n /**\n * Structure storing internal configuration (per-lcore)\n */\n@@ -65,6 +72,7 @@ struct lcore_config {\n \tunsigned socket_id; /**< physical socket id for this lcore */\n \tunsigned core_id; /**< core number on socket for this lcore */\n \tint core_index; /**< relative index, starting from 0 */\n+\trte_cpuset_t cpuset; /**< cpu set which the lcore affinity to */\n };\n \n /**\ndiff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile\nindex 72ecf3a..0e9c447 100644\n--- a/lib/librte_eal/linuxapp/eal/Makefile\n+++ b/lib/librte_eal/linuxapp/eal/Makefile\n@@ -87,6 +87,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_common_dev.c\n SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_common_options.c\n \n CFLAGS_eal.o := -D_GNU_SOURCE\n+CFLAGS_eal_lcore.o := -D_GNU_SOURCE\n CFLAGS_eal_thread.o := -D_GNU_SOURCE\n CFLAGS_eal_log.o := -D_GNU_SOURCE\n CFLAGS_eal_common_log.o := -D_GNU_SOURCE\ndiff --git a/lib/librte_eal/linuxapp/eal/eal_lcore.c b/lib/librte_eal/linuxapp/eal/eal_lcore.c\nindex c67e0e6..29615f8 100644\n--- a/lib/librte_eal/linuxapp/eal/eal_lcore.c\n+++ b/lib/librte_eal/linuxapp/eal/eal_lcore.c\n@@ -158,11 +158,19 @@ rte_eal_cpu_init(void)\n \t * ones and enable them by default.\n \t */\n \tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\t/* init cpuset for per lcore config */\n+\t\tCPU_ZERO(&lcore_config[lcore_id].cpuset);\n+\n+\t\t/* in 1:1 mapping, record related cpu detected state */\n \t\tlcore_config[lcore_id].detected = cpu_detected(lcore_id);\n \t\tif (lcore_config[lcore_id].detected == 0) {\n \t\t\tconfig->lcore_role[lcore_id] = ROLE_OFF;\n \t\t\tcontinue;\n \t\t}\n+\n+\t\t/* By default, lcore 1:1 map to cpu id */\n+\t\tCPU_SET(lcore_id, &lcore_config[lcore_id].cpuset);\n+\n \t\t/* By default, each detected core is enabled */\n \t\tconfig->lcore_role[lcore_id] = ROLE_RTE;\n \t\tlcore_config[lcore_id].core_id = cpu_core_id(lcore_id);\n", "prefixes": [ "dpdk-dev", "v2", "01/15" ] }