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Show a patch.
patch:
Update a patch.
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Update a patch.
GET /api/patches/25398/?format=api
{ "id": 25398, "url": "https://patches.dpdk.org/api/patches/25398/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1497591668-3320-25-git-send-email-shreyansh.jain@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1497591668-3320-25-git-send-email-shreyansh.jain@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1497591668-3320-25-git-send-email-shreyansh.jain@nxp.com", "date": "2017-06-16T05:40:54", "name": "[dpdk-dev,24/38] net/dpaa: add support for Tx and Rx queue setup", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b6e7067c127698d2e9c2766543e6fb1bca929ca7", "submitter": { "id": 497, "url": "https://patches.dpdk.org/api/people/497/?format=api", "name": "Shreyansh Jain", "email": "shreyansh.jain@nxp.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1497591668-3320-25-git-send-email-shreyansh.jain@nxp.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/25398/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/25398/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 5046D90FB;\n\tFri, 16 Jun 2017 07:33:58 +0200 (CEST)", "from NAM01-BN3-obe.outbound.protection.outlook.com\n\t(mail-bn3nam01on0074.outbound.protection.outlook.com [104.47.33.74])\n\tby dpdk.org (Postfix) with ESMTP id 6BF4C7D21\n\tfor <dev@dpdk.org>; Fri, 16 Jun 2017 07:33:13 +0200 (CEST)", "from MWHPR03CA0023.namprd03.prod.outlook.com (10.175.133.161) by\n\tBN3PR0301MB1186.namprd03.prod.outlook.com (10.160.156.148) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1178.14;\n\tFri, 16 Jun 2017 05:33:11 +0000", "from BN1BFFO11FD047.protection.gbl (2a01:111:f400:7c10::1:158) by\n\tMWHPR03CA0023.outlook.office365.com (2603:10b6:300:117::33) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1157.12\n\tvia Frontend Transport; Fri, 16 Jun 2017 05:33:11 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1BFFO11FD047.mail.protection.outlook.com (10.58.145.2) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1157.12\n\tvia Frontend Transport; Fri, 16 Jun 2017 05:33:10 +0000", "from Tophie.ap.freescale.net ([10.232.14.39])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv5G5WNFN001003; Thu, 15 Jun 2017 22:33:09 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Shreyansh Jain <shreyansh.jain@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@intel.com>, <hemant.agrawal@nxp.com>", "Date": "Fri, 16 Jun 2017 11:10:54 +0530", "Message-ID": "<1497591668-3320-25-git-send-email-shreyansh.jain@nxp.com>", "X-Mailer": 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"X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN3PR0301MB1186", "Subject": "[dpdk-dev] [PATCH 24/38] net/dpaa: add support for Tx and Rx queue\n\tsetup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\nSigned-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>\n---\n doc/guides/nics/features/dpaa.ini | 1 +\n drivers/net/dpaa/Makefile | 4 +\n drivers/net/dpaa/dpaa_ethdev.c | 279 ++++++++++++++++++++++++++++++++-\n drivers/net/dpaa/dpaa_ethdev.h | 6 +\n drivers/net/dpaa/dpaa_rxtx.c | 313 ++++++++++++++++++++++++++++++++++++++\n drivers/net/dpaa/dpaa_rxtx.h | 61 ++++++++\n mk/rte.app.mk | 1 +\n 7 files changed, 660 insertions(+), 5 deletions(-)\n create mode 100644 drivers/net/dpaa/dpaa_rxtx.c\n create mode 100644 drivers/net/dpaa/dpaa_rxtx.h", "diff": "diff --git a/doc/guides/nics/features/dpaa.ini b/doc/guides/nics/features/dpaa.ini\nindex 9e8befc..29ba47e 100644\n--- a/doc/guides/nics/features/dpaa.ini\n+++ b/doc/guides/nics/features/dpaa.ini\n@@ -4,5 +4,6 @@\n ; Refer to default.ini for the full list of available PMD features.\n ;\n [Features]\n+Queue start/stop = Y\n ARMv8 = Y\n Usage doc = Y\ndiff --git a/drivers/net/dpaa/Makefile b/drivers/net/dpaa/Makefile\nindex 8fcde26..06b63fc 100644\n--- a/drivers/net/dpaa/Makefile\n+++ b/drivers/net/dpaa/Makefile\n@@ -44,11 +44,13 @@ else\n CFLAGS += -O3\n CFLAGS += $(WERROR_FLAGS)\n endif\n+CFLAGS +=-Wno-pointer-arith\n \n CFLAGS += -I$(RTE_SDK_DPAA)/\n CFLAGS += -I$(RTE_SDK_DPAA)/include\n CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa\n CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include/\n+CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa\n CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common/include\n CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal/include\n \n@@ -58,7 +60,9 @@ LIBABIVER := 1\n \n # Interfaces with DPDK\n SRCS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += dpaa_ethdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += dpaa_rxtx.c\n \n LDLIBS += -lrte_bus_dpaa\n+LDLIBS += -lrte_mempool_dpaa\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c\nindex 2401058..5a8d8af 100644\n--- a/drivers/net/dpaa/dpaa_ethdev.c\n+++ b/drivers/net/dpaa/dpaa_ethdev.c\n@@ -62,8 +62,15 @@\n \n #include <rte_dpaa_bus.h>\n #include <rte_dpaa_logs.h>\n+#include <dpaa_mempool.h>\n \n #include <dpaa_ethdev.h>\n+#include <dpaa_rxtx.h>\n+\n+#include <fsl_usd.h>\n+#include <fsl_qman.h>\n+#include <fsl_bman.h>\n+#include <fsl_fman.h>\n \n /* Keep track of whether QMAN and BMAN have been globally initialized */\n static int is_global_init;\n@@ -79,20 +86,104 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused)\n \n static int dpaa_eth_dev_start(struct rte_eth_dev *dev)\n {\n+\tstruct dpaa_if *dpaa_intf = dev->data->dev_private;\n+\n \tPMD_INIT_FUNC_TRACE();\n \n \t/* Change tx callback to the real one */\n-\tdev->tx_pkt_burst = NULL;\n+\tdev->tx_pkt_burst = dpaa_eth_queue_tx;\n+\tfman_if_enable_rx(dpaa_intf->fif);\n \n \treturn 0;\n }\n \n static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)\n {\n-\tdev->tx_pkt_burst = NULL;\n+\tstruct dpaa_if *dpaa_intf = dev->data->dev_private;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tfman_if_disable_rx(dpaa_intf->fif);\n+\tdev->tx_pkt_burst = dpaa_eth_tx_drop_all;\n+}\n+\n+static void dpaa_eth_dev_close(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tdpaa_eth_dev_stop(dev);\n+}\n+\n+static\n+int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\t\t uint16_t nb_desc __rte_unused,\n+\t\t\t unsigned int socket_id __rte_unused,\n+\t\t\t const struct rte_eth_rxconf *rx_conf __rte_unused,\n+\t\t\t struct rte_mempool *mp)\n+{\n+\tstruct dpaa_if *dpaa_intf = dev->data->dev_private;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tPMD_DRV_LOG(INFO, \"Rx queue setup for queue index: %d\", queue_idx);\n+\n+\tif (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {\n+\t\tstruct fman_if_ic_params icp;\n+\t\tuint32_t fd_offset;\n+\t\tuint32_t bp_size;\n+\n+\t\tif (!mp->pool_data) {\n+\t\t\tPMD_DRV_LOG(ERR, \"not an offloaded buffer pool\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\tdpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);\n+\n+\t\tmemset(&icp, 0, sizeof(icp));\n+\t\t/* set ICEOF for to the default value , which is 0*/\n+\t\ticp.iciof = DEFAULT_ICIOF;\n+\t\ticp.iceof = DEFAULT_RX_ICEOF;\n+\t\ticp.icsz = DEFAULT_ICSZ;\n+\t\tfman_if_set_ic_params(dpaa_intf->fif, &icp);\n+\n+\t\tfd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;\n+\t\tfman_if_set_fdoff(dpaa_intf->fif, fd_offset);\n+\n+\t\t/* Buffer pool size should be equal to Dataroom Size*/\n+\t\tbp_size = rte_pktmbuf_data_room_size(mp);\n+\t\tfman_if_set_bp(dpaa_intf->fif, mp->size,\n+\t\t\t dpaa_intf->bp_info->bpid, bp_size);\n+\t\tdpaa_intf->valid = 1;\n+\t\tPMD_DRV_LOG(INFO, \"if =%s - fd_offset = %d offset = %d\",\n+\t\t\t dpaa_intf->name, fd_offset,\n+\t\t\tfman_if_get_fdoff(dpaa_intf->fif));\n+\t}\n+\tdev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx];\n+\n+\treturn 0;\n+}\n+\n+static\n+void dpaa_eth_rx_queue_release(void *rxq __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n }\n \n-static void dpaa_eth_dev_close(struct rte_eth_dev *dev __rte_unused)\n+static\n+int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\t\t uint16_t nb_desc __rte_unused,\n+\t\tunsigned int socket_id __rte_unused,\n+\t\tconst struct rte_eth_txconf *tx_conf __rte_unused)\n+{\n+\tstruct dpaa_if *dpaa_intf = dev->data->dev_private;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tPMD_DRV_LOG(INFO, \"Tx queue setup for queue index: %d\", queue_idx);\n+\tdev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];\n+\treturn 0;\n+}\n+\n+static void dpaa_eth_tx_queue_release(void *txq __rte_unused)\n {\n \tPMD_INIT_FUNC_TRACE();\n }\n@@ -102,28 +193,206 @@ static struct eth_dev_ops dpaa_devops = {\n \t.dev_start\t\t = dpaa_eth_dev_start,\n \t.dev_stop\t\t = dpaa_eth_dev_stop,\n \t.dev_close\t\t = dpaa_eth_dev_close,\n+\n+\t.rx_queue_setup\t\t = dpaa_eth_rx_queue_setup,\n+\t.tx_queue_setup\t\t = dpaa_eth_tx_queue_setup,\n+\t.rx_queue_release\t = dpaa_eth_rx_queue_release,\n+\t.tx_queue_release\t = dpaa_eth_tx_queue_release,\n };\n \n+/* Initialise an Rx FQ */\n+static int dpaa_rx_queue_init(struct qman_fq *fq,\n+\t\t\t uint32_t fqid)\n+{\n+\tstruct qm_mcc_initfq opts;\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tret = qman_reserve_fqid(fqid);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"reserve rx fqid %d failed with ret: %d\",\n+\t\t\tfqid, ret);\n+\t\treturn -EINVAL;\n+\t}\n+\tPMD_DRV_LOG(DEBUG, \"creating rx fq %p, fqid %d\", fq, fqid);\n+\tret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"create rx fqid %d failed with ret: %d\",\n+\t\t\tfqid, ret);\n+\t\treturn ret;\n+\t}\n+\n+\topts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |\n+\t\t QM_INITFQ_WE_CONTEXTA;\n+\n+\topts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;\n+\topts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |\n+\t\t\t QM_FQCTRL_PREFERINCACHE;\n+\topts.fqd.context_a.stashing.exclusive = 0;\n+\topts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH;\n+\topts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;\n+\topts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;\n+\n+\t/*Enable tail drop */\n+\topts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH;\n+\topts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE;\n+\tqm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1);\n+\n+\tret = qman_init_fq(fq, 0, &opts);\n+\tif (ret)\n+\t\tPMD_DRV_LOG(ERR, \"init rx fqid %d failed with ret: %d\",\n+\t\t\tfqid, ret);\n+\treturn ret;\n+}\n+\n+/* Initialise a Tx FQ */\n+static int dpaa_tx_queue_init(struct qman_fq *fq,\n+\t\t\t struct fman_if *fman_intf)\n+{\n+\tstruct qm_mcc_initfq opts;\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |\n+\t\t\t QMAN_FQ_FLAG_TO_DCPORTAL, fq);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"create tx fq failed with ret: %d\", ret);\n+\t\treturn ret;\n+\t}\n+\topts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |\n+\t\t QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;\n+\topts.fqd.dest.channel = fman_intf->tx_channel_id;\n+\topts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;\n+\topts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;\n+\topts.fqd.context_b = 0;\n+\t/* no tx-confirmation */\n+\topts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;\n+\topts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;\n+\tPMD_DRV_LOG(DEBUG, \"init tx fq %p, fqid %d\", fq, fq->fqid);\n+\tret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);\n+\tif (ret)\n+\t\tPMD_DRV_LOG(ERR, \"init tx fqid %d failed %d\", fq->fqid, ret);\n+\treturn ret;\n+}\n+\n /* Initialise a network interface */\n-static int dpaa_eth_dev_init(struct rte_eth_dev *eth_dev __rte_unused)\n+static int dpaa_eth_dev_init(struct rte_eth_dev *eth_dev)\n {\n+\tint num_cores, num_rx_fqs, fqid;\n+\tint loop, ret = 0;\n \tint dev_id;\n \tstruct rte_dpaa_device *dpaa_device;\n \tstruct dpaa_if *dpaa_intf;\n+\tstruct fm_eth_port_cfg *cfg;\n+\tstruct fman_if *fman_intf;\n+\tstruct fman_if_bpool *bp, *tmp_bp;\n \n \tPMD_INIT_FUNC_TRACE();\n \n \tdpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);\n \tdev_id = dpaa_device->id.dev_id;\n \tdpaa_intf = eth_dev->data->dev_private;\n+\tcfg = &dpaa_netcfg->port_cfg[dev_id];\n+\tfman_intf = cfg->fman_if;\n \n \tdpaa_intf->name = dpaa_device->name;\n \n+\t/* save fman_if & cfg in the interface struture */\n+\tdpaa_intf->fif = fman_intf;\n \tdpaa_intf->ifid = dev_id;\n+\tdpaa_intf->cfg = cfg;\n+\n+\t/* Initialize Rx FQ's */\n+\tif (getenv(\"DPAA_NUM_RX_QUEUES\"))\n+\t\tnum_rx_fqs = atoi(getenv(\"DPAA_NUM_RX_QUEUES\"));\n+\telse\n+\t\tnum_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;\n+\n+\t/* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX queues */\n+\tif (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) {\n+\t\tPMD_INIT_LOG(ERR, \"Invalid number of RX queues\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tdpaa_intf->rx_queues = rte_zmalloc(NULL,\n+\t\tsizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);\n+\tfor (loop = 0; loop < num_rx_fqs; loop++) {\n+\t\tfqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *\n+\t\t\tDPAA_PCD_FQID_MULTIPLIER + loop;\n+\t\tret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tdpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;\n+\t}\n+\tdpaa_intf->nb_rx_queues = num_rx_fqs;\n+\n+\t/* Initialise Tx FQs. Have as many Tx FQ's as number of cores */\n+\tnum_cores = rte_lcore_count();\n+\tdpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *\n+\t\tnum_cores, MAX_CACHELINE);\n+\tif (!dpaa_intf->tx_queues)\n+\t\treturn -ENOMEM;\n+\n+\tfor (loop = 0; loop < num_cores; loop++) {\n+\t\tret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],\n+\t\t\t\t\t fman_intf);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tdpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;\n+\t}\n+\tdpaa_intf->nb_tx_queues = num_cores;\n \n+\tPMD_DRV_LOG(DEBUG, \"all fqs created\");\n+\n+\t/* reset bpool list, initialize bpool dynamically */\n+\tlist_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {\n+\t\tlist_del(&bp->node);\n+\t\trte_free(bp);\n+\t}\n+\n+\t/* Populate ethdev structure */\n \teth_dev->dev_ops = &dpaa_devops;\n+\teth_dev->data->nb_rx_queues = dpaa_intf->nb_rx_queues;\n+\teth_dev->data->nb_tx_queues = dpaa_intf->nb_tx_queues;\n+\teth_dev->rx_pkt_burst = dpaa_eth_queue_rx;\n+\teth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;\n+\n+\t/* Allocate memory for storing MAC addresses */\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"mac_addr\",\n+\t\tETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d bytes needed to \"\n+\t\t\t\t\t\t\"store MAC addresses\",\n+\t\t\t\tETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);\n+\t\treturn -ENOMEM;\n+\t}\n \n-\treturn -1;\n+\t/* copy the primary mac address */\n+\tmemcpy(eth_dev->data->mac_addrs[0].addr_bytes,\n+\t\tfman_intf->mac_addr.addr_bytes,\n+\t\tETHER_ADDR_LEN);\n+\n+\tPMD_DRV_LOG(DEBUG, \"interface %s macaddr:\", dpaa_device->name);\n+\tfor (loop = 0; loop < ETHER_ADDR_LEN; loop++) {\n+\t\tif (loop != (ETHER_ADDR_LEN - 1))\n+\t\t\tprintf(\"%02x:\", fman_intf->mac_addr.addr_bytes[loop]);\n+\t\telse\n+\t\t\tprintf(\"%02x\\n\", fman_intf->mac_addr.addr_bytes[loop]);\n+\t}\n+\n+\t/* Disable RX mode */\n+\tfman_if_discard_rx_errors(fman_intf);\n+\tfman_if_disable_rx(fman_intf);\n+\t/* Disable promiscuous mode */\n+\tfman_if_promiscuous_disable(fman_intf);\n+\t/* Disable multicast */\n+\tfman_if_reset_mcast_filter_table(fman_intf);\n+\t/* Reset interface statistics */\n+\tfman_if_stats_reset(fman_intf);\n+\n+\treturn 0;\n }\n \n static int\ndiff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h\nindex 8aeaebf..da7f3be 100644\n--- a/drivers/net/dpaa/dpaa_ethdev.h\n+++ b/drivers/net/dpaa/dpaa_ethdev.h\n@@ -38,7 +38,13 @@\n #include <rte_ethdev.h>\n \n #include <rte_dpaa_logs.h>\n+#include <dpaa_mempool.h>\n \n+#include <fsl_usd.h>\n+#include <fsl_qman.h>\n+#include <fsl_bman.h>\n+#include <of.h>\n+#include <netcfg.h>\n \n #define DPAA_MBUF_HW_ANNOTATION\t\t64\n #define DPAA_FD_PTA_SIZE\t\t64\ndiff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c\nnew file mode 100644\nindex 0000000..d2ef513\n--- /dev/null\n+++ b/drivers/net/dpaa/dpaa_rxtx.c\n@@ -0,0 +1,313 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright 2017 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+/* System headers */\n+#include <stdio.h>\n+#include <inttypes.h>\n+#include <unistd.h>\n+#include <stdio.h>\n+#include <limits.h>\n+#include <sched.h>\n+#include <pthread.h>\n+\n+#include <rte_config.h>\n+#include <rte_byteorder.h>\n+#include <rte_common.h>\n+#include <rte_interrupts.h>\n+#include <rte_log.h>\n+#include <rte_debug.h>\n+#include <rte_pci.h>\n+#include <rte_atomic.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_memory.h>\n+#include <rte_memzone.h>\n+#include <rte_tailq.h>\n+#include <rte_eal.h>\n+#include <rte_alarm.h>\n+#include <rte_ether.h>\n+#include <rte_ethdev.h>\n+#include <rte_atomic.h>\n+#include <rte_malloc.h>\n+#include <rte_ring.h>\n+#include <rte_ip.h>\n+#include <rte_tcp.h>\n+#include <rte_udp.h>\n+\n+#include \"dpaa_ethdev.h\"\n+#include \"dpaa_rxtx.h\"\n+#include <rte_dpaa_bus.h>\n+#include <dpaa_mempool.h>\n+\n+#include <fsl_usd.h>\n+#include <fsl_qman.h>\n+#include <fsl_bman.h>\n+#include <of.h>\n+#include <netcfg.h>\n+\n+#define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \\\n+\tdo { \\\n+\t\t(_fd)->cmd = 0; \\\n+\t\t(_fd)->opaque_addr = 0; \\\n+\t\t(_fd)->opaque = QM_FD_CONTIG << DPAA_FD_FORMAT_SHIFT; \\\n+\t\t(_fd)->opaque |= ((_mbuf)->data_off) << DPAA_FD_OFFSET_SHIFT; \\\n+\t\t(_fd)->opaque |= (_mbuf)->pkt_len; \\\n+\t\t(_fd)->addr = (_mbuf)->buf_physaddr; \\\n+\t\t(_fd)->bpid = _bpid; \\\n+\t} while (0)\n+\n+static inline struct rte_mbuf *dpaa_eth_fd_to_mbuf(struct qm_fd *fd,\n+\t\t\t\t\t\t\tuint32_t ifid)\n+{\n+\tstruct pool_info_entry *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid);\n+\tstruct rte_mbuf *mbuf;\n+\tvoid *ptr;\n+\tuint16_t offset =\n+\t\t(fd->opaque & DPAA_FD_OFFSET_MASK) >> DPAA_FD_OFFSET_SHIFT;\n+\tuint32_t length = fd->opaque & DPAA_FD_LENGTH_MASK;\n+\n+\tPMD_RX_LOG(DEBUG, \" FD--->MBUF\");\n+\n+\t/* Ignoring case when format != qm_fd_contig */\n+\tptr = rte_dpaa_mem_ptov(fd->addr);\n+\t/* Ignoring case when ptr would be NULL. That is only possible incase\n+\t * of a corrupted packet\n+\t */\n+\n+\tmbuf = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size);\n+\t/* Prefetch the Parse results and packet data to L1 */\n+\trte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF));\n+\trte_prefetch0((void *)((uint8_t *)ptr + offset));\n+\n+\tmbuf->data_off = offset;\n+\tmbuf->data_len = length;\n+\tmbuf->pkt_len = length;\n+\n+\tmbuf->port = ifid;\n+\tmbuf->nb_segs = 1;\n+\tmbuf->ol_flags = 0;\n+\tmbuf->next = NULL;\n+\trte_mbuf_refcnt_set(mbuf, 1);\n+\n+\treturn mbuf;\n+}\n+\n+uint16_t dpaa_eth_queue_rx(void *q,\n+\t\t\t struct rte_mbuf **bufs,\n+\t\t\t uint16_t nb_bufs)\n+{\n+\tstruct qman_fq *fq = q;\n+\tstruct qm_dqrr_entry *dq;\n+\tuint32_t num_rx = 0, ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid;\n+\tint ret;\n+\n+\tret = rte_dpaa_portal_init((void *)0);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failure in affining portal\");\n+\t\treturn 0;\n+\t}\n+\n+\tret = qman_set_vdq(fq, (nb_bufs > DPAA_MAX_DEQUEUE_NUM_FRAMES) ?\n+\t\t\t\tDPAA_MAX_DEQUEUE_NUM_FRAMES : nb_bufs);\n+\tif (ret)\n+\t\treturn 0;\n+\n+\tdo {\n+\t\tdq = qman_dequeue(fq);\n+\t\tif (!dq)\n+\t\t\tcontinue;\n+\t\tbufs[num_rx++] = dpaa_eth_fd_to_mbuf(&dq->fd, ifid);\n+\t\tqman_dqrr_consume(fq, dq);\n+\t} while (fq->flags & QMAN_FQ_STATE_VDQCR);\n+\n+\treturn num_rx;\n+}\n+\n+static void *dpaa_get_pktbuf(struct pool_info_entry *bp_info)\n+{\n+\tint ret;\n+\tuint64_t buf = 0;\n+\tstruct bm_buffer bufs;\n+\n+\tret = bman_acquire(bp_info->bp, &bufs, 1, 0);\n+\tif (ret <= 0) {\n+\t\tPMD_DRV_LOG(WARNING, \"Failed to allocate buffers %d\", ret);\n+\t\treturn (void *)buf;\n+\t}\n+\n+\tPMD_RX_LOG(DEBUG, \"got buffer 0x%llx from pool %d\",\n+\t\t bufs.addr, bufs.bpid);\n+\n+\tbuf = (uint64_t)rte_dpaa_mem_ptov(bufs.addr) - bp_info->meta_data_size;\n+\tif (!buf)\n+\t\tgoto out;\n+\n+out:\n+\treturn (void *)buf;\n+}\n+\n+static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf,\n+\t\t\t\t\t struct dpaa_if *dpaa_intf)\n+{\n+\tstruct rte_mbuf *dpaa_mbuf;\n+\n+\t/* allocate pktbuffer on bpid for dpaa port */\n+\tdpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info);\n+\tif (!dpaa_mbuf)\n+\t\treturn NULL;\n+\n+\tmemcpy((uint8_t *)(dpaa_mbuf->buf_addr) + mbuf->data_off, (void *)\n+\t\t((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len);\n+\n+\t/* Copy only the required fields */\n+\tdpaa_mbuf->data_off = mbuf->data_off;\n+\tdpaa_mbuf->pkt_len = mbuf->pkt_len;\n+\tdpaa_mbuf->ol_flags = mbuf->ol_flags;\n+\tdpaa_mbuf->packet_type = mbuf->packet_type;\n+\tdpaa_mbuf->tx_offload = mbuf->tx_offload;\n+\trte_pktmbuf_free(mbuf);\n+\treturn dpaa_mbuf;\n+}\n+\n+uint16_t\n+dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)\n+{\n+\tstruct rte_mbuf *mbuf, *mi = NULL;\n+\tstruct rte_mempool *mp;\n+\tstruct pool_info_entry *bp_info;\n+\tstruct qm_fd fd_arr[MAX_TX_RING_SLOTS];\n+\tuint32_t frames_to_send, loop, i = 0;\n+\tint ret;\n+\n+\tret = rte_dpaa_portal_init((void *)0);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failure in affining portal\");\n+\t\treturn 0;\n+\t}\n+\n+\tPMD_TX_LOG(DEBUG, \"Transmitting %d buffers on queue: %p\", nb_bufs, q);\n+\n+\twhile (nb_bufs) {\n+\t\tframes_to_send = (nb_bufs >> 3) ? MAX_TX_RING_SLOTS : nb_bufs;\n+\t\tfor (loop = 0; loop < frames_to_send; loop++, i++) {\n+\t\t\tmbuf = bufs[i];\n+\t\t\tif (RTE_MBUF_DIRECT(mbuf)) {\n+\t\t\t\tmp = mbuf->pool;\n+\t\t\t} else {\n+\t\t\t\tmi = rte_mbuf_from_indirect(mbuf);\n+\t\t\t\tmp = mi->pool;\n+\t\t\t}\n+\n+\t\t\tbp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);\n+\t\t\tif (mp->ops_index == bp_info->dpaa_ops_index) {\n+\t\t\t\tPMD_TX_LOG(DEBUG, \"BMAN offloaded buffer, \"\n+\t\t\t\t\t\"mbuf: %p\", mbuf);\n+\t\t\t\tif (mbuf->nb_segs == 1) {\n+\t\t\t\t\tif (RTE_MBUF_DIRECT(mbuf)) {\n+\t\t\t\t\t\tif (rte_mbuf_refcnt_read(mbuf) > 1) {\n+\t\t\t\t\t\t\tDPAA_MBUF_TO_CONTIG_FD(mbuf,\n+\t\t\t\t\t\t\t\t&fd_arr[loop], 0xff);\n+\t\t\t\t\t\t\trte_mbuf_refcnt_update(mbuf, -1);\n+\t\t\t\t\t\t} else {\n+\t\t\t\t\t\t\tDPAA_MBUF_TO_CONTIG_FD(mbuf,\n+\t\t\t\t\t\t\t\t&fd_arr[loop], bp_info->bpid);\n+\t\t\t\t\t\t}\n+\t\t\t\t\t} else {\n+\t\t\t\t\t\tif (rte_mbuf_refcnt_read(mi) > 1) {\n+\t\t\t\t\t\t\tDPAA_MBUF_TO_CONTIG_FD(mbuf,\n+\t\t\t\t\t\t\t\t&fd_arr[loop], 0xff);\n+\t\t\t\t\t\t} else {\n+\t\t\t\t\t\t\trte_mbuf_refcnt_update(mi, 1);\n+\t\t\t\t\t\t\tDPAA_MBUF_TO_CONTIG_FD(mbuf,\n+\t\t\t\t\t\t\t\t&fd_arr[loop], bp_info->bpid);\n+\t\t\t\t\t\t}\n+\t\t\t\t\t\trte_pktmbuf_free(mbuf);\n+\t\t\t\t\t}\n+\t\t\t\t} else {\n+\t\t\t\t\tPMD_DRV_LOG(DEBUG, \"Number of Segments not supported\");\n+\t\t\t\t\t/* Set frames_to_send & nb_bufs so that\n+\t\t\t\t\t * packets are transmitted till\n+\t\t\t\t\t * previous frame.\n+\t\t\t\t\t */\n+\t\t\t\t\tframes_to_send = loop;\n+\t\t\t\t\tnb_bufs = loop;\n+\t\t\t\t\tgoto send_pkts;\n+\t\t\t\t}\n+\t\t\t} else {\n+\t\t\t\tstruct qman_fq *txq = q;\n+\t\t\t\tstruct dpaa_if *dpaa_intf = txq->dpaa_intf;\n+\n+\t\t\t\tPMD_TX_LOG(DEBUG, \"Non-BMAN offloaded buffer.\"\n+\t\t\t\t\t\"Allocating an offloaded buffer\");\n+\t\t\t\tmbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf);\n+\t\t\t\tif (!mbuf) {\n+\t\t\t\t\tPMD_DRV_LOG(DEBUG, \"no dpaa buffers.\");\n+\t\t\t\t\t/* Set frames_to_send & nb_bufs so that\n+\t\t\t\t\t * packets are transmitted till\n+\t\t\t\t\t * previous frame.\n+\t\t\t\t\t */\n+\t\t\t\t\tframes_to_send = loop;\n+\t\t\t\t\tnb_bufs = loop;\n+\t\t\t\t\tgoto send_pkts;\n+\t\t\t\t}\n+\n+\t\t\t\tDPAA_MBUF_TO_CONTIG_FD(mbuf, &fd_arr[loop],\n+\t\t\t\t\t\tdpaa_intf->bp_info->bpid);\n+\t\t\t}\n+\t\t}\n+\n+send_pkts:\n+\t\tloop = 0;\n+\t\twhile (loop < frames_to_send) {\n+\t\t\tloop += qman_enqueue_multi(q, &fd_arr[loop],\n+\t\t\t\t\tframes_to_send - loop);\n+\t\t}\n+\t\tnb_bufs -= frames_to_send;\n+\t}\n+\n+\tPMD_TX_LOG(DEBUG, \"Transmitted %d buffers on queue: %p\", i, q);\n+\n+\treturn i;\n+}\n+\n+uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,\n+\t\t\t struct rte_mbuf **bufs __rte_unused,\n+\t\tuint16_t nb_bufs __rte_unused)\n+{\n+\tPMD_TX_LOG(DEBUG, \"Drop all packets\");\n+\n+\t/* Drop all incoming packets. No need to free packets here\n+\t * because the rte_eth f/w frees up the packets through tx_buffer\n+\t * callback in case this functions returns count less than nb_bufs\n+\t */\n+\treturn 0;\n+}\ndiff --git a/drivers/net/dpaa/dpaa_rxtx.h b/drivers/net/dpaa/dpaa_rxtx.h\nnew file mode 100644\nindex 0000000..09f1aa4\n--- /dev/null\n+++ b/drivers/net/dpaa/dpaa_rxtx.h\n@@ -0,0 +1,61 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright 2017 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef __DPDK_RXTX_H__\n+#define __DPDK_RXTX_H__\n+\n+/* internal offset from where IC is copied to packet buffer*/\n+#define DEFAULT_ICIOF 32\n+/* IC transfer size */\n+#define DEFAULT_ICSZ\t48\n+\n+/* IC offsets from buffer header address */\n+#define DEFAULT_RX_ICEOF\t16\n+\n+#define DPAA_MAX_DEQUEUE_NUM_FRAMES 63\n+\t/** <Maximum number of frames to be dequeued in a single rx call*/\n+/* FD structure masks and offset */\n+#define DPAA_FD_FORMAT_MASK 0xE0000000\n+#define DPAA_FD_OFFSET_MASK 0x1FF00000\n+#define DPAA_FD_LENGTH_MASK 0xFFFFF\n+#define DPAA_FD_FORMAT_SHIFT 29\n+#define DPAA_FD_OFFSET_SHIFT 20\n+\n+uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);\n+\n+uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);\n+\n+uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,\n+\t\t\t struct rte_mbuf **bufs __rte_unused,\n+\t\t\t uint16_t nb_bufs __rte_unused);\n+#endif\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex 80e5530..6939bc5 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -181,6 +181,7 @@ endif # CONFIG_RTE_LIBRTE_DPAA2_PMD\n \n ifeq ($(CONFIG_RTE_LIBRTE_DPAA_PMD),y)\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_bus_dpaa\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD) += -lrte_mempool_dpaa\n endif\n \n endif # !CONFIG_RTE_BUILD_SHARED_LIBS\n", "prefixes": [ "dpdk-dev", "24/38" ] }