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GET /api/patches/2519/?format=api
{ "id": 2519, "url": "https://patches.dpdk.org/api/patches/2519/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1422243805-10906-6-git-send-email-jijiang.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1422243805-10906-6-git-send-email-jijiang.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1422243805-10906-6-git-send-email-jijiang.liu@intel.com", "date": "2015-01-26T03:43:24", "name": "[dpdk-dev,5/6] i40e:support GRE tunnel TX checksum offload", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c0919a431a44e63fcbe1c755ccaed856eef5869e", "submitter": { "id": 52, "url": "https://patches.dpdk.org/api/people/52/?format=api", "name": "Jijiang Liu", "email": "jijiang.liu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1422243805-10906-6-git-send-email-jijiang.liu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2519/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2519/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id EF9305AB8;\n\tMon, 26 Jan 2015 04:43:54 +0100 (CET)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 2DA255AB1\n\tfor <dev@dpdk.org>; Mon, 26 Jan 2015 04:43:45 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga102.fm.intel.com with ESMTP; 25 Jan 2015 19:43:44 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 25 Jan 2015 19:43:42 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t0Q3hebr026537;\n\tMon, 26 Jan 2015 11:43:40 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t0Q3hbe2010976; Mon, 26 Jan 2015 11:43:39 +0800", "(from jijiangl@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t0Q3hbs2010972; \n\tMon, 26 Jan 2015 11:43:37 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.09,466,1418112000\"; d=\"scan'208\";a=\"667420733\"", "From": "Jijiang Liu <jijiang.liu@intel.com>", "To": "dev@dpdk.org", "Date": "Mon, 26 Jan 2015 11:43:24 +0800", "Message-Id": "<1422243805-10906-6-git-send-email-jijiang.liu@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1422243805-10906-1-git-send-email-jijiang.liu@intel.com>", "References": "<1422243805-10906-1-git-send-email-jijiang.liu@intel.com>", "Subject": "[dpdk-dev] [PATCH 5/6] i40e:support GRE tunnel TX checksum offload", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Support NVGRE TX checksum offload, which includes\n - outer L3(IP) checksum offload\n - inner L3(IP) checksum offload\n - inner L4(UDP, TCP and SCTP) checksum offload\n\nIn addition, for GRE packet, the L4 tunnel type should be I40E_TXD_CTX_GRE_TUNNELING. \n\nSigned-off-by: Jijiang Liu <jijiang.liu@intel.com>\n---\n lib/librte_pmd_i40e/i40e_rxtx.c | 13 ++++++++++---\n 1 files changed, 10 insertions(+), 3 deletions(-)", "diff": "diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex 2beae3c..6c1e324 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -476,8 +476,15 @@ i40e_txd_enable_checksum(uint64_t ol_flags,\n \t\treturn;\n \t}\n \n-\t/* UDP tunneling packet TX checksum offload */\n-\tif (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) {\n+\t/* UDP/GRE tunneling packet TX checksum offload */\n+\tif (unlikely(ol_flags & (PKT_TX_UDP_TUNNEL_PKT |\n+\t\t\tPKT_TX_GRE_TUNNEL_PKT))) {\n+\t\tuint32_t tunnel_flag;\n+\n+\t\tif (ol_flags & PKT_TX_UDP_TUNNEL_PKT)\n+\t\t\ttunnel_flag = I40E_TXD_CTX_UDP_TUNNELING;\n+\t\telse\n+\t\t\ttunnel_flag = I40E_TXD_CTX_GRE_TUNNELING;\n \n \t\t*td_offset |= (outer_l2_len >> 1)\n \t\t\t\t<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;\n@@ -492,7 +499,7 @@ i40e_txd_enable_checksum(uint64_t ol_flags,\n \t\t/* Now set the ctx descriptor fields */\n \t\t*cd_tunneling |= (outer_l3_len >> 2) <<\n \t\t\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |\n-\t\t\t\tI40E_TXD_CTX_UDP_TUNNELING |\n+\t\t\t\ttunnel_flag |\n \t\t\t\t(l2_len >> 1) <<\n \t\t\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n \n", "prefixes": [ "dpdk-dev", "5/6" ] }